Common ARM context save/restore code

Shilimkar, Santosh santosh.shilimkar at ti.com
Mon Oct 18 07:08:48 UTC 2010


> -----Original Message-----
> From: Bobby Batacharia [mailto:Bobby.Batacharia at arm.com]
> Sent: Monday, October 18, 2010 12:33 PM
> To: Shilimkar, Santosh; Jon Callan; linaro-dev at lists.linaro.org
> Subject: RE: Common ARM context save/restore code
> 
> Hi,
> 
> Thanks for the response.
> 
> > The pre-defined locations are needed because not every registers needs
> to
> > be saved. For example in GIC, pending. Clear, Set sets of register are
> > pretty much same with inverted logic and can be easily decoded without
> > saving all of them but just one type of it. Hence the Save layout
> 
> Interesting. Why the optimization though - is the intent to save time or
> context space? Every cycle may count, but our investigations lead us to
> believe that the time for any shutdown is dominated by cache (L1) clean
> times.
>
Space as well as time. Space is more important factor.

> > Hence the Save layout
> > is not linear on OMAP4 and restore is handled in by Secure CODE which
> > is fixed for a SOC
> 
> Fair enough, but this is an OMAP4 implementation choice, not a general
> statement about SoCs. (Correct me if I'm wrong.)
> 
Yes. But other SOCs can implement such model as well.

> > Yes... Again I am not saying that you can't have generic code
> > doing that.It's doable but it will end up with some SOC specific
> execeptions.
> 
> Understood.
> 



More information about the linaro-dev mailing list