i.MX5/6 U-Boot: Cache enabling (was: Re: [U-Boot] Skipping relocation RAM to RAM, esp. on i.MX6?)

Marek Vasut marek.vasut at gmail.com
Sat Feb 4 10:18:55 UTC 2012


> Let's discuss how to enable the i.MX5/6 caches in U-Boot:
> 
> On 03.02.2012 12:00, Stefano Babic wrote:
> > On 03/02/2012 11:18, Dirk Behme wrote:
> ...
> 
> >>> As your concerns are surely related to speed up the boot process, IMHO
> >>> we can focus efforts to add cache support for MX5 / MX6.
> >> 
> >> Ok, sounds good. Any idea what has to be done for this? Or what would be
> >> the steps for this?
> > 
> > As armv7 architecture, the MX can profit of the work already done for
> > other SOCs. Functions for enabling / disabling / invalidate caches are
> > already provided, in arch/arm/lib and arch/arm/cpu/armv7/cache_v7.c. So
> > at least for MX5/MX6.
> > 
> > But we should change MXC drivers to be cache-aware. At least the FEC
> > driver and MMC driver are known to not work when dcache is on.
> 
> Marek, Troy, Fabio: What do you think is needed to make the i.MX5/6
> FEC driver cache-aware?

I already have a partly finished implementation of FEC ethernet with cache 
support somewhere on my drive.

M
> 
> Jason, Stefano: And what do you think would be needed for the MMC driver?
> 
> Best regards
> 
> Dirk



More information about the linaro-dev mailing list