[Linaro-mm-sig] Memory region attribute bits and multiple mappings
davidb at codeaurora.org
Wed Apr 20 19:57:28 UTC 2011
On Tue, Apr 19 2011, Rebecca Schultz Zavin wrote:
> Until recently the dma api in the kernel was doing it too. Apparently it's
> related to speculative prefetching, so as far as my understand goes, not an
> issue on Cortex-A8 where the feature isn't present. However, there have been a
> couple of cases of data corruption due to it on A9. It's also possible that
> the architecture licensee's implementations -- like the qualcomm snapdragons --
> don't actually have a bug when this occurs. I'm trying to collect the info on
> exactly which exhibit a problem. Be aware though, it's a race condition, just
> because you never saw it doesn't mean you couldn't have.
Newer Qualcomm cores will have a problem with this as well.
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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