[ACTIVITY] 21st - 25th November

[Andrew Stubbs]

Worked on adding support for 64-bit NEON integer shifts. I have this 
working now, although I'm still not very happy about how the register 
allocator chooses which mode to use - it prefers core-registers if the 
values start or end in core-regs, even though moving to values to NEON 
registers might be more efficient (general 64-bit shifts in core 
registers require several instructions). I've also had to mark the CC 
register clobbered in all cases, even though it only gets clobbered in 
some of them, which might be necessary, but isn't very satisfactory.

The NEON shifts work showed that 32->64 bit extends could be done better 
also. This hasn't been a great problem up to now, but the shift amount 
(in particular) is typically a 32-bit value and yet needs to be 
zero-extended to 64-bit for NEON's purposes. Right now, GCC prefers to 
extend the value in core-registers, and then copy it to NEON. This 
works, but burns another core-register - a scarce commodity - so I think 
it would be better to copy it first, and then extend it after. NEON has 
instructions for this, so I'm investigating how to get the compiler to 
do it (this is all strictly post-combine, so the usual options are out, 
and the register allocator has to be allowed to do it the old way in the 
case where core-regs really are the best option, so it's tricky).