From e9395551c7616e856ae84f271265df1d8deb7355 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Mon, 20 Feb 2012 16:08:46 +0000 Subject: [PATCH 1/7] SamsungPlatformPkg/ExynosPkg: Do not initialize the Timers 2/3 if already done Signed-off-by: Olivier Martin --- .../ExynosPkg/Include/Library/ExynosTimerLib.h | 4 +- .../ExynosPkg/Library/TimerLib/TimerLib.c | 76 ++++++++++---------- 2 files changed, 41 insertions(+), 39 deletions(-) mode change 100644 => 100755 SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h diff --git a/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h b/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h old mode 100644 new mode 100755 index c723ac1..f8248a9 --- a/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h +++ b/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h @@ -16,13 +16,13 @@ #ifndef _EXYNOSTIMERLIB_H__ #define _EXYNOSTIMERLIB_H__ -typedef enum{ +typedef enum { TIMER_0, TIMER_1, TIMER_2, TIMER_3, TIMER_4, -}PWM_TIMERS; +} PWM_TIMERS; #define NUM_OF_TIMERS (0x05) #define PWM_TCFG0_OFFSET (0x0000) diff --git a/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c b/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c index 6baf2ce..5babf28 100755 --- a/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c +++ b/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c @@ -36,38 +36,40 @@ TimerConstructor ( PWMTimerBase = PcdGet32(PcdPWMTimerBase); -/** - This function is for initializing for PWM Timer - Timer 2 = > Delay Counter - Timer 3 = > Performance Counter -**/ -// PWM Input Clock(ACLK_100) is 100 Mhz so We need to prescale about 1Mhz to make udelay function - rwVal = MmioRead32 (PWMTimerBase + PWM_TCFG0_OFFSET); - rwVal &= ~(0xFF << PRESCALE_GRP1_START_POS); - rwVal |= (PRESCALE_TIMER_GRP1 << PRESCALE_GRP1_START_POS); - MmioWrite32 ((PWMTimerBase + PWM_TCFG0_OFFSET), rwVal); - MmioWrite32 ((PWMTimerBase + PWM_TCFG1_OFFSET), 0x0); - -// PWM Timer INT disable - rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET), rwVal & ~(TIMER_INTR_MASK(TIMER_2) | TIMER_INTR_MASK(TIMER_3))); - -// PWM Timer 2,3 make to stop - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & (STOP_TIMER_VAL(TIMER_2) | STOP_TIMER_VAL(TIMER_3))); - -// PWM Timer 3 used by Free running counter with Auto re-load mode - MmioWrite32 ((PWMTimerBase + PWM_TCNTB3_OFFSET), MAX_COUNT_VAL); -// Set and Clear PWM Manually update for Timer 3 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_3)); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_3)); -// Set Auto re-load and start Timer - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | RELOAD_AND_START(TIMER_3)); - - DEBUG ((EFI_D_ERROR, "Timer 2,3 Enabled\n")); - - return RETURN_SUCCESS; + if ((MmioRead32(PWMTimerBase + PWM_TCON_OFFSET) & START_TIMER(TIMER_3)) != START_TIMER(TIMER_3)) { + /** + This function is for initializing for PWM Timer + Timer 2 = > Delay Counter + Timer 3 = > Performance Counter + **/ + // PWM Input Clock(ACLK_100) is 100 Mhz so We need to prescale about 1Mhz to make udelay function + rwVal = MmioRead32 (PWMTimerBase + PWM_TCFG0_OFFSET); + rwVal &= ~(0xFF << PRESCALE_GRP1_START_POS); + rwVal |= (PRESCALE_TIMER_GRP1 << PRESCALE_GRP1_START_POS); + MmioWrite32 ((PWMTimerBase + PWM_TCFG0_OFFSET), rwVal); + MmioWrite32 ((PWMTimerBase + PWM_TCFG1_OFFSET), 0x0); + + // PWM Timer INT disable + rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET), rwVal & ~(TIMER_INTR_MASK(TIMER_2) | TIMER_INTR_MASK(TIMER_3))); + + // PWM Timer 2,3 make to stop + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & (STOP_TIMER_VAL(TIMER_2) | STOP_TIMER_VAL(TIMER_3))); + + // PWM Timer 3 used by Free running counter with Auto re-load mode + MmioWrite32 ((PWMTimerBase + PWM_TCNTB3_OFFSET), MAX_COUNT_VAL); + // Set and Clear PWM Manually update for Timer 3 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_3)); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_3)); + // Set Auto re-load and start Timer + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | RELOAD_AND_START(TIMER_3)); + + DEBUG ((EFI_D_ERROR, "Timer 2,3 Configured\n")); + } + + return RETURN_SUCCESS; } /** @@ -94,11 +96,11 @@ MicroSecondDelay ( MmioWrite32 ((PWMTimerBase + PWM_TCNTB2_OFFSET), MicroSeconds); -// PWM Timer 2 stop + // PWM Timer 2 stop rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & STOP_TIMER_VAL(TIMER_2)); -// Set and Clear PWM Manually update for Timer 2 + // Set and Clear PWM Manually update for Timer 2 rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_2)); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_2)); @@ -140,14 +142,14 @@ NanoSecondDelay ( // load the timer count register MmioWrite32 ((PWMTimerBase + PWM_TCNTB2_OFFSET), MicroSeconds); -// PWM Timer 2 stop + // PWM Timer 2 stop rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & STOP_TIMER_VAL(TIMER_2)); -// Set and Clear PWM Manually update for Timer 2 + // Set and Clear PWM Manually update for Timer 2 rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_2)); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_2)); - //Start Timer 2 + // Start Timer 2 rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | START_TIMER(TIMER_2)); -- 1.7.0.4