Hi,

I have followed procedure to integrate libopenCSD in perf tool in target ARM. (based on kernel 4.18rc1)

I’ve seen in documentation that perf record need parameters cs_etm/@xxxxx.etr/u …

I would like to know if ETR device is mandatory to use coresight trace with perf ?

In my architecture, I’ve :

1 .funnel

1 .tpiu

2 .etm

1 .etf

1 .stm

1 replicator but no ETR L

If possible without ETR, do you have examples of perf record cmd usage ?

I’ve configured my coresight register as followed :

echo 1 > /sys/bus/coresight/devices/xxxx.stm/hwevent_select

echo 2 > /sys/bus/coresight/devices/xxxx.stm/hwevent_extmux_select

// Need to track IRQ up of UART

echo 0x200000 > /sys/bus/coresight/devices/xxxx.stm/hwevent_enable

echo 1 > /sys/bus/coresight/devices/yyyy.etf/enable_sink

echo 1 > /sys/bus/coresight/devices/xxxx.stm/enable_source

Which perf record cmd I must enter to catch my STM event ?

Thanks for your help.

Christophe.