Hi
You can activate/ deactivate loading coresight drivers for ETM ETR etc.. by adjusting your device tree description. 
Depending on the traces you are genetating (from an arm core or a different core), you may use out of the shelf drivers or write you own drivers/traces decoders.
Kind regards 

Zied Guermazi

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Am Mi., Mai 25, 2022 at 1:11 AM schrieb Mathieu Poirier
<mathieu.poirier@linaro.org>:
Hi Chenkai,

I am taking the liberty of CC'ing the coresight mailing list so that
people with more experience with the HW implementation can chime in.

On Tue, 24 May 2022 at 05:07, 陈凯 <chenkai.system@bytedance.com> wrote:
>
> Dear Poirier,
> I‘m recently read the Linux driver of coresight, I have a question for you about the coresight driver ;

That is a lot of reading.

> I have a SOC(without arm core) ,in which we integrate the ARM CoreSight;

Interesting.

> Is the CoreSight driver still compatible for the soc without ETM,beacuse SOC donot include arm core;
> and look forwarding to your replay.
>

The coresight framework does not specifically need an ETM device to
work and will transport traces generated by any kind of source that
comply with the specification.  But you will need to supply your own
decoder in the perf tools if you want to take advantage of the perf
infrastructure.

>
> Best regards,
> ChenKai
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