From 8e22a5d4e2140d1d88eb9f794e5b27c760e22c69 Mon Sep 17 00:00:00 2001 From: Li Pengcheng Date: Mon, 6 Mar 2017 17:20:52 +0800 Subject: [PATCH 1/3] sctrl: coresight test: opening the sctrl atb clock gating opening the sctrl ACPU_SC_CLKEN register 11 bit atb clock gating. Signed-off-by: Li Pengcheng --- drivers/misc/Makefile | 1 + drivers/misc/hi6220-sysconfig.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) create mode 100644 drivers/misc/hi6220-sysconfig.c diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 4a25950..bf8462d 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -53,6 +53,7 @@ obj-$(CONFIG_ECHO) += echo/ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_PANEL) += panel.o +obj-y += hi6220-sysconfig.o obj-$(CONFIG_UID_SYS_STATS) += uid_sys_stats.o obj-$(CONFIG_MEMORY_STATE_TIME) += memory_state_time.o diff --git a/drivers/misc/hi6220-sysconfig.c b/drivers/misc/hi6220-sysconfig.c new file mode 100644 index 0000000..c61bfbb --- /dev/null +++ b/drivers/misc/hi6220-sysconfig.c @@ -0,0 +1,29 @@ +#include + +#define SOC_HI6220_ACPU_SCTRL_BASE_ADDR 0xF6504000 +#define ACPU_SC_CLKEN 0x00C +#define ACPU_SC_CLK_STAT 0x014 + +static int __init hi6220_sysconf(void) +{ + static void __iomem *base = NULL; + + base = ioremap(SOC_HI6220_ACPU_SCTRL_BASE_ADDR, SZ_4K); + if (base == NULL) { + pr_err("hi6220: asctl reg iomap failed!\n"); + return -ENOMEM; + } + /* enable coresight */ + pr_err("%s:before sctrl ACPU_SC_CLK_STAT is %x\n", + __func__, + readl(base + ACPU_SC_CLK_STAT)); + writel(BIT(11), base + ACPU_SC_CLKEN); + pr_err("%s:after sctrl ACPU_SC_CLK_STAT is %x\n", + __func__, + readl(base + ACPU_SC_CLK_STAT)); + + iounmap(base); + + return 0; + } + postcore_initcall(hi6220_sysconf); -- 2.6.3