I haven't noticed Sai posted this same change: well, I can at least confirm it's beneficial!

Thank you for pointing this out

Andrea


From: Mike Leach <mike.leach@linaro.org>
Sent: 04 August 2020 15:48
To: Andrea Brunato <Andrea.Brunato@arm.com>
Cc: coresight@lists.linaro.org <coresight@lists.linaro.org>; Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>; Stephen Boyd <swboyd@chromium.org>; Suzuki Poulose <Suzuki.Poulose@arm.com>; Mathieu Poirier <mathieu.poirier@linaro.org>
Subject: Re: [PATCH] arm64: dts: qcom: sdm845: Save Restore ETM Context
 
Same thing is covered by this patch:-
http://lists.infradead.org/pipermail/linux-arm-kernel/2020-July/587172.html

On Tue, 4 Aug 2020 at 15:32, Andrea Brunato <andrea.brunato@arm.com> wrote:
>
> Specify coresight-loses-context-with-cpu, making the ETM driver
> to save the context on power-down.
>
> While running system-wide tracing (-a) on DragonBoard845c, I hit the
> following:
>
> WARNING: CPU: 0 PID: 488 at drivers/hwtracing/coresight/coresight.c:209
>  coresight_disclaim_device_unlocked+0x1c/0x38
>  Modules linked in:
>  CPU: 0 PID: 488 Comm: plain_perf Not tainted 5.8.0-rc6-34384-g9a3868dbef01 #6
>  Hardware name: Thundercomm Dragonboard 845c (DT)
>  pstate: 80400085 (Nzcv daIf +PAN -UAO BTYPE=--)
>  pc : coresight_disclaim_device_unlocked+0x1c/0x38
>  lr : etm4_disable_hw+0xb8/0xf0
>  sp : ffff8000126139a0
>  x29: ffff8000126139a0 x28: ffff0000e9c90000
>  x27: ffff0000f158f180 x26: ffff0000f524d800
>  x25: ffff0000fd6aba30 x24: 0000000000000004
>  x23: ffff0000f158fa00 x22: ffff3aa88d4f9000
>  x21: ffff0000f5196800 x20: ffff0000f524d800
>  x19: ffff0000f524d080 x18: 0000000000000000
>  x17: 0000000000000000 x16: 0000000000000000
>  x15: 0000000000000000 x14: 0000000000000000
>  x13: 0000000000000000 x12: 0000000000000000
>  x11: 0000000000000000 x10: 0000000000000000
>  x9 : ffffc5586ed1ef88 x8 : ffff0000e9c90000
>  x7 : 00000000afa099e8 x6 : 00000000295ce537
>  x5 : 0000000000000001 x4 : ffff8000105152a4
>  x3 : 0000000000000001 x2 : ffff0000f524d1fc
>  x1 : 0000000000000000 x0 : ffff800010515fa4
>  Call trace:
>   coresight_disclaim_device_unlocked+0x1c/0x38
>   etm4_disable+0x5c/0xe0
>   etm_event_stop+0xb4/0x128
>   etm_event_del+0x1c/0x28
>   event_sched_out.isra.0+0xbc/0x250
>   group_sched_out.part.0+0x48/0xb8
>   __perf_event_disable+0xec/0x258
>   event_function+0xa4/0x130
>   remote_function+0x64/0x78
>   generic_exec_single+0xc4/0x150
>   smp_call_function_single+0x178/0x208
>   event_function_call+0x150/0x160
>   _perf_event_disable+0x48/0x70
>   perf_event_for_each_child+0x40/0x90
>   _perf_ioctl+0x220/0x630
>   perf_ioctl+0x50/0x80
>   ksys_ioctl+0xb0/0xf0
>   __arm64_sys_ioctl+0x28/0x38
>   el0_svc_common.constprop.0+0x7c/0x198
>   do_el0_svc+0x2c/0x98
>   el0_sync_handler+0x9c/0x1b8
>   el0_sync+0x158/0x180
>
> This looks like due to ETM losing context with CPU power down
> and thus losing the CLAIM tags, leading to an empty CLAIM tag set
> while disabling the ETM.
>
> Adding the "coresight-loses-context-with-cpu" property to the ETM
> nodes fixes the issue.
> Also the amount of trace collected is significantly larger
> than without the patch.
>
> Signed-off-by: Andrea Brunato <andrea.brunato@arm.com>
> Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> ---
>
> PS: I experienced this on DragonBoard845c. I am not sure
> if this issue persists on other board based on the sd845.
>
> Sai, could you please share your thoughts?
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 8eb5a31346d2..42f5a08d8d34 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2643,6 +2643,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2662,6 +2663,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2681,6 +2683,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2700,6 +2703,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2719,6 +2723,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2738,6 +2743,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2757,6 +2763,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> @@ -2776,6 +2783,7 @@
>
>                         clocks = <&aoss_qmp>;
>                         clock-names = "apb_pclk";
> +                       arm,coresight-loses-context-with-cpu;
>
>                         out-ports {
>                                 port {
> --
> 2.17.1
>


--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK