Hi Mike,

Thanks for the detailed instructions.

On 4 September 2017 at 23:13, Mike Leach <mike.leach@linaro.org> wrote:
> Hi Chunyan.
>
> There is plenty of documentation for DS-5, but the path from snapshot
> to trace dump is not obvious so I will give you a few pointers.
>
> 1) first you need to create a DS-5 configuration that will load your snapshot.
>
> a) On the menu choose "run->debug configurations" which will open the
> debug configurations dialog.
> b) Click the "new configuration button" - leftmost button above the
> left pane to create a new configuration.
> c) In the Name: edit box type a new name for this configuration
> d) on the "connection" tab in the right hand pane navigate to
> Generic->Snapshot->View Snapshot->ViewSnapshot.
> e) below this browse for the snapshot.ini file you want to use in the
> configuration by clicking the File... button and select a file.
> See attached ds-5-debug-config.png for picture of above dialog.
>
> f) On the "debugger" tab, select the "connect only" radio button in
> the Run Control area.
> Hit "Apply" and "close" and you new "Snapshot connection" should be
> visible in the "debug Control" tab in DS-5. Right click, hit connect
> and DS-5 should load the snapshot.

We have to ensure the target is connecting with DStream when hit
connect on DS-5, right?

Is there any way for offline decoding snapshot of raw trace [1]
further which I mean decoded by 'trc_pkt_lister'.  Since the decoded
traces [1] are still not easy to be used for understanding what the
system was doing.

Or how you would suggest us to use this kind of traces decoded by
'trc_pkt_lister' to understand the behavior of CPU core?

Thanks,
Chunyan

[1] http://people.linaro.org/~zhang.chunyan/opencsd_decoder/tests/snapshots/sharkl2/decode_result-etm0.txt

>
> 2) Creating a dump text.
> a) Now select a core in the left panel to see trace for that core.
> b) Hit the export trace button to open the export trace report dialog.
> Look at export-trace.png
> From here just choose what you want to dump and hit OK
>
> Regards
>
> Mike
>
>
> On 4 September 2017 at 09:29, Chunyan Zhang <zhang.chunyan@linaro.org> wrote:
>> Hi Mike,
>>
>> On 16 August 2017 at 00:07, Mike Leach <mike.leach@linaro.org> wrote:
>>> Hi Maryem,
>>>
>>> The output you have above is a mix of raw trace packets and the
>>> decoded generic output packets.
>>> i.e. I_ATOM_F3 is a raw trace packet from the ETMv4 protocol,
>>> OCSD_GEN_TRC_ELEM_ADDR_NACC( 0x40c4ec ) is the generic output packet
>>> from the decoder after processing a number of raw trace packets.
>>> In this case the OCSD_GEN_TRC_ELEM_ADDR_NACC( 0x40c4ec ) packet
>>> indicates that the decoder does not have the memory image for address
>>> 0x40c4ec and therefore cannot decode correctly.
>>>
>>> If you are not using perf to capture trace data then I assume you are
>>> using some other custom method. e.g. sysfs scripts / programs.
>>> Once you have captured a buffer full of data, if you are not using a
>>> debugger such as DS-5 then it will be necessary to write a custom
>>
>> I used sysfs to capture trace data, and have decoded them with
>> 'trc_pkt_lister' which compiled from opencsd (the .ini files under
>> snapshots were modified from TC2's, since I was decoding etmv3
>> traces).
>>
>> From what you mentioned here, I guess DS-5 can decode the data further
>> to make it readable in assemble language? I hope that the traces can
>> look like this:
>> https://github.com/Linaro/OpenCSD/blob/master/decoder/tests/snapshots/TC2/ds5-dumps/etmv3_0x10.txt
>>
>> Could you tell me what should I do? Is there some documentation
>> introducing how to operate DS-5 to get this kind of decoded data?  I
>> have a DStream, but haven't used it ever :)
>>
>> Thanks,
>> Chunyan
>>
>>> program or script to do the following:-
>>> a) using the OpenCSD library, create a decoder instance and use the
>>> API to pass in the ETM settings used during the trace capture session.
>>> b) further use the API to pass in any memory images of the traced code
>>> / kernel memory you wish to decode.
>>> c) Pass the trace data through the decoder instance and process the
>>> output generic packets that represent executed instruction ranges by
>>> passing them to a disassembly tool/library to create the output you
>>> require.
>>>
>>> Best Regards
>>>
>>> Mike
>>>
>>>
>>> On 15 August 2017 at 15:56, Mathieu Poirier <mathieu.poirier@linaro.org> wrote:
>>>> Good morning Maryem,
>>>>
>>>> I am enlisting Mike's help on this one.  When looking for support on
>>>> CoreSight I suggest you CC the mailing list - there is a lot of
>>>> knowledgeable people on there that can help you.
>>>>
>>>> Mathieu
>>>>
>>>>
>>>> On 11 August 2017 at 08:57, Maryem Ayadi <maryem.ayady@gmail.com> wrote:
>>>>> Hi mathieu,
>>>>>
>>>>> I am working with the Opencsd library under linux in order to collect and
>>>>> decode the trace.
>>>>> I am using the Snapshots directory and I already decoded the trace packets
>>>>> from ETB_0 using ETM and captured from juno_r1_1 using the following
>>>>> command: ./tests/bin/linux64/dbg/trc_pkt_lister -ss_dir
>>>>> tests/snapshots/juno_r1_1/ -decode -src_name ETB_0 . This is an extract of
>>>>> the generic output packets:
>>>>>
>>>>>
>>>>> Idx:65507; ID:15; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0x40c5dc )
>>>>> Idx:65508; ID:15; [0x95 0x3b ];    I_ADDR_S_IS0 : Address, Short, IS0.;
>>>>> Addr=0x000000000040C4EC ~[0xEC]
>>>>> Idx:65510; ID:15; [0xfe ];    I_ATOM_F3 : Atom format 3.; NEE
>>>>> Idx:65510; ID:15; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0x40c4ec )
>>>>> Idx:65475; ID:10; OCSD_GEN_TRC_ELEM_EO_TRACE()
>>>>>
>>>>>
>>>>> Now I want to generate trace data captured with ETM and coded in assembly
>>>>> language. Is that possible without using any debugger tool such as ARM's
>>>>> DS-5 debugger tool ?
>>>>> It would be helpful to send me any steps I should follow.
>>>>>
>>>>> Best regards,
>>>>> Maryem Ayadi
>>>>>
>>>
>>>
>>>
>>> --
>>> Mike Leach
>>> Principal Engineer, ARM Ltd.
>>> Blackburn Design Centre. UK
>>> _______________________________________________
>>> CoreSight mailing list
>>> CoreSight@lists.linaro.org
>>> https://lists.linaro.org/mailman/listinfo/coresight
>
>
>
> --
> Mike Leach
> Principal Engineer, ARM Ltd.
> Blackburn Design Centre. UK