Hi Mathieu,

The '4X" refers to the fact that the barrier packet is an FSYNC packet
repeated 4 times. The barrier is related to the trace frame protocol
not any ETM version protocol.

Regards

Mike

On 15 June 2017 at 17:47, Mathieu Poirier <mathieu.poirier@linaro.org> wrote:
>
>
> On 13 June 2017 at 02:55, Mike Leach <mike.leach@linaro.org> wrote:
>> Perf drivers now insert barrier packets into trace data blocks where
>> buffer
>> has wrapped to ensure that the decode can spot when perf is concatenating
>>  blocks. This activates the logic for spotting these barriers in the
>> decoder.
>>
>> Signed-off-by: Mike Leach <mike.leach@linaro.org>
>
> Good day Mike,
>
>> ---
>>  tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>> b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>> index b4cbf4c..e72d207 100644
>> --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>> +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
>> @@ -481,6 +481,11 @@ struct cs_etm_decoder *cs_etm_decoder__new(uint32_t
>> num_cpu, struct cs_etm_decod
>>          flags |= (d_params->hsyncs ? OCSD_DFRMTR_HAS_HSYNCS : 0);
>>          flags |= (d_params->frame_aligned ? OCSD_DFRMTR_FRAME_MEM_ALIGN :
>> 0);
>>
>> +       /* Drivers may add barrier frames when used with perf,
>> +        *   set up to handle this.
>> +        */
>> +       flags |= OCSD_DFRMTR_RESET_ON_4X_FSYNC;
>> +
>
> Are barrier packets treated differently on 3x?  Any reason to have a 4x
> specific flag?  If we need two separate flags then the above snippet should
> go in the switch statement that checks the protocol.  That way we can use
> the same function to create a new decoder on 3x.
>
> Thanks,
> Mathieu
>
>>          /* Create decode tree for the data source */
>>          decoder->dcd_tree = ocsd_create_dcd_tree(format,flags);
>>
>> --
>> 2.7.4
>>
>



--
Mike Leach
Principal Engineer, ARM Ltd.
Blackburn Design Centre. UK