On Tuesday 05 May 2015 00:15:23 Fu Wei wrote:
>
> >
> > > +Note that #address-cells, #size-cells, and ranges shall be present to
> > ensure
> > > +the CPU can address a frame's registers.
> >
> > I don't see what you mean here. These properties should only be needed if
> > there
> > are child devices below the watchdog, but there are none.
> >
>
> For now, we only have AArch64 hardware , so
> #address-cells = <2>; #size-cells = <2>; are unnecessary,
>
> but if there is some other Soc have this, maybe we need this. Maybe we can
> say:
> these shall be present if the parent device's ones are different from it
> or just delete it
The device should not have any #address-cells property at all, unless
you define sub-nodes and say what the addresses are meant to be.
Without a "ranges" property, the device is supposed to have its own
bus that is not visible from the parent bus (or the CPU), so you would
need to say what the addressing of the bus inside of the watchdog is
like, and how the child devices use it.
If you add a 'ranges' property, you define how the 64-bit addresses inside
of the watchdog translate into addresses of the parent bus, which may
be e.g. a 64-bit AXI bus or a 32-bit AHB bus, like this:
/ {
#address-cells = <2>;
#size-cells = <2>;
axi@0 { /* root bus with direct mapping */
#address-cells = <2>;
#size-cells = <2>;
ranges; /* 64-bit mmio */
dma-ranges; /* 64-bit DMA */
ahb@100.c0000000 { /* 32-bit bus with 1GB address space /*
#address-cells = <1>;
#size-cells = <1>;
/* ahb adresss 0xc0000000 is CPU 0x100c0000000 */
ranges = <0xc0000000 0x100 0xc0000000 0x40000000>;
dma-ranges = <0 0 0 0xffffffff>; /* 4GB RAM visible at 0 */
watchdog@3e010000 {
reg = <0x3e010000 0x1000>;
#address-cells = <2>;
#size-cells = <2>;
/* child bus only has 256MB address starting at 0x1c0000000 */
ranges = <1 0xc0000000 0xc0000000 0 0x10000000>;
dma-ranges = <0 0 0 0 0>; /* no dma */
uart@1.c1234000 {
reg = <1 0xc1234 0 0x1000>;
};
};
};
};
};
So in this example, the watchdog bus would have the 64-bit addressing you want, with
an internal bus that has a UART at address 0x1c1234000, which translates to address
0xc1234000 on the 32-bit AHB bus that contains the watchdog, and in turn to the
64-bit CPU address 0x100c1234000 on the AXI bus and the root bus.
Does this example explain what you need to know?
> > > + reg-names = "refresh_frame", "control_frame";
> > > + interrupts = <0 27 4>;
> > > + interrupt-names: "ws0"
> >
> > typo.
> >
>
> Sorry, "interrupt-names" ?
>
You have ':' instead of '=' and are missing a ';' at the end of the line.
Arnd