Dear Wolfgang Denk,
Dear Wolfgang Denk,
On 19 December 2011 13:27, Wolfgang Denk <wd@denx.de> wrote:Dear Chander Kashyap,
Um.... Comment and code disagree:
In message <1324275424-29468-3-git-send-email-chander.kashyap@linaro.org> you wrote:
> Earliar ARM clock frequency was calculated by:
> MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
> It is fixed by calcuating it as follows:
> ARMCLK=MOUTCORE/(DIVCORE + 1)/DIVCORE2 + 1)
...or is this just missing a paren?
This gives
> + dout_apll = get_pll_clk(APLL) / (core_ratio + 1);
> + dout_apll /= (core2_ratio + 1);
ARMCLK=MOUTCORE/(DIVCORE + 1)/ (DIVCORE2 + 1)
Please check if this is correct.
Below is the scenario of selection.____________
MOUTAPLL --------------->| MUX_CORE |------------>MOUTCORE
MOUTMPLL --------------->|____________|
Here MOUTAPLL is selected as input. So Parent is correct.Best regards,
Wolfgang Denk
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Bus error -- driver executed.
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with warm regards,
Chander Kashyap