Thanks Pawel, now I understand better the Coresight architecture,
but STM has its own hardware architecture independent to Coresight not connected to Debug Bus nor Funnel Trace bus.
STM exposes a set of registers to our main CPU for its control, it is connected to our ST-BUS through interconnect.
ITM appears to have the same functions as our STM, perhaps we can share their usages or more.

Regards
Philippe

On 8 February 2011 11:20, Pawel Moll <pawel.moll@arm.com> wrote:
Morning,

> y, STM is not in the same family that xTM which trace execution & data
> flow of an ARM core (non intrusive).
> STM is more at applicative trace level like printf (output console
> only).

Well, what I mean is that xTMs - ETM/PTM tracing execution flow, ITM
behaving like mentioned printf (STM's older sibling), etc. - are just
source of data in the CoreSight architecture, connected to a (shared)
trace bus, which then has sinks like trace port and trace buffer. Have a
look at this diagram:

http://www.arm.com/images/CoreSight_Diagram.jpg

And as far as I know STM can be configured to do the same, but you
should really talk to Ian - he's the resident expert in this subject :-)
I'll forward him your questions.

Cheers!

Paweł