On 7 February 2011 13:16, Pawel Moll <span dir="ltr">&lt;<a href="mailto:pawel.moll@arm.com">pawel.moll@arm.com</a>&gt;</span> wrote:<br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<div class="im">&gt;   This module external interface is a pad on the chip<br>
&gt;   which complies to the MIPI System Trace Protocol v1.0,<br>
&gt;   and the actual trace output can be read by an<br>
&gt;   electronic probe, not by software so it cannot be intercepted by<br>
&gt;   the CPU and reach Linux userspace.<br>
<br>
</div>I&#39;m not an expert here, but my understanding is that the architecture<br>
allows to put all the trace data to both trace port and ETB (Embedded<br>
Trace Buffer) at the same time. It&#39;s just that the STM (along with<br>
ETM/PTM and other xTMs ;-) outputs its data via funnel to a trace bus,<br>
and the bus can feed both the buffer and the port.<br>
<br>
And as it is possible to read the ETB content - see<br>
arch/arm/kernel/etm.c<br>
<div class="im"><br></div></blockquote><div>Sorry, STM is not in the same family that xTM which trace execution &amp; data flow of an ARM core (non intrusive).<br>STM is more at applicative trace level like printf (output console only). <br>
 <br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;"><div class="im">
&gt; I&#39;d like to know if another ARM SoC plan to use or already use STM or<br>
&gt; some similar hardware enabling the same kind of MIPI trace points.<br>
&gt; If yes, we can share our works.<br>
<br>
</div>Would you be so kind to talk to Ian Spray &lt;<a href="mailto:Ian.Spray@arm.com">Ian.Spray@arm.com</a>&gt;? He is<br>
doing stuff around CoreSight drivers...<br>
<br>
Cheers!<br>
<br>
Paweł<br>
<br></blockquote><div><br>Regards<br>Philippe <br></div></div><br>