hmm, well, let me put a disclaimer on that.. I'd be interested to check with someone at ARM who knows the pipeline well, to see if something like this could be implemented without having to write a full cycle accurate simulation of the ARM..  it's possible that a tool like I describe might be more difficult than it's worth if it requires an elaborate simulation of the inner workings of the ARM.  But it was a feasible thing to write such a tool, it would be very useful for optimizing neon code

BR,
-R

On Mon, Apr 25, 2011 at 5:37 PM, Clark, Rob <rob@ti.com> wrote:
possibly on the topic of "NEON Optimization Forum Collaboration tools" (or possibly off-topic and more of a general tools thing)..

I've always wanted a static code analyzer for neon that given a specified cortex-a processor, could tell me which instructions would stall, and for how many cycles and why.  It would be a helpful thing for optimizing NEON code.  I guess not a hard thing to write for someone who has a deep understanding of cortex-a* pipeline.. (ie. ARM)

BR,
-R

On Mon, Apr 25, 2011 at 12:54 PM, Kurt Taylor <kurt.taylor@linaro.org> wrote:
At the last TSC meeting we refined the list of TRs for the Multimedia team.  https://wiki.linaro.org/Cycles/1111/TechnicalTopics/Multimedia

I have taken the liberty to put these into a wiki page based on the feedback received during the meeting and some new items added after. Unless told otherwise, I will be creating the Multimedia WG blueprints from this list. Here they are sorted by priority:

https://wiki.linaro.org/WorkingGroups/Middleware/Multimedia/BlueprintsFor1111

Please review and be thinking about any questions you have, as well as a rough sizing for the amount of work required.

Comments?

Kurt Taylor (irc krtaylor)

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