Hi Guys,
Could you please let me know which release of toolchain support v8.2-A CPU? How to get it?
https://www.linaro.org/downloads/
Thanks
David
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Oh dear...
Adding linaro-toolchain(a)lists.linaro.org to see what they have to say
(and linaro-uefi, because it's useful information for subscribers of that).
Regards,
Leif
On Tue, Feb 21, 2017 at 08:09:53PM +0000, Evan Lloyd wrote:
> To add to Alexei's comments:
> It seems there is a bug in the newer GCC Pre-processor that messes with the file case.
> (He is currently checking what file system flags might be affecting that, but older versions work fine).
>
> The questions I'd add are:
> Is there someone in Linaro who we might discuss the problem with (on the GCC side)? I think there are Linaro guys involved with it, and they may be able to tell us it is confusion on our part.
> Should we be trying to upstream the fix, or just wait for a new GCC?
>
> Regards,
> Evan
>
>
>
> From: Alexei Fedorov
> Sent: 21 February 2017 16:37
> To: ard.biesheuvel(a)linaro.org; ryan.harkin(a)linaro.org; leif.lindholm(a)linaro.org; Evan Lloyd; Sami Mujawar; Girish Pathak
> Cc: Mitch Ishihara; Alexei Fedorov
> Subject: Problem with building AML file from Dsdt.asl for Juno
>
>
> Hello,
>
>
>
> We are facing a problem when compiling Juno's Dsdt.asl file with the following GCC builds:
>
>
>
> gcc-linaro-5.3.1-2016.05-i686-mingw32_aarch64-elf
>
> gcc-linaro-6.1.1-2016.08-i686-mingw32_aarch64-elf
>
> gcc-linaro-6.2.1-2016.11-i686-mingw32_aarch64-elf
>
> gcc-linaro-6.3.1-2017.02-i686-mingw32_aarch64-elf
>
>
>
> which all show a similar error:
>
>
>
> ...
> Trim --source-code -l -o k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.iiii k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.iii
> "C:\ASL\iasl" -pk:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.aml k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.iiii
> Error 6126 - Input file does not appear to be an ASL or data table source file
> Intel ACPI Component Architecture
> make: *** [Makefile:325: k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\Dsdt.aml] Error -1
>
>
>
> It looks like the problem is with GCC pre-processor running on Dsdt.i file (created after
>
> Trim --asl-file -o k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.i -i k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\inc.lst k:\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\Dsdt.asl
>
> )
>
>
>
> See:
>
>
> "C:\gcc-linaro-6.3.1-2017.02-i686-mingw32_aarch64-elf\bin\aarch64-elf-gcc" -x c -E -include AutoGen.h -Ik:\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables -Ik:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\DEBUG -Ik:\ArmPkg -Ik:\ArmPkg\Include -Ik:\ArmPlatformPkg -Ik:\ArmPlatformPkg\Include -Ik:\ArmPlatformPkg\ArmVExpressPkg -Ik:\ArmPlatformPkg\ArmVExpressPkg\Include -Ik:\ArmPlatformPkg\ArmJunoPkg -Ik:\ArmPlatformPkg\ArmJunoPkg\Include -Ik:\EmbeddedPkg -Ik:\EmbeddedPkg\Include -Ik:\MdePkg -Ik:\MdePkg\Include -Ik:\MdePkg\Include\AArch64 -Ik:\MdeModulePkg -Ik:\MdeModulePkg\Include -Ik:\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTablesk:\Build\ArmJuno\DEBUG_GCC5AARCH64OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.i > k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.iii
>
>
>
> For all GCC versions above, the 1st line of Dsdt.iii lists its name & full path in lowercase:
>
> # 1 "k:\\build\\armjuno\\debug_gcc5\\aarch64\\openplatformpkg\\platforms\\arm\\juno\\acpitables\\acpitables\\output\\dsdt.i"
>
>
>
> Compare it with Dsdt.iii after pre-processing by GCC from gcc-linaro-4.9.4-2017.01-i686-mingw32_aarch64-elf release:
>
> # 1 "k:\\Build\\ArmJuno\\DEBUG_GCC49\\AARCH64\\OpenPlatformPkg\\Platforms\\ARM\\Juno\\AcpiTables\\AcpiTables\\OUTPUT\\.\\Dsdt.i"
>
>
>
> For GCC 5.3.1 & above Dsdt.iiii created by
>
> Trim --source-code -l -o k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.iiii k:\Build\ArmJuno\DEBUG_GCC5\AARCH64\OpenPlatformPkg\Platforms\ARM\Juno\AcpiTables\AcpiTables\OUTPUT\.\Dsdt.iii
>
>
>
> has 0 length, which causes iASL compiler to fail with:
>
> Error 6126 - Input file does not appear to be an ASL or data table source file
>
>
>
> We've got a workaround solution for that problem which involves modification of \BaseTools\Conf\build_rule.template:
>
>
>
> In ASL section:
> [Acpi-Source-Language-File]
> <InputFile>
> ?.asl, ?.Asl, ?.ASL
>
>
>
> by replacing 3 lines as below:
>
>
> <Command.GCC, Command.GCCLD>
> # Trim --asl-file -o $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.i -i $(INC_LIST) ${src}
> # "$(ASLPP)" $(ASLPP_FLAGS) $(INC) -I${s_path} $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.i > $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.iii
> # Trim --source-code -l -o $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.iiii $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.iii
> "$(ASLPP)" $(ASLPP_FLAGS) $(INC) -I${s_path} ${src} > $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.i
> Trim --source-code -l -o $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.iiii $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.I
>
>
>
> Please share your opinion on that matter.
>
>
>
> Alexei.
>
>
>
>
>
>
>
>
>
> IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [6/10]
-- Test on Arm hardware and fix issues.
-- Wrote breakpoint command based test-cases for multi-thread tests.
-- Wrote RSP packets based test-cases.
-- Code clean-up, formatting and re basing to latest code.
-- Submit final patch for review after adding tests and arm support.
Initial investigation on LLDB watchpoints set on variables [TCWG-1049] [1/10]
GDB Kernel Awareness [1/10]
-- Looked at STM landing team patches and tried setting up test environment.
LLDB BUD17 Presentation [1/10]
-- Spent some time deciding on content and information gathering.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Work on review and up streaming.
LLDB BUD17 Presentation
-- Complete slide deck and submit for review.
GDB Kernel Awareness
-- Test submitted patches and develop understanding of project.
Further investigation on LLDB watchpoints set on variables [TCWG-1049]
1 day in office this week
== Activity ==
[TCWG-617] Range extension thunks
- Reworked patch to finalize dynamic content early and resubmitted for
upstream review
- Investigated what I'll need to do to handle linkerscripts
[BUD17]
Uploaded slide deck
== Plan ==
On holiday till Thursday 1st March
Deal with any last minute Linaro Connect stuff
Continue with Range Extension Thunk work.
== Planned absences ==
Holiday 21st Feb to 1st March
Linaro Connect 6th to 10th March
Euro LLVM 27-28 March
~ Progress ~
* AArch64 OpenOCD. TCWG-947 [4/10]
AArch64 support is merged to mainline. Works with one Hikey I
borrowed from Peter G.
Still doesn't work with mine.
* Upstream patch reviews. [2/10]
** Review Peter B.'s disassembly option patch.
** DWARF implicit_pointer big-endian patch.
** Python event before_prompt patch.
* Off on Thur and Fri. [4/10]
~ Plan ~
* Go to London again on Tue for Schengen visa.
* Back to GDB work, think about SVE GDB patches,
8.0 release, etc.
--
Yao Qi
== This Week ==
* gimplefe (5/10)
- Committed patch to add abs_expr
- Committed patch to fix PR79478
- Committed patch to add fma_expr
- Committed patch to fix ICE's in c_parser_gimple_postfix_expression
- Submitted patch to fix incorrect translation for an invalid
test-case, but decided to drop the
patch after discussing with Richard.
* TCWG-1005 (2/10)
- Formatting fixes
- Patch compiles SPEC2K (not benchmarked)
* PR79588 (1/10)
- Fix discussion with Jakub
* Misc (2/10)
- Meetings
- Connect slides
== Next Week ==
- TCWG-1010, TCWG-1005, gimple-fe
== Progress ==
* Validation
- more work on use of containers, ssh-agent & jenkins problem
- good progress
- committed several improvements to the production jobs too
* misc (conf-calls, meetings, emails, ....)
== Next ==
* ABE & Jenkins jobs patches reviews and bug fixes
* Holidays Feb 27th-March 3rd (week before Connect)
The Linaro Binary Toolchain
============================
The Linaro GCC 6.3-2017.02 Release is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release packages from:
(sources)
http://releases.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/
(binaries)
http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Supported Targets
==================
The Linaro binary toolchain is a collection of x86-hosted GNU
cross-toolchains targeting a variety of ARM architecture targets.
Linaro TCWG provides these toolchains as a service to our members.
Due to hardware availability, system-image availability, validation
complexity, and user-base size, not all host and target toolchain
combinations can be validated by Linaro with the same rigor.
The most rigorously validated targets are little-endian and hardfloat
implementations of the 32-bit ARMv7 (arm), 32-bit ARMv8 (armv8), and
64-bit ARMv8 (aarch64) architectures. Linaro recommends those targets
to our members.
A full list of the supported arm and AArch64 target triples can be
found here:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Linaro recommends using the 64-bit x86_64 host toolchains as the
32-bit i686 host toolchains and the 32-bit mingw host toolchains will
only be provided as long as there is sufficient member interest to
justify their continued availability.
Package Versions
=================
Linaro GCC 6.3-2017.02
http://releases.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 7.12 (gdb-7.12-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.3-2017.02)
==============================================
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targeted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, and Linaro GCC 6.3-2017.01.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Director - Linaro Core Technology and Tools
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
T: +1-612-424-1861
[TCWG-617] Range extension thunks
- Did some refactoring to allow addresses to be assigned to sections
prior to Thunk creation
-- In upstream review
- Investigated lld's implementation of linkerscripts and found out
that they will need some refactoring as well
-- Need to assign addresses more than once
-- Need to insert some thunks at precise points (Mips equivalent of
inline veneers), need to make sure that linkerscript won't reorder the
sections.
[BUD17]
Gave test run of presentation, cut down a lot of the slides as a result
== Plan ==
In office on Monday only, then Holiday to 1st March
- Finalise slides for connect, and work out how to submit them.
- Work out how to do Thunks and linker scripts cleanly
== Planned absences ==
Holiday 21st Feb to 1st March
Linaro Connect 6th to 10th March
Euro LLVM 27-28 March
== Progress ==
* [ARM GlobalISel] Add support for fp arguments [TCWG-1029] [7/10]
- Committed support for double precision hard float and soft-fp
* [ARM GlobalISel] Fix atomic loads/stores after r294993 [TCWG-1041] [1/10]
- Worked on a patch that I'll probably commit next week
* Misc [2/10]
- Meetings, mailing lists, code reviews
== Plan ==
* More code reviews
* More GlobalISel
Hi Denys,
adding linaro-toolchain ml for ABE related questions.
On 16 February 2017 at 06:12, Denys Dmytriyenko <denis(a)denix.org> wrote:
> Hi,
>
> I was wondering if there was a way to apply local patches to toolchain
> components (gcc, binutils, glibc, etc.) when building with ABE.
>
> The only way I know of right now is to mirror the upstream repository into own
> git tree, patch it and point ABE to it; or check it out locally, patch it and
> pass the resulting tarball to ABE build with --disable update flag.
>
> I know one of ABE's requirement is "Should build all toolchains with no
> custom patches", but it would be nice to be able to do so on top of official
> sources... Thoughts, comments?
>
> --
> Denys
The Linaro Binary Toolchain
============================
The Linaro GCC 6.3-2017.02-rc2 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources)
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02-rc2/
(binaries)
http://snapshots.linaro.org/components/toolchain/binaries/6.3-2017.02-rc2/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and Aarch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.3-2017.02-rc2
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02-rc2/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 7.12 (gdb-7.12-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.3-2017.02-rc2)
==================================================
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Jeff Johnston <jjohnstn(a)redhat.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, and Linaro GCC 6.3-2017.01.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Director - Linaro Core Technology and Tools
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
T: +1-612-424-1861
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2017.02 snapshot of both Linaro GCC 5 and Linaro GCC 6 source
packages.
Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.3+svn245201 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2017.05
stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.3+svn245201
* Linaro BZ #2562: [PR target/78253] Call weak function instead of
strong when called through pointer
* Backport of [Bugfix] [AArch32] PR target/71270 Fix
neon_valid_immediate for big-endian
* Backport of [Bugfix] [AArch32] PR target/77439 Wrong code for
sibcall with longcall, APCS frame and VFP
* Backport of [Bugfix] [AArch32] PR target/78364 Add proper
restrictions to zero and sign_extract patterns operands
* Backport of [Bugfix] [AArch32] PR target/78694 Avoid invalid RTL
sharing in minipool code
* Backport of [Bugfix] [AArch32] PR target/79145 Fix xordi3 expander
for immediate operands in iWMMXt
* Backport of [Bugfix] [AArch64] PR target/78362 Make sure to only
take REGNO of a register
* Backport of [Bugfix] PR rtl-optimization/79121 Incorrect expansion
of extend plus left shift
* Backport of [AArch32] 1/2 Use generic_extra_costs in all remaining
tuning structs
* Backport of [AArch32] 2/2 Remove old rtx costs
* Backport of [AArch32] arm_neon.h: Add artificial and gnu_inline
* Backport of [AArch32] Improve Cortex-a53 integer scheduler
* Backport of [AArch32] Improve Thumb allocation order
* Backport of [AArch32] Merge negdi2 patterns
* Backport of [AArch64] 1/2 Add bfx attribute
* Backport of [AArch64] 2/2 Add bfx attribute
* Backport of [AArch64] Fix bootstrap on aarch64-*-freebsd
* Backport of [AArch64] Improve SHA1 scheduling
* Backport of [AArch64] Purge leftover occurrences of
aarch64_nopcrelative_literal_loads
* Backport of [AArch64] Split X-reg UBFIZ into W-reg LSL when possible
* Backport of [AArch64] Split X-reg UBFX into W-reg LSR when possible
* Backport of [AArch64] Tweak Cortex-A57 vector cost
* Backport of [Testsuite] [AArch64] PR target/77634 some vectorized
testcases fail with -mcpu=thunderx
* Backport of [Testsuite] [AArch64] PR target/77635 load/store pair
testcases need to use -mcpu=generic
* Backport of [Testsuite] Fix format string in AdvSIMD tests
* Backport of [Testsuite] Require shared effective target for some lto.exp tests
Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.4+svn245200 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the next
maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.4-2017.02/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.4+svn245200
* Linaro BZ #2785: PR target/66785 Internal compiler error in record_operand_use
* Linaro BZ #2562: [PR target/78253] Call weak function instead of
strong when called through pointer
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
~ Progress ~
* AArch64 OpenOCD. TCWG-947, [2/10]
After asking Peter G. about OpenOCD + Hikey, he sent me his working
Hikey+Cable to me.
* SVE GDB patches review. TCWG-1040, [4/10]
Review some patches, and suggest Alan how to split the patch to easily
make some progress.
Think about the needed change to GDB target description.
* Kernel awareness debugging patch review. [2/10]
Manage to write a small test case so that we can somehow test the new
feature in user space in gdb testsuite.
Think about how does Linaro move on about this project.
* Schengen visa application. [2/10]
Visa application centre doesn't accept my documents because my documents
copy are tow-side printed. Has to book another appointment and go to
London again .
~ Plan ~
* TCWG-947, Try opencod with Peter G.'s board.
* TCWG-1040, prototype of new GDB/GDBserver target description.
--
Yao Qi
== Progress ==
* Validation
- more work on use of containers
* GCC
- reported a few failures upstream
- added a few missing poly64_t intrinsics (arm, aarch64)
* misc (conf-calls, meetings, emails, ....)
== Next ==
* ABE & Jenkins jobs patches reviews and bug fixes
== This Week ==
* gimple-fe (4/10)
a) Add support for abs_expr
b) Add support for fma_expr
* TCWG-1010 (4/10)
- Continue working on prototype, dealing with unexpected ICE's :(
* Misc (2/10)
- Reading up on gcc's inliner
- Meetings
== Next Week ==
- TCWG-1010, TCWG-1005, gimple-fe
- Benchmarking LTO using spec2xxx-utils on tx1/tk1
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [9/10]
-- Submitted AArch64 hardware breakpoint patch for review.
-- Updates after upstream comments.
-- Added Arm hardware breakpoint support code.
-- Testing and debugging of Arm code on android arm device.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Write breakpoint command based test-cases.
-- Write RSP packets based test-cases.
-- Submit patch for review after edits and upgrades.
GDB Kernel Awareness
-- Background study and understand existing patches
== Progress ==
[TCWG-617] Upstreamed a patch to make copy relocations use synthetic
sections. This allows us to remove the output section relative dynamic
relocation which is important for range extension Thunks
Did some design work for range extension Thunks.
Did some refactoring to merge PLT and IFunc PLT at maintainers request
[BUD17]
Researched my forthcoming Connect presentation and wrote about 3/5 of the slides
== Plan ==
Finish Connect presentation early next week as I'll be on holiday the
week before Connect.
Start implementing range extension Thunks.
== Progress ==
* [ARM GlobalISel] Add support for fp arguments [TCWG-1029] [5/10]
- Committed support for single precision hard float and soft-fp ABIs
- Work in progress on supporting double precision
* Misc [5/10]
- Meetings, mailing lists, code reviews
- Reverted / fixed a few patches that broke the buildbots
- Tested and uploaded binaries for release candidate 2 on AArch64
== Plan ==
* More GlobalISel
Hi All,
I am working on log10/qsort benchmarks on ARM64 (ARMv8) processor,
I want to check if we have experience with these benchmarks.
Actually i am looking for a compiler version which gives best results with
these benchmarks and specific compiler optimization (in my case is see O3
gives best numbers) ?
I have tried GCC-4.9 and GCC-6.2 with log10 benchmark and my observations
are:
1) With gcc 4.9 - 140 us
2) With GCC 6.2 - 150 us
My compilation flags are "-O3 -ftree-vectorize -funroll-all-loops --param
max-inline-insns-auto=550 --param case-values-threshold=30
-falign-functions=32 -ftracer"
So it seems like gcc-6.2 is better, am i missing something, should i use
some better compiler flags?
Thanks
-Bharat
~ Progress ~
* AArch64 OpenOCD. [6/10]
Solder and desolder the JTAG joint on HiKey. Tried different JTAG
options, but still can't get OpenOCD working.
* Patches review. [3/10]
** ILP32 GDB. Help cavium to reduce fails from 500 to 70.
GDB patch is OK, but there are still some regressions on ilp32
vs. lp64 on aarch64. Steve is still investigating on them.
** SVE GDB. Remove MAX_REGISTER_SIZE. Look people tend to agree
the way removing MAX_REGISTER_SIZE. Looking forward to Alan's
patches :)
** Kernel awareness debugging. Reviewed the cover letter of IBM's
patches. Want to share the common kernel debugging part between
IBM and Linaro.
* Schengen visa. [1/10] Fill in more in application form. Document
preparation.
~ Plan ~
* Kernel awareness debugging. Continue reviewing IBM's patches, and
figure out how to share the code.
* Go to London for visa application on Friday.
--
Yao Qi
== Progress ==
o Linaro GCC/Validation (7/10)
* GCC 4.9 2017.01:
- prepared final release
* GCC 5.4 2017.01:
- sources and binaries ready to publish
* GCC 6.3 2017.02:
- Cherry-picked bug fix into release branch
- ready for RC2
* Lot of release notes iterations and discussions
* Backports reviews
* Tree reassociation: on-going
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Releases...
o Tree reassociation
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [9/10]
-- Wrote multi-threaded implementation of hardware breakpoints.
-- Added thread specific handlers to create hardware breakpoints.
-- Basic multi-threaded test application works after some fixes and debugging.
-- Committed fix for LLDB AArch64 android gcc build failure
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Write LLDB testsuite test cases for hardware breakpoints
-- Code clean-up and first version patch submission
-- Start work on Arm register context changes for hardware breakpoints.
== This Week ==
* TCWG-1006 (2/10)
- Created prototype patch for propagating returns_nonnull along the
same lines as malloc.
* TCWG-1010 (2/10)
- Continuing to work on prototype for bitwise dce
* ICE with __builtin_abs with -fgimple (2/10)
- Posted patch upstream
* Sick leave (2/10)
* Misc (2/10)
- Setting up docker on tcwg-ex40-01
- Meetings
== Next Week ==
- TCWG-1010, TCWG-548
The Linaro Binary Toolchain
============================
The Linaro GCC 6.3-2017.02-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02-rc1/http://snapshots.linaro.org/components/toolchain/binaries/6.3-2017.02-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.3-2017.02-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 7.12 (gdb-7.12-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for GCC 6 (as of Linaro GCC 6.3-2017.02-rc1)
==================================================
* The mingw toolchains are now archived using the rsync -L option in
order to avoid problems with Windows extractors and symbolic links.
https://review.linaro.org/#/c/16415/
This resolves the following user bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
* The soft-float targeted toolchains have now been configured to
generate code using -mfloat-abi=soft.
This makes arm-linux-gnueabi and armeb-linux-gnueabi toolchains use
the "soft" FP ABI instead of "softfp".
Historically, TCWG's toolchains provided both "soft" and "softfp"
multilibs, but when switching from crosstool-ng to cbuildv2/abe (which
support a single multilib) "softfp" multilib was choosen. Using
"-mfloat-abi=soft" is a better choice for a gnueabi toolchain, since
it doesn't require cores to have a floating-point unit.
This change should not break compatibility for toolchain users since
the ABI will stay the same. The compiler and glibc libraries will not
refernce FP instructions.
* Removed .la files from binary toolchain archive as these files break
autotools builds.
https://bugs.linaro.org/show_bug.cgi?id=2764
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M.
* The Linaro GCC 6.2-2016.12 snapshot added various AArch64 bugfixes and
optimizations.
* Backported glibc patch to simplify static malloc interposition [BZ
#20432] to correct user identified issue.
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 022bd2995640626d9efb6a839884c5e1c7c5e133
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 14:11:50 2016 +0200
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit 5357441171f2409fb759112bc6a00d3e672374d9
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 14:09:51 2016 +0200
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit f194ff4d5e1e304ac2a8d438d7abcbffd2dba757
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 14:05:23 2016 +0200
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit bda499cb9d2b97075f74df9bfb38b23ff4d12ac2
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 13:59:52 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, and Linaro GCC 6.3-2017.01.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Director - Linaro Core Technology and Tools
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
T: +1-612-424-1861
The Linaro Binary Toolchain
============================
The Linaro GCC 4.9-2017.01-rc1 Release-Candidate is now available.
This is a courtesy toolchain. The Linaro GCC 4.9 toolchain is officially
out of maintenance. This release is being provided in order to merge in
the last FSF GCC 4.9 branch changes into the Linaro GCC 4.9 release.
Notice: All Linaro GCC 4.9 series toolchain users should migrate to the
latest version of the Linaro GCC 4 toolchain in order to mitigate
potential security exposure to CVE-2015-7547. See the NEWS section
below for details.
Download release-candidate packages from:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2017.01-rc1/http://snapshots.linaro.org/components/toolchain/binaries/4.9-2017.01-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 4.9-2017.01-rc1
FSF eglibc 2.19 (linaro_eglibc-2_19)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.24 (linaro_binutils-2_24-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro toolchain package git branches are hosted at:
https://git.linaro.org/toolchain
NEWS for GCC 4.9 (as of Linaro GCC 4.9-2017.01-rc1)
==================================================
* The soft-float targeted toolchains have switched to -mfloat-abi=soft
from -mfloat-abi=softfp.
This makes arm-linux-gnueabi and armeb-linux-gnueabi toolchains use
“soft” FP ABI instead of “softfp”.
Historically, TCWG’s toolchains provided both “soft” and “softfp”
multilibs, but when switching from crosstool-ng to cbuildv2/abe (which
support a single multilib) “softfp” multilib was choosen. Using
“-mfloat-abi=soft” is a better choice for a gnueabi toolchain, since
it doesn’t require cores to have a floating-point unit.
This change should not break compatibility for toolchain users since
the ABI will stay the same. The compiler and glibc libraries will not
refernce FP instructions.
* Removed .la files from binary installation as these files break
autotools builds.
https://bugs.linaro.org/show_bug.cgi?id=2764
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 830M to 480M for
aarch64-linux-gnu target with the gcc-4.9-branch.
* The armv8l-linux-gnueabihf targetted toolchain is now built using
--with-mode=thumb (like all of the other cross toolchains) rather than
the default which is ARM mode.
* Applied fix for CVE-2015-7545 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
Linaro eglibc 2.19 (linaro_eglibc-2_19).
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* See the following Linaro GCC snapshot:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2015.10/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Director - Linaro Core Technology and Tools
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
o Teaching activity (4/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 2017.01:
- prepared source and binaries for RC1
- release notes to be finalized for publication
* GCC 5.4 2017.01
- Rebuilt binaries for the release
- Release notes almost completed
* Reviews
* Back to tree reassociation
o Misc (1/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 release
o Backports review
o Tree reassociation
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [6/10]
-- Fixed hardware breakpoints routines in LLDB AArch64 register context.
-- Code tweaks in NativeProcessLinux/NativeThreadLinux/ProcessGDBRemote
-- Hardware breakpoint working with single threaded applications
-- Submitted a fix for LLDB AArch64 android gcc build failure
-- Wrote single and multi threaded test applications for test hardware
breakpoints.
Monitor LLDB buildbot for minimum down time. [TCWG-712] [2/10]
-- Investigate random test failures on Arm and add them to flakey tests.
-- Buildbot down due to UPS failure
-- Got UPS fixed. Restart builders and testers.
Miscellaneous Activities [2/10]
-- Meetings, Emails etc.
-- Hungary visa passport collection
-- Background study about GDB Linux Kernel awareness
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Continue work on hardware breakpoint register context routines Arm/AArch64
-- Find a way to install hardware breakpoints on multiple threads.
# Progress #
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly.
Done. All patches are committed to mainline. [3/10]
* Patch reviews, a lot, [5/10]
** Hold one of ILP32 BFD patch because it may affect aarch64 GDB,
Reviewed ILP32 GDB patch, and convince them not to add new target
descriptions for ILP32, to make our life easier in the future.
Otherwise, we need two copies of target description for each new
hardware feature, such as v8.3, SVE, etc.
** Try to hold one disassembler options patch, which affects ARM and
GDB. Gave some comments on the interface design, but looks I am
late.
** Finish the review on DW_OP_implicit_value. Met some grey area in
DWARF spec.
* Atomicity of concurrent modification on ptrace. [1/10]
It is unclear weather debugging can modify memory for one thread while
other threads are running. After the discussions with some kernel guy,
PTRACE_POKETEXT is atomic, but GDB use it in a non-atomic way when
writing 2-byte aligned 32-bit thumb-2 instruction. Suggested a
workaround upstreams.
* Misc, meeting [1/10]
# Plan #
* ILP32 patch review.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
- LLD now uses synthetic sections for Thunks.
ARM Thunks now have symbols and mapping symbols.
As a side-effect we can now create local symbols in synthetic sections
so I've added them to the ARM PLT sections.
[Misc]
- Wrote 3 lines of lld 4.0 release notes for ARM
- Some upstream patch review in rtdyld and ilp32 support in the assembler
- Presented my personal Linaro objectives to the TCWG leads.
Plans for next week:
- Complete Fosdem presentation, will be leaving early Friday to catch
the Eurostar
- Respond to any post commit review comments on Thunks
- Start work on range extension thunks, the previous commits to use
synthetic sections were pre-requisites to range extension thunks, but
added little new user-visible functionality.
Planned absences:
- Fosdem 2017 will need to leave early on Friday 4th Feb
- Holiday 21st Feb to 1st March
- Linaro Connect 6th to 10th March Euro LLVM 27-28 March (Linaro's
request and cost-code)
== Progress ==
* National holiday on Tuesday [2/10]
* [AArch64] Investigate PR30225 [TCWG-1021] [2/10]
- This was a bug related to the code alignment factor for the debug frame
- Decided it was not a correctness issue and the size savings for
using a different factor are probably not noticeable in practice, so I
closed the bug
* [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980] [1/10]
- Committed all 3 patches upstream, reworked the third one a bit
* [ARM GlobalISel] Add support for pointers [TCWG-1028] [1/10]
- Started working on a patch
* Misc [4/10]
- Mailing list, code reviews, meetings
- Buildbots: reverted 2 sets of patches, noticed an issue with some
buildbots (which Renato ended up investigating)
- FOSDEM slides
== Plan ==
* [ARM GlobalISel] Add support for pointers [TCWG-1028]
=== This Week ===
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012] [4/10]
-- Capture tests leaving behind runaway processes, found 3 so far.
-- Capture random failures and mark them flakey.
ARM/AArch64 hardware breakpoints [TCWG-717] [5/10]
-- Code review and prepared debug environment
-- Looked into Android Arm64 build failure with debug info.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
ARM/AArch64 hardware breakpoints [TCWG-717]
-- Fix hardware breakpoints routines in LLDB AArch64 register context.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012]
-- Keep and eye on tests marked flakey or any new random failures.
o Teaching activity (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 snapshot:
- completed snapshot process
- waiting for linaro bug #1118 status before
releasing or re-spinning the snapshot.
https://bugs.linaro.org/show_bug.cgi?id=1118
* Made an published GCC 5.4 RC2, preparing the release
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 snapshot and binaries
o GCC 5.4 release
== This Week ==
* TCWG-1005 (malloc attr propagation) (4/10)
- Extended for pointer comparisons
- Patch review from Kugan
- Removed some cruft from the patch
* TCWG-1010 (bitwise dce propagation) (4/10)
- Started working on prototype
* Misc (2/10)
- Looked at Wheader-guard
- Building chromium with gcc
- Meetings
== Next Week ==
- TCWG-1005, TCWG-1010
~ Progress ~
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly. [3/10]
It is a blocker to 7.12.1 release. Fixed it in 7.12 branch.
Address comments and manage reviewer's expectations on the
patches for mainline.
* Approved two Alan's SVE GDB preparatory patches. [1/10]
* Reviewed Dave Martin's SVE user space VL control API. [1/10]
Can't figure out a case that debugger or debugger user wants to change VL.
* Review DWARF patch in big endian on DW_OP_implicit_value. [2/10]
Played with the patch, and use part of it in existing gdb tests.
Found other GDB bugs, and fixed them. Some readings on DWARF 5.
Will post my patches next week and continue reviewing the DWARF patch.
* Booked Hungary visa appointment.
* Training. [3/10]
~ Plan ~
* TCWG-984, GDB aborts if there is an error in disassembly.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
Started process of upstreaming the conversion of Thunks to SyntheticSections.
- Patch 1 of 3 committed, move Thunk Creation later in the link step.
- Patch 2 of 3 add support for local symbol creation in upstream review
- Patch 3 of 3 waiting for patch 2
Made a patch to output mapping symbols in PLT to test local symbol
creation. Not recommending this for inclusion in lld yet, but have
included as a way of testing 2.
Responded to comment on implementation and overall Thunks proposal.
Plans for next week:
Yet more range extension work, hope to get patches 2 and 3 above committed.
== Progress ==
* Out of office Mon-Wed [6/10]
* [ARM] Use AddDefaultPred everywhere [TCWG-987]
- Committed upstream
* LLVM AArch64 4.0.0 [ TCWG-1008] [1/10]
- Ran the tests for rc1, everything went smoothly
* [AArch64] Investigate PR30225 [TCWG-1021] [1/10]
- Someone noticed that llvm-mc is using a different code/data
alignment factor for the call frame information than gas, trying to
figure out if that would actually confuse a debugger
* Misc [2/10]
- Mailing lists, code reviews, meetings etc
=== This Week ===
Monitor LLDB buildbot for minimum down time. [TCWG-712] [1/10]
-- LLDB Arm build was broken and then fixed upstream but a buildbot script bug.
-- Fixed buildbot script to make sure not every type of build is
refreshed after a breakage.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012] [3/10]
-- Investigated and fixed TestRegisterVariables
(https://reviews.llvm.org/D28666)
-- Fixed a log issue which I initially thought was a bug.
(https://reviews.llvm.org/rL291889)
-- No further AArch64 failures except for one test timedout needs
further investigation.
-- Some tests fail randomly on AArch32 but pass when run individually.
More investigation needed.
LLDB Arm/AArch64 Investigate and fix testsuite crashes (Pine64
Crashes) [TCWG-792] [2/10]
-- There was some problem occuring when multiple versions of python
are installed on tester.
-- Also some tests are leaving behind runaway processes.
-- Cleaned up testers removed python issue ended up reducing test time
to 3 minutes.
-- Trying to track runaway processes.
Miscellaneous Activities [4/10]
-- Travel to Islamabad for Hungary visa interview (9th-10th Jan 2017).
-- Meetings, Emails etc.
=== Next Week ===
ARM/AArch64 hardware breakpoints [TCWG-717]
-- Investigate current status and create task breakdown.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012]
-- Further tracking on runaway processes when running AArch32 testsuite.
-- Investigation of timedout tests on AArch64.
o Teaching activity (4/10)
== Progress ==
o Linaro GCC/Validation (4/10)
* Merge FSF GCC 6 branch into Linaro one
* Backports reviews
* Delivered snapshot of 6.3-2017.01 source package
* Merge FSF 4.9 branch into Linaro one
o Misc (2/10)
* Various meetings and discussions.
== Plan ==
o Last GCC 4.9 snapshot
o GCC 5.4 release
[TCWG-614] Long branch thunks:
Implemented a prototype of the existing Thunk implementation using
Synthetic (Linker created sections) and moved it close to the area it
will need to go for Long Branch Thunk work.
Worked on this exclusively all week.
Plans for next week:
[TCWG-614] Long branch thunks:
Tidy up and refactor prototype to a point where I can post for
upstream review. This won't be long-branch thunk support but it will
be a significant intermediate step.
Do a draft plan of Connect submission and decide how long I need.
== Progress ==
* [ARM] Use AddDefaultPred everywhere [TCWG-987] [1/10]
- Proposed a refactoring first [TCWG-1015]
- Rebased initial patch after the refactoring, still waiting for review
* Refactor AddDefaultPred [TCWG-1015] [4/10]
- Initial implementation was a bit heavyweight, so I worked on a
simpler version based on people's suggestions
- Committed upstream
* Misc [5/10]
- Got up to speed after vacation
- Booked travel for Connect and EuroLLVM
- FOSDEM slides
- Upstream code reviews
- Reverted and ran pre-commit tests for some compiler-rt patches
that broke the buildbots
== Plan ==
* 3 days off (Mon-Wed)
* [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980]
- I have 3 patches in upstream review, I will keep pinging them
- Putting GlobalISel work on hold until these patches go through
~ Progress ~
* TCWG-984 Handle exception/error in disassembly, [4/10]
Patches are posted and reviewed. Three patches to opcodes
are approved and committed. V2 is done to address comments
on C++ and unit tests. V2 are being tested.
* Patches review, [4/10]
** Review some preparatory SVE patches from Alan.
They are good to me, but I expect Joel or someone else to take a look
as well.
** Linux kernel awareness debugging.
Review the patch sent from linaro, but some one from IBM sends
a similar patch series. These two patch sets look similar, but are
different on some parts.
* Conversation with Paul (openocd maintainer) on irc. [1/10]
They really want me to look at some gdb+openocd issues. My Hikey
will arrive soon, but they give me some explanations on why cortex-m
board is better than cortex-a board in bare-metal, because of
simplicity. I explained to them why Linaro focused on cortex-a
devices so far.
* Linaro Connect. [1/10]
Register the connect, book flight and hotel.
~ Plan ~
* TCWG-984 and TCWG-333
* Carefully read Dave M's SVE user space VL control API.
* Carefully read IBM's kernel debugging patches.
--
Yao Qi
== This Week ==
* TCWG-1005 (malloc attr propagation) (6/10)
- Worked through bootstrap failures
- Patch found 35 functions that could have malloc attribute during gcc build
- The current analysis to find candidate functions is too restrictive, working
on improving that.
- Wrote few test-cases.
* TCWG-1006 (returns_nonnull attr propagation) (2/10)
- WIP prototype patch
* TCWG-1010 (bitwise-dce) (1/10)
- Going thru demanded-bits analysis
* Misc (1/10)
- Meetings
== Next Week ==
- Continue working on TCWG-1005, TCWG-1006 and TCWG-1010