commit 97437be191a70c9550387d1472f3874fc4ed2844
Author: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date:   Fri Mar 3 19:11:05 2023 +0300

    test
    
    Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index dee860b92878..5a0ab1dbeb1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -708,7 +708,7 @@ &pmi8994_spmi_regulators {
 	vdd_gfx: s2@1700 {
 		reg = <0x1700 0x100>;
 		regulator-name = "VDD_GFX";
-		regulator-min-microvolt = <400000>;
+		regulator-min-microvolt = <980000>;
 		regulator-max-microvolt = <1015000>;
 	};
 };
@@ -1114,6 +1114,6 @@ &wcd9335 {
 };
 
 &cpr3_gfx {
-	status = "okay";
+	//status = "okay";
 	vdd-supply = <&vdd_gfx>;
 };
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 7c0ad3565cdc..856b5ce684d5 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1052,6 +1052,8 @@ mmcc: clock-controller@8c0000 {
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
 			reg = <0x008c0000 0x40000>;
+			power-domains = <&rpmpd MSM8996_VDDMX>;
+			required-opps = <&rpmpd_opp7>;
 			assigned-clocks = <&mmcc MMPLL9_PLL>,
 					  <&mmcc MMPLL1_PLL>,
 					  <&mmcc MMPLL3_PLL>,
@@ -1300,8 +1302,8 @@ gpu: gpu@b00000 {
 			interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>;
 			interconnect-names = "gfx-mem";
 
-			power-domains = <&mmcc GPU_GX_GDSC>, <&cpr3_gfx 0>, <&rpmpd MSM8996_VDDMX>;
-			power-domain-names = "gx", "cpr", "mx";
+			power-domains = <&mmcc GPU_GX_GDSC>;
+			power-domain-names = "gx";
 			iommus = <&adreno_smmu 0>;
 
 			nvmem-cells = <&speedbin_efuse>;
@@ -1328,38 +1330,33 @@ gpu_opp_table: opp-table {
 				opp-624000000 {
 					opp-hz = /bits/ 64 <624000000>;
 					opp-supported-hw = <0x09>;
-					required-opps = <&cpr3_gfx_opp7 &rpmpd_opp7>;
 				};
 				opp-560000000 {
 					opp-hz = /bits/ 64 <560000000>;
 					opp-supported-hw = <0x0d>;
-					required-opps = <&cpr3_gfx_opp6 &rpmpd_opp7>;
 				};
+/*
 				opp-510000000 {
 					opp-hz = /bits/ 64 <510000000>;
 					opp-supported-hw = <0xFF>;
-					required-opps = <&cpr3_gfx_opp5 &rpmpd_opp5>;
 				};
 				opp-401800000 {
 					opp-hz = /bits/ 64 <401800000>;
 					opp-supported-hw = <0xFF>;
-					required-opps = <&cpr3_gfx_opp4 &rpmpd_opp5>;
 				};
 				opp-315000000 {
 					opp-hz = /bits/ 64 <315000000>;
 					opp-supported-hw = <0xFF>;
-					required-opps = <&cpr3_gfx_opp3 &rpmpd_opp4>;
 				};
 				opp-214000000 {
 					opp-hz = /bits/ 64 <214000000>;
 					opp-supported-hw = <0xFF>;
-					required-opps = <&cpr3_gfx_opp2 &rpmpd_opp4>;
 				};
 				opp-133000000 {
 					opp-hz = /bits/ 64 <133000000>;
 					opp-supported-hw = <0xFF>;
-					required-opps = <&cpr3_gfx_opp1 &rpmpd_opp4>;
 				};
+*/
 			};
 
 			zap-shader {