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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz in repository toolchain/ci/binutils-gdb.
from 14f458590a arm: enable Cortex-A710 CPU adds 0c7af29227 Handle PIE in .debug_loclists adds 2ec453b566 Automatic date update in version.in adds 23ec4a527d sim: synacor: simplify test generation adds bebe33486c sim: testsuite: delete unused arm remote host logic adds 40f6466678 sim: io: tweak compiler workaround with error output adds f0f2906ca0 sim: cris: stop testing a.out explicitly [ld/13900] adds efe113047d sim: testsuite: drop sim_compile cover function adds f786c359c1 RISC-V: Dump objects according to the elf architecture attribute. adds 585d6e39eb [gdb/testsuite] Add gdb.arch/ppc64-break-on-_exit.exp adds b038b53f1f [gdb/build] Fix build with -std=c++11 adds fdf95218bc [gdb/build] Fix Wimplicit-exception-spec-mismatch in clang build adds 4d772ea24d gdb: fix "set scheduler-locking" thread exit hang adds d31028e8cc Automatic date update in version.in adds 0d64622696 Fix demangle style usage info adds be472decb2 Import Makefile.def from gcc adds 0b32f05bac Don't compile some opcodes files when bfd is 32-bit only adds 1f28b70def [gdb/testsuite] Fix regexp in gdb.base/foll-vfork.exp adds b626a80342 Fix gdb.base/sigstep.exp test for ppc adds b9252d079a Automatic date update in version.in adds dc5a462160 sim: sh: rework carry checks to not rely on integer overflows adds 35f7d33dd9 sim: sh: fix switch-bool warnings
No new revisions were added by this update.
Summary of changes: Makefile.def | 78 +- Makefile.in | 18200 +++++++++++++++---- bfd/elfnn-riscv.c | 27 +- bfd/elfxx-riscv.c | 69 +- bfd/elfxx-riscv.h | 8 +- bfd/version.h | 2 +- binutils/Makefile.am | 10 +- binutils/Makefile.in | 19 +- binutils/demanguse.c | 54 + binutils/demanguse.h | 34 + binutils/nm.c | 113 +- binutils/objdump.c | 8 +- binutils/po/POTFILES.in | 2 + binutils/readelf.c | 8 +- gas/config/tc-riscv.c | 110 +- gas/testsuite/gas/riscv/mapping-04b.d | 4 +- gas/testsuite/gas/riscv/mapping-norelax-03b.d | 2 +- gas/testsuite/gas/riscv/mapping-norelax-04b.d | 4 +- gdb/dwarf2/loc.c | 31 +- gdb/infrun.c | 3 +- gdb/testsuite/gdb.arch/ppc64-break-on-_exit-main.c | 27 + gdb/testsuite/gdb.arch/ppc64-break-on-_exit.c | 112 + gdb/testsuite/gdb.arch/ppc64-break-on-_exit.exp | 56 + gdb/testsuite/gdb.arch/ppc64-break-on-_exit.s | 108 + gdb/testsuite/gdb.base/foll-vfork.exp | 6 +- gdb/testsuite/gdb.base/sigstep.exp | 12 +- gdb/testsuite/gdb.threads/schedlock-thread-exit.c | 46 + .../gdb.threads/schedlock-thread-exit.exp | 42 + gdbsupport/new-op.cc | 9 +- opcodes/Makefile.am | 48 +- opcodes/Makefile.in | 48 +- opcodes/configure | 6 +- opcodes/configure.ac | 6 +- opcodes/disassemble.c | 22 +- opcodes/riscv-dis.c | 32 +- sim/common/sim-io.c | 6 +- sim/sh/gencode.c | 8 +- sim/sh/interp.c | 79 +- sim/testsuite/arm/allinsn.exp | 8 - sim/testsuite/arm/iwmmxt/iwmmxt.exp | 8 - sim/testsuite/arm/xscale/xscale.exp | 8 - sim/testsuite/cris/c/c.exp | 2 +- sim/testsuite/cris/c/helloaout.c | 14 - sim/testsuite/example-synacor/allinsn.exp | 4 + sim/testsuite/lib/sim-defs.exp | 20 - 45 files changed, 15250 insertions(+), 4273 deletions(-) create mode 100644 binutils/demanguse.c create mode 100644 binutils/demanguse.h create mode 100644 gdb/testsuite/gdb.arch/ppc64-break-on-_exit-main.c create mode 100644 gdb/testsuite/gdb.arch/ppc64-break-on-_exit.c create mode 100644 gdb/testsuite/gdb.arch/ppc64-break-on-_exit.exp create mode 100644 gdb/testsuite/gdb.arch/ppc64-break-on-_exit.s create mode 100644 gdb/testsuite/gdb.threads/schedlock-thread-exit.c create mode 100644 gdb/testsuite/gdb.threads/schedlock-thread-exit.exp delete mode 100644 sim/testsuite/cris/c/helloaout.c