[Tcwg-commits] [gcc] branch master updated (16c742e1079 -> 08a0b6dabd7)

6 Jun 2025


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from  16c742e1079 libgomp.c/target-map-zero-sized-3.c: Fix code for non-USM o [...]
       new  be205ec675e RISC-V: Combine vec_duplicate + vidvu.vv to vdivu.vx on GR2VR cost
       new  2ca7622fd7b RISC-V: Add test for vec_duplicate + vdivu.vv combine case  [...]
       new  c01830fa809 RISC-V: Add test for vec_duplicate + vdivu.vv combine case  [...]
       new  08a0b6dabd7 RISC-V: Reconcile the existing test for vdivu.vx combine
The 4 revisions listed above as "new" are entirely new to this
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Summary of changes:
 gcc/config/riscv/riscv-v.cc                        |   1 +
 gcc/config/riscv/riscv.cc                          |   1 +
 gcc/config/riscv/vector-iterators.md               |   2 +-
 .../riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c    |   4 +-
 .../riscv/rvv/autovec/binop/vdiv-rv32gcv.c         |   4 +-
 .../riscv/rvv/autovec/binop/vdiv-rv64gcv-nofm.c    |   4 +-
 .../riscv/rvv/autovec/binop/vdiv-rv64gcv.c         |   4 +-
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c   |   2 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h       | 196 +++++++++++++++++++++
 .../{vx_vdiv-run-1-i64.c => vx_vdiv-run-1-u16.c}   |   2 +-
 .../{vx_vdiv-run-1-i64.c => vx_vdiv-run-1-u32.c}   |   2 +-
 .../{vx_vdiv-run-1-i64.c => vx_vdiv-run-1-u64.c}   |   2 +-
 .../{vx_vdiv-run-1-i64.c => vx_vdiv-run-1-u8.c}    |   2 +-
 36 files changed, 259 insertions(+), 13 deletions(-)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vdiv-run-1-i64.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vdiv-run-1-i64.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vdiv-run-1-i64.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vdiv-run-1-i64.c => vx_v [...]
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[Tcwg-commits] [gcc] branch master updated (16c742e1079 -> 08a0b6dabd7)