This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/binutils-gdb.
from c0154a4a21 gdb: Don't assume r_ldsomap when r_version > 1 on Linux adds 5d9cff510e opcodes: Fix the auxiliary register numbers for ARC HS adds c316c0b29d gdb: fix thread_step_over_chain_length adds 8ae5245324 Automatic date update in version.in adds 9335d9f823 sim: rename ChangeLog files to ChangeLog-2021 adds 10d8e25c4d sim: nltvals: localize TARGET_<ERRNO> defines adds 9068c4a488 gdb: fix spacing on CCLD silent rules adds a3e8dd2ad3 Another ld script backtrack adds 89c905a342 [GOLD] PowerPC64 relocation overflow for -Os register save/r [...] adds a86733d63d Re: as: Replace the removed symbol with the versioned symbol new bc0df0fa47 [gdb] [rs6000] Add ppc64*_gnu_triplet_regexp methods. new 533f04079c [gdb] [rs6000] Add ppc64_linux_gcc_target_options method.
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: bfd/version.h | 2 +- gas/testsuite/gas/symver/symver16.d | 4 +- gdb/ppc-linux-tdep.c | 39 + gdb/silent-rules.mk | 2 +- gdb/thread.c | 2 +- gold/powerpc.cc | 2 + include/sim/{ChangeLog => ChangeLog-2021} | 0 ld/ldgram.y | 5 + opcodes/ChangeLog | 4 + opcodes/arc-regs.h | 4 +- sim/.gitignore | 2 + sim/{ChangeLog => ChangeLog-2021} | 0 sim/aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/arm/{ChangeLog => ChangeLog-2021} | 0 sim/avr/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/interp.c | 22 +- sim/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/common/{ChangeLog => ChangeLog-2021} | 0 sim/common/gentmap.c | 6 +- sim/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/cris/{ChangeLog => ChangeLog-2021} | 0 sim/d10v/{ChangeLog => ChangeLog-2021} | 0 sim/erc32/{ChangeLog => ChangeLog-2021} | 0 sim/example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/frv/{ChangeLog => ChangeLog-2021} | 0 sim/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/igen/{ChangeLog => ChangeLog-2021} | 0 sim/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/m32r/{ChangeLog => ChangeLog-2021} | 0 sim/m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/mcore/{ChangeLog => ChangeLog-2021} | 0 sim/microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/mips/{ChangeLog => ChangeLog-2021} | 0 sim/mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/ppc/{ChangeLog => ChangeLog-2021} | 2168 ++++++++++++++++++++ sim/ppc/ChangeLog.00 | 2168 -------------------- sim/pru/{ChangeLog => ChangeLog-2021} | 0 sim/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/rl78/{ChangeLog => ChangeLog-2021} | 0 sim/rx/{ChangeLog => ChangeLog-2021} | 0 sim/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/{ChangeLog => ChangeLog-2021} | 0 .../aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/arm/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/avr/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cris/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} | 0 .../example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/frv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} | 0 .../m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} | 0 .../microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mips/{ChangeLog => ChangeLog-2021} | 0 .../mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/pru/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/v850/{ChangeLog => ChangeLog-2021} | 0 sim/v850/{ChangeLog => ChangeLog-2021} | 0 78 files changed, 2238 insertions(+), 2192 deletions(-) rename include/sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/common/{ChangeLog => ChangeLog-2021} (100%) rename sim/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/erc32/{ChangeLog => ChangeLog-2021} (100%) rename sim/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/igen/{ChangeLog => ChangeLog-2021} (100%) rename sim/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/ppc/{ChangeLog => ChangeLog-2021} (67%) delete mode 100644 sim/ppc/ChangeLog.00 rename sim/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/rl78/{ChangeLog => ChangeLog-2021} (100%) rename sim/rx/{ChangeLog => ChangeLog-2021} (100%) rename sim/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/v850/{ChangeLog => ChangeLog-2021} (100%) rename sim/v850/{ChangeLog => ChangeLog-2021} (100%)