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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.
from 10357e1c89b [LoopUtils] Better accuracy for getLoopEstimatedTripCount. adds 952a540b219 [test] On Mac, don't try to use result of sysctl command if [...] adds cfe97681cdb [NFC][LoopUtils] Minor change in comment according to revie [...] adds 8cba99e2aa9 [ARM][MVE] Tail-Predication: rematerialise iteration count [...] adds 06e73f071ae [lldb/DWARF] Change how we construct a llvm::DWARFContext adds eaa45484590 [X86][SSE] Add PACKSS SimplifyMultipleUseDemandedBits 'sign [...] adds 61b56340801 [clangd] Remove a stale FIXME, NFC. adds 514e3c3694a Add missing tests for parent traversal adds 122443a9505 Compare traversal for memoization before bound nodes container adds 1f946ee2fab [clang][CodeComplete] Propogate printing policy to FunctionDecl adds af7e1588727 [LV] Vectorizer should adjust trip count in profile information adds 8248190a730 Fix clang-formatting for recent commits adds b7af1bfa6e3 [lldb/DWARF] Simplify DWARFDebugInfoEntry::LookupAddress adds 39f1335486e Make SymbolFileDWARF::ParseLineTable use std::sort instead [...] adds 9a3ff478235 Fix the invisible-traversal to ignore more nodes adds 27df2d9f556 [lldb] Don't process symlinks deep inside DWARFUnit adds 468ca490c60 [lldb] Allow loading of minidumps with no process id adds 7e717b39905 [AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm adds 8b2eb7c494b [mlir] Add in-dialect lowering of gpu.all_reduce. adds 01bfb366acf [llvm-profdata] Fix hint message since argument format has changed adds f3e73e88fdd [ARM,MVE] Fix confusing MC names for MVE VMINA/VMAXA insns. adds f63f5a228f3 [mlir] clarify LangRef wording around control flow in regions adds 22447a61d40 [lldb] Mark the implicit copy constructor as deleted when a [...] adds de34b54edce [SCEV] Swap guards estimation sequence. NFC adds da9c93f330e [InstSimplify] fold select of vector constants that include [...] adds 65bab53afb8 [lldb][NFC] Add test for iterator invalidation during code [...] adds 5f6dfa800e0 [ms] [llvm-ml] Add placeholder for llvm-ml, based on llvm-mc adds b10a0eb04ad [ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ int [...] adds 46b9563cf68 [Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemCpy adds 03c2a59cd69 [libomptarget] Implement smid for amdgcn adds 6ccebe00444 Fix build - removing legacy target reference. adds 24b7b99b7d6 [llvm-exegesis][NFC] Disassociate snippet generators from b [...] adds 9ecfaad7573 [gn build] Port 24b7b99b7d6 adds 7bee94410ce [InstCombine] form copysign from select of FP constants (PR44153) adds abd0ab389ee [FileCheck] Clean and improve unit tests adds 7fee4fed4c7 Add support for Linux/Musl ABI adds 3de9a5db629 [clangd] Avoid redundant testcases in rename unittest, NFC. adds 4c9d6914453 clang-format: [JS] fix `??` opreator wrapping. adds 366356361cf [OPENMP]Fix PR44578: crash in target construct with capture [...] adds a81e0442bdb [FileCheck] Make Match unittest more flexible adds 9c06c10fbae [SelectionDAG] GetDemandedBits - fallback to SimplifyMultip [...] adds a42c3eb599c [clang-tidy] Add check for CERT-OOP57-CPP adds 0a71ac8494d [gn build] Port a42c3eb599c adds b37f6d3af10 [llvm-exegesis] Remove unused variable after D72928 adds 67420f1b0e9 [lldb/Util] Add a utility to run transparently capture and [...] adds a17ad3592ff [lldb/Test] Check that attribute exists before comparing its value adds ea99c099634 [OpenMP] affinity little fix for FreeBSD adds 04de24e690d [lldb/IOHandler] Improve synchronization between IO handlers. adds fb3d9153c01 [clangd] Fix DocumentOutline for concepts adds d053b7a2978 [lldb/Docs] Add lldb-x86_64-fedora to the CI page adds f6418d72f57 AMDGPU/GlobalISel: Add documentation for RegisterBankInfo adds b70e4efb75b [mlir] Generalize broadcastable trait operands adds 2e42cc7a50e [NFC] small rename of private member in InlineCost.cpp adds fdb9cc7dc56 Fix printer for llvm.addressof symbol name that need escaping adds c12a5917d2f [Hexagon] Add support for Hexagon/HVX v67 ISA adds 8615eeb4556 AMDGPU: Partially merge indirect register write handling adds 9b13b4a0e3a AMDGPU: Prepare to use scalar register indexing adds 317fdcd09ae AMDGPU: Cleanup and generate 64-bit div tests adds c81fe34718d [lld][ELF] Don't apply --fix-cortex-a53-843419 to relocatab [...] adds d232c215669 [AsmPrinter] Don't emit __patchable_function_entries entry [...] adds edd4398f4cd Revert "PR17164: Change clang's default behavior from -flax [...] adds e5823bf806c AMDGPU: Don't create weird sized integers adds 385fb337de9 AMDGPU: Generate test checks adds fa40b41168f Revert "[libc++] Optimize / partially inline basic_string c [...] adds d1da63664f4 [lld][RISCV] Print error when encountering R_RISCV_ALIGN adds e446322f73f [llvm-objcopy][ELF] Allow setting SHF_EXCLUDE flag for ELF [...] adds c72aa27f917 AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live adds 38bdb94120b [clangd] Fix rename for explicit destructor calls adds b16f82ad3b0 Revert "[MachO] Add a test for detecting reserved unit length." adds 5721483b642 [AMDGPU] Fix -Wunused-variable after e5823bf806ca9fa6f87583 [...] adds 02c1321139d [MC] Improve a report_fatal_error adds e15fb06e2d0 [RISCV] Pass target-abi via module flag metadata adds a80291ce10b Revert "[AMDGPU] Invert the handling of skip insertion." adds 65f6ee618e7 [gn build] Port a80291ce10b adds fffea2842d2 [MLIR] LLVM Dialect: add llvm.cmpxchg and improve llvm.atom [...] adds ff9877ce34b [ARM][MVE] Enable masked scatter adds 6b4f86f65f1 Reapply: [MachO] Add a test for detecting reserved unit length. adds dbd0ad33668 [LLD][ELF] Add support for INPUT_SECTION_FLAGS adds a672f579a2f Regenerate rotated uxt tests adds 8d2e6bdbe14 [TargetLowering] SimplifyDemandedBits - Pull out InDemanded [...] adds d6f4cfdbd79 [llvm-exegesis] Add support for AVX512 explicit rounding operands. adds 5f5f4785648 [DAG] Fold extract_vector_elt (scalar_to_vector), K to unde [...]
No new revisions were added by this update.
Summary of changes: .../clang-tidy/cert/CERTTidyModule.cpp | 3 + clang-tools-extra/clang-tidy/cert/CMakeLists.txt | 1 + .../cert/NonTrivialTypesLibcMemoryCallsCheck.cpp | 152 + .../cert/NonTrivialTypesLibcMemoryCallsCheck.h | 41 + clang-tools-extra/clangd/FindSymbols.cpp | 7 +- clang-tools-extra/clangd/FindTarget.cpp | 4 + clang-tools-extra/clangd/refactor/Rename.cpp | 4 +- .../clangd/unittests/CodeCompleteTests.cpp | 9 + .../clangd/unittests/FindSymbolsTests.cpp | 9 + .../clangd/unittests/FindTargetTests.cpp | 50 + clang-tools-extra/clangd/unittests/RenameTests.cpp | 64 +- clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../docs/clang-tidy/checks/cert-oop57-cpp.rst | 40 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../test/clang-tidy/checkers/cert-oop57-cpp.cpp | 90 + clang/docs/CommandGuide/clang.rst | 11 +- clang/include/clang/Basic/BuiltinsHexagon.def | 10 +- clang/include/clang/Basic/BuiltinsHexagonDep.def | 31 + clang/include/clang/Basic/LangOptions.def | 2 +- clang/include/clang/Basic/arm_mve.td | 6 +- clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Sema/Sema.h | 3 +- clang/lib/AST/Expr.cpp | 9 +- clang/lib/ASTMatchers/ASTMatchFinder.cpp | 6 +- clang/lib/Basic/Targets/Hexagon.cpp | 28 +- clang/lib/Basic/Targets/Hexagon.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 7 + clang/lib/Format/FormatTokenLexer.cpp | 5 +- clang/lib/Sema/SemaCodeComplete.cpp | 8 +- clang/lib/Sema/SemaExpr.cpp | 6 +- clang/lib/Sema/SemaOpenMP.cpp | 28 +- clang/test/CodeCompletion/ctor-signature.cpp | 17 + clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c | 14 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c | 14 +- clang/test/CodeGen/builtins-hexagon-v67-audio.c | 134 + clang/test/CodeGen/builtins-hexagon-v67.c | 50 + clang/test/CodeGen/riscv-metadata.c | 14 + clang/test/Driver/hexagon-toolchain-elf.c | 8 + clang/test/Headers/altivec-header.c | 2 +- clang/test/Headers/arm-neon-header.c | 2 +- clang/test/Headers/x86-intrinsics-headers.c | 2 +- clang/test/Headers/x86intrin-2.c | 4 +- clang/test/Headers/x86intrin.c | 2 +- clang/test/OpenMP/target_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_messages.cpp | 8 + .../test/OpenMP/target_parallel_depend_codegen.cpp | 4 +- .../OpenMP/target_parallel_for_depend_codegen.cpp | 4 +- .../target_parallel_for_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_teams_depend_codegen.cpp | 4 +- .../target_teams_distribute_depend_codegen.cpp | 4 +- ...eams_distribute_parallel_for_depend_codegen.cpp | 4 +- ...distribute_parallel_for_simd_depend_codegen.cpp | 4 +- ...target_teams_distribute_simd_depend_codegen.cpp | 4 +- clang/test/Preprocessor/hexagon-predefines.c | 10 + clang/test/Sema/vector-assign.c | 12 +- clang/test/Sema/vector-cast.c | 23 +- clang/test/Sema/vector-ops.c | 3 +- clang/unittests/AST/ASTTraverserTest.cpp | 85 +- .../ASTMatchers/ASTMatchersTraversalTest.cpp | 73 + clang/unittests/Format/FormatTestJS.cpp | 5 + libcxx/include/string | 21 +- lld/ELF/Arch/RISCV.cpp | 9 +- lld/ELF/Driver.cpp | 3 +- lld/ELF/LinkerScript.cpp | 9 +- lld/ELF/LinkerScript.h | 10 +- lld/ELF/ScriptParser.cpp | 97 +- lld/test/ELF/aarch64-cortex-a53-843419-recognize.s | 8 + lld/test/ELF/input-section-flags-diag1.test | 13 + lld/test/ELF/input-section-flags-diag2.test | 13 + lld/test/ELF/input-section-flags-diag3.test | 13 + lld/test/ELF/input-section-flags-keep.s | 27 + lld/test/ELF/input-section-flags.s | 115 + lld/test/ELF/riscv-reloc-align.s | 12 + .../MachOTests/MachONormalizedFileToAtomsTests.cpp | 7 +- lldb/docs/resources/bots.rst | 1 + lldb/include/lldb/Core/Debugger.h | 2 + lldb/include/lldb/Core/Module.h | 9 +- lldb/include/lldb/Core/ModuleList.h | 8 + lldb/include/lldb/Symbol/LineTable.h | 11 +- .../completion-crash-invalid-iterator}/Makefile | 0 .../TestInvalidIteratorCompletionCrash.py | 21 + .../completion-crash-invalid-iterator/main.cpp | 22 + .../completion-crash1/TestCompletionCrash1.py | 4 - .../commands/expression/completion-crash1/main.cpp | 12 - .../TestDeletingImplicitCopyConstructor.py} | 0 .../deleting-implicit-copy-constructor/main.cpp | 20 + .../breakpoint_callback_command_source}/Makefile | 0 .../TestBreakpointCallbackCommandSource.py | 35 + .../breakpoint_callback_command_source/main.c | 4 + .../breakpoint_callback_command_source/source.lldb | 1 + .../comp_dir_symlink/TestCompDirSymLink.py | 21 +- lldb/source/Core/CoreProperties.td | 4 + lldb/source/Core/Debugger.cpp | 73 +- lldb/source/Core/ModuleList.cpp | 25 + .../Clang/ClangExpressionParser.cpp | 2 +- .../Clang/ClangModulesDeclVendor.cpp | 2 +- .../Plugins/Process/minidump/ProcessMinidump.cpp | 6 +- .../Plugins/SymbolFile/DWARF/DWARFContext.cpp | 25 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp | 71 +- .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 203 - .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 4 - lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 21 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 26 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 2 - .../SymbolFile/DWARF/SymbolFileDWARFProperties.td | 4 - lldb/source/Symbol/ClangASTContext.cpp | 13 + lldb/source/Symbol/LineTable.cpp | 18 + lldb/test/Shell/Minidump/no-process-id.yaml | 38 + lldb/test/Shell/Reproducer/lit.local.cfg | 4 + .../SymbolFile/DWARF/debug-names-compressed.cpp | 7 +- lldb/test/Shell/helper/toolchain.py | 22 +- lldb/test/Shell/lit.cfg.py | 12 +- lldb/unittests/Symbol/TestClangASTContext.cpp | 86 + lldb/utils/CMakeLists.txt | 1 + lldb/utils/lldb-repro/CMakeLists.txt | 4 + lldb/utils/lldb-repro/lldb-repro.py | 60 + llvm/docs/CommandGuide/llvm-objcopy.rst | 1 + llvm/include/llvm/BinaryFormat/ELF.h | 20 +- llvm/include/llvm/IR/IRBuilder.h | 40 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 42 +- llvm/include/llvm/IR/IntrinsicsHexagonDep.td | 86 + llvm/include/llvm/Transforms/Utils/LoopUtils.h | 33 +- llvm/lib/Analysis/InlineCost.cpp | 11 +- llvm/lib/Analysis/InstructionSimplify.cpp | 28 + llvm/lib/Analysis/ScalarEvolution.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 +- llvm/lib/IR/IRBuilder.cpp | 2 +- llvm/lib/MC/ELFObjectWriter.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 57 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 14 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 63 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 - llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 67 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 62 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 10 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 158 - llvm/lib/Target/AMDGPU/SOPInstructions.td | 15 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 20 - llvm/lib/Target/ARM/ARMInstrMVE.td | 15 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 4 +- llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 198 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 49 +- .../Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 3 + llvm/lib/Target/Hexagon/Hexagon.td | 20 + llvm/lib/Target/Hexagon/HexagonArch.h | 37 + llvm/lib/Target/Hexagon/HexagonDepArch.h | 38 +- llvm/lib/Target/Hexagon/HexagonDepArch.td | 24 +- llvm/lib/Target/Hexagon/HexagonDepDecoders.inc | 44 +- llvm/lib/Target/Hexagon/HexagonDepIICHVX.td | 493 +- llvm/lib/Target/Hexagon/HexagonDepIICScalar.td | 7439 +++++++++++++------- llvm/lib/Target/Hexagon/HexagonDepITypes.h | 87 +- llvm/lib/Target/Hexagon/HexagonDepITypes.td | 87 +- llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td | 6145 +++++++++------- llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td | 6023 ++++++++++------ llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 59 + llvm/lib/Target/Hexagon/HexagonDepMappings.td | 11 +- llvm/lib/Target/Hexagon/HexagonDepMask.h | 2821 ++++++++ llvm/lib/Target/Hexagon/HexagonDepOperands.td | 188 +- llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h | 200 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 181 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 159 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 + llvm/lib/Target/Hexagon/HexagonInstrFormats.td | 103 +- llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td | 86 - .../Target/Hexagon/HexagonMachineFunctionInfo.h | 12 + llvm/lib/Target/Hexagon/HexagonPatterns.td | 30 +- llvm/lib/Target/Hexagon/HexagonPseudo.td | 12 +- llvm/lib/Target/Hexagon/HexagonSchedule.td | 25 +- llvm/lib/Target/Hexagon/HexagonScheduleV67.td | 39 + llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 20 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 25 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 + .../Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 8 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 65 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 11 + .../Transforms/InstCombine/InstCombineSelect.cpp | 45 + llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 11 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 93 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 13 + llvm/test/CMakeLists.txt | 1 + .../AArch64/patchable-function-entry-bti.ll | 13 +- .../CodeGen/AArch64/patchable-function-entry.ll | 27 +- .../AArch64/sve-gather-scatter-dag-combine.ll | 20 +- ...trinsics-gather-loads-vector-base-imm-offset.ll | 368 + ...nsics-gather-loads-vector-base-scalar-offset.ll | 186 + .../sve-intrinsics-gather-loads-vector-base.ll | 186 - ...insics-scatter-stores-vector-base-imm-offset.ll | 255 + ...ics-scatter-stores-vector-base-scalar-offset.ll | 133 + .../sve-intrinsics-scatter-stores-vector-base.ll | 133 - .../AMDGPU/GlobalISel/divergent-control-flow.ll | 11 +- .../GlobalISel/regbankselect-amdgcn.ps.live.mir | 17 + .../AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll | 3227 +++++---- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 104 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 312 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 5 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 9 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 9 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 49 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 15 +- llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll | 8 +- llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll | 2 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 21 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 11 +- llvm/test/CodeGen/AMDGPU/else.ll | 3 +- llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- .../test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir | 2 +- llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-ignored-insts.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-kill-uncond.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 29 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 6 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 3 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 23 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 1165 +++ .../AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} | 56 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll | 2 + .../si-lower-control-flow-unreachable-block.ll | 10 +- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 2 +- .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir | 2 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 7 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 13 +- llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 1232 ++++ .../stack-pointer-offset-relative-frameindex.ll | 3 +- .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 5 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 1201 ++++ .../AMDGPU/{udivrem64.ll => udivrem64.r600.ll} | 64 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 2 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 2 + llvm/test/CodeGen/AMDGPU/urem64.ll | 978 +++ llvm/test/CodeGen/AMDGPU/valu-i1.ll | 42 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 5 +- llvm/test/CodeGen/ARM/uxt_rot.ll | 129 +- llvm/test/CodeGen/Hexagon/df-min-max.ll | 67 + llvm/test/CodeGen/Hexagon/fminmax-v67.ll | 45 + llvm/test/CodeGen/Hexagon/fmul-v67.ll | 52 + llvm/test/CodeGen/Hexagon/intrinsics-v67.ll | 285 + llvm/test/CodeGen/Hexagon/swp-sigma.ll | 3 +- llvm/test/CodeGen/Hexagon/vacopy.ll | 39 + llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll | 13 + llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll | 93 + llvm/test/CodeGen/Hexagon/vararg.ll | 97 + llvm/test/CodeGen/Hexagon/vararg_align_check.ll | 186 + llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll | 214 + llvm/test/CodeGen/Hexagon/vararg_named.ll | 211 + .../cond-vector-reduce-mve-codegen.ll | 103 +- .../Thumb2/LowOverheadLoops/fast-fp-loops.ll | 3 +- .../Thumb2/LowOverheadLoops/mve-tail-data-types.ll | 35 +- .../LowOverheadLoops/vector-arith-codegen.ll | 33 +- .../LowOverheadLoops/vector-reduce-mve-tail.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll | 55 +- .../test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll | 14 +- .../test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll | 14 +- .../CodeGen/Thumb2/mve-scatter-ind16-scaled.ll | 181 + .../CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll | 460 ++ .../CodeGen/Thumb2/mve-scatter-ind32-scaled.ll | 240 + .../CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll | 419 ++ .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll | 540 ++ llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll | 633 ++ llvm/test/CodeGen/X86/patchable-function-entry.ll | 33 +- llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 13 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 140 +- .../X86/vector-constrained-fp-intrinsics.ll | 13 +- llvm/test/MC/Hexagon/extensions/v67_hvx.s | 2810 ++++++++ llvm/test/MC/Hexagon/v67.s | 4 + llvm/test/MC/Hexagon/v67_all.s | 10 + llvm/test/Transforms/InstCombine/select.ll | 24 +- llvm/test/Transforms/InstSimplify/select.ll | 9 +- .../Transforms/LoopVectorize/check-prof-info.ll | 96 + llvm/test/Transforms/LoopVectorize/tripcount.ll | 15 +- llvm/test/lit.cfg.py | 21 +- llvm/test/tools/llvm-ml/basic.test | 4 + llvm/test/tools/llvm-ml/run.test | 3 + .../ELF/rename-section-flag-osproc-mask.test | 2 - .../ELF/rename-section-flag-preserved.test | 6 +- .../llvm-objcopy/ELF/rename-section-flag.test | 7 +- .../tools/llvm-objcopy/ELF/set-section-flags.test | 8 +- .../tools/llvm-profdata/text-format-errors.test | 2 +- llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 1 - llvm/tools/llvm-exegesis/lib/Analysis.cpp | 8 +- llvm/tools/llvm-exegesis/lib/CMakeLists.txt | 6 +- .../llvm-exegesis/lib/LatencyBenchmarkRunner.cpp | 56 + .../lib/{Latency.h => LatencyBenchmarkRunner.h} | 15 +- llvm/tools/llvm-exegesis/lib/Mips/Target.cpp | 2 +- .../lib/{Uops.cpp => ParallelSnippetGenerator.cpp} | 48 +- .../lib/{Uops.h => ParallelSnippetGenerator.h} | 28 +- llvm/tools/llvm-exegesis/lib/PowerPC/Target.cpp | 1 - .../{Latency.cpp => SerialSnippetGenerator.cpp} | 58 +- .../lib/{Latency.h => SerialSnippetGenerator.h} | 25 +- llvm/tools/llvm-exegesis/lib/Target.cpp | 18 +- llvm/tools/llvm-exegesis/lib/Target.h | 4 +- .../llvm-exegesis/lib/UopsBenchmarkRunner.cpp | 46 + llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h | 38 + llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 32 +- llvm/tools/llvm-ml/CMakeLists.txt | 14 + llvm/tools/llvm-ml/Disassembler.cpp | 203 + llvm/tools/llvm-ml/Disassembler.h | 37 + llvm/tools/llvm-ml/llvm-ml.cpp | 381 + llvm/tools/llvm-objcopy/CopyConfig.cpp | 5 +- llvm/tools/llvm-objcopy/CopyConfig.h | 3 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 11 +- llvm/tools/llvm-profdata/llvm-profdata.cpp | 4 +- llvm/unittests/Support/FileCheckTest.cpp | 209 +- .../llvm-exegesis/Mips/SnippetGeneratorTest.cpp | 23 +- .../llvm-exegesis/X86/SnippetGeneratorTest.cpp | 52 +- .../llvm-exegesis/X86/SnippetRepetitorTest.cpp | 5 +- llvm/unittests/tools/llvm-exegesis/X86/TestBase.h | 2 +- .../clang-tools-extra/clang-tidy/cert/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 - llvm/utils/gn/secondary/llvm/test/BUILD.gn | 1 + .../llvm/tools/llvm-exegesis/lib/BUILD.gn | 6 +- .../utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn | 15 + mlir/docs/LangRef.md | 14 +- mlir/docs/Traits.md | 14 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 10 + mlir/include/mlir/Dialect/GPU/Passes.h | 6 + mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 15 + mlir/include/mlir/Dialect/Traits.h | 31 +- mlir/include/mlir/IR/Block.h | 3 + mlir/include/mlir/IR/OpBase.td | 5 +- mlir/lib/Dialect/GPU/CMakeLists.txt | 1 + .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 373 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 197 +- mlir/lib/Dialect/Traits.cpp | 127 +- mlir/lib/IR/Block.cpp | 7 + mlir/test/Dialect/GPU/all-reduce.mlir | 183 + mlir/test/Dialect/LLVMIR/global.mlir | 8 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 82 +- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 15 +- mlir/test/Dialect/traits.mlir | 8 +- mlir/test/Target/llvmir.mlir | 45 +- mlir/test/lib/TestDialect/TestOps.td | 4 +- mlir/test/lib/Transforms/CMakeLists.txt | 2 + mlir/test/lib/Transforms/TestAllReduceLowering.cpp | 32 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt | 1 + .../deviceRTLs/amdgcn/src/amdgcn_smid.hip | 61 + openmp/runtime/src/kmp_affinity.h | 6 +- openmp/runtime/src/z_Linux_util.cpp | 4 +- 355 files changed, 36596 insertions(+), 11613 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCall [...] create mode 100644 clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCall [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst create mode 100644 clang-tools-extra/test/clang-tidy/checkers/cert-oop57-cpp.cpp create mode 100644 clang/test/CodeCompletion/ctor-signature.cpp create mode 100644 clang/test/CodeGen/builtins-hexagon-v67-audio.c create mode 100644 clang/test/CodeGen/builtins-hexagon-v67.c create mode 100644 clang/test/CodeGen/riscv-metadata.c create mode 100644 lld/test/ELF/input-section-flags-diag1.test create mode 100644 lld/test/ELF/input-section-flags-diag2.test create mode 100644 lld/test/ELF/input-section-flags-diag3.test create mode 100644 lld/test/ELF/input-section-flags-keep.s create mode 100644 lld/test/ELF/input-section-flags.s create mode 100644 lld/test/ELF/riscv-reloc-align.s copy lldb/packages/Python/lldbsuite/test/{android/platform => commands/expression/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] copy lldb/packages/Python/lldbsuite/test/commands/{source/info/TestSourceInfo.py = [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/deletin [...] copy lldb/packages/Python/lldbsuite/test/{commands/expression/entry-bp => function [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/test/Shell/Minidump/no-process-id.yaml create mode 100644 lldb/utils/lldb-repro/CMakeLists.txt create mode 100755 lldb/utils/lldb-repro/lldb-repro.py delete mode 100644 llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp create mode 100644 llvm/lib/Target/Hexagon/HexagonArch.h create mode 100644 llvm/lib/Target/Hexagon/HexagonDepMask.h delete mode 100644 llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td create mode 100644 llvm/lib/Target/Hexagon/HexagonScheduleV67.td create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-ba [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-ba [...] delete mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector- [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector- [...] delete mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir create mode 100644 llvm/test/CodeGen/AMDGPU/sdiv64.ll rename llvm/test/CodeGen/AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} (62%) create mode 100644 llvm/test/CodeGen/AMDGPU/srem64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/udiv64.ll rename llvm/test/CodeGen/AMDGPU/{udivrem64.ll => udivrem64.r600.ll} (58%) create mode 100644 llvm/test/CodeGen/AMDGPU/urem64.ll create mode 100644 llvm/test/CodeGen/Hexagon/df-min-max.ll create mode 100644 llvm/test/CodeGen/Hexagon/fminmax-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/fmul-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/intrinsics-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/vacopy.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_align_check.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_named.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-scaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-scaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll create mode 100644 llvm/test/MC/Hexagon/extensions/v67_hvx.s create mode 100644 llvm/test/MC/Hexagon/v67.s create mode 100644 llvm/test/MC/Hexagon/v67_all.s create mode 100644 llvm/test/Transforms/LoopVectorize/check-prof-info.ll create mode 100644 llvm/test/tools/llvm-ml/basic.test create mode 100644 llvm/test/tools/llvm-ml/run.test create mode 100644 llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp copy llvm/tools/llvm-exegesis/lib/{Latency.h => LatencyBenchmarkRunner.h} (69%) rename llvm/tools/llvm-exegesis/lib/{Uops.cpp => ParallelSnippetGenerator.cpp} (82%) rename llvm/tools/llvm-exegesis/lib/{Uops.h => ParallelSnippetGenerator.h} (70%) rename llvm/tools/llvm-exegesis/lib/{Latency.cpp => SerialSnippetGenerator.cpp} (76%) rename llvm/tools/llvm-exegesis/lib/{Latency.h => SerialSnippetGenerator.h} (52%) create mode 100644 llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.cpp create mode 100644 llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h create mode 100644 llvm/tools/llvm-ml/CMakeLists.txt create mode 100644 llvm/tools/llvm-ml/Disassembler.cpp create mode 100644 llvm/tools/llvm-ml/Disassembler.h create mode 100644 llvm/tools/llvm-ml/llvm-ml.cpp create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn create mode 100644 mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp create mode 100644 mlir/test/Dialect/GPU/all-reduce.mlir create mode 100644 mlir/test/lib/Transforms/TestAllReduceLowering.cpp create mode 100644 openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip