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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz in repository toolchain/ci/llvm-project.
from 3624c4d84500 [libc++] Adds (to|from)_chars_result operator==. adds ed86610c7bcd [libc++][nfc] Move functions to a generic place. adds 6774cc33f75f [NFC][llvm] Inclusive language: remove instance of master [...] adds ffe1741b5cca [DSE] Add additional strncpy tests. adds 86e77cdb081f [PowerPC] Add a flag for conditional trap optimization adds 4b3518d50b30 [RISCV] Pre-commit test for D98932. NFC adds af57a71d1871 [RISCV] Don't call setHasMultipleConditionRegisters(), so [...] adds 28000587e1a4 [SCEV] Revert two speculative compile time optimizations w [...] adds f3b7cc8bb2ea [lldb/test] Add ability to terminate connection from a gdb [...] adds d9bbad277c44 [libc][Obvious][NFC] A bunch of cosmetic cleanup. adds 587a397917b2 Skip tests when compiler with older versions of clang adds f849640a0c6c [MLIR] Make the ROCM integration tests runnable adds 76effb001d33 [LV] Remove obsolete comment about creating a dummy block (NFC) adds d448fcd9b223 [analyzer][NFC] Introduce CallDescriptionSets adds 6c512703a9e6 [analyzer][NFC] Introduce CallDescription::matches() in ad [...] adds f18da190b0db [analyzer][NFC] Switch to using CallDescription::matches() [...] adds 9ad0a90baa8c [analyzer][NFC] Demonstrate the use of CallDescriptionSet adds de9d7e42aca2 [analyzer][NFC] CallDescription should own the qualified n [...] adds 97f1bf15b154 [analyzer][NFC] Consolidate the inner representation of Ca [...] adds e6ef134f3c77 [analyzer][NFC] Use enum for CallDescription flags adds d5de568cc737 [analyzer][NFC] MaybeUInt -> MaybeCount adds 7eec832def57 [DSE] Improve handling of `strncpy` in Dead Store Elimination adds ffdace4892bd [SROA] Add new test cases to cover existing SROA behavior [...] adds 06dbb2856967 [mlir][vector] Remove usage of shapecast to remove unit dim adds 7cde5165131f [mlir][vector] NFC, move some vector patterns in a separate file adds 9cdaf0b01b29 [openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info i [...] adds 2997441b85c0 [ELF] Support discarding .got.plt adds ff7f2cfa959b [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indire [...] adds 47555d73f653 [mlir][gpu] Extend shuffle op modes and add nvvm lowering adds bd22554af06e [MLIR][GPU] Run generic LLVM optimizations when serializin [...] adds 1b4c0cb3918a [libc++] Avoid potential truncation warnings in std::abs test adds e1ce3dabf0c7 [libc++] Fix some tests that were broken in the single-thr [...] adds e0f58444e126 [libc++] Fix feature test macro for __cpp_lib_to_chars adds d8e5a0c42bd8 [clang][NFC] Inclusive terms: replace some uses of sanity [...] adds b07b5bd72716 [libc++] Test that our algorithms never copy a user-provid [...] adds 04954824ee15 [openmp][amdgpu][nfc] Simplify implicit args handling adds 3f3680dff3e7 DWARFVerifier: Simplify name lookups adds 3fcdd182e978 NFC: Callout restriction on folding 0-result ops in docume [...] adds 20f79f8caa3a [MLIR][GPU] Make the path to ROCm a runtime option adds 290cddcd139d Allow __attribute__((swift_attr)) in attribute push pragmas adds e059329b835a [libc++][NFC] Add missing include in test adds e9d12c248013 [PowerPC][NFC] Add a series of codegen tests for vector re [...] adds 491efa7f31cb [InstCombine] add/adjust tests for mask of sext i1; NFC adds a075d6722283 [Sema] fix nondeterminism in ASTContext::getDeducedTemplat [...] adds d729f4c38fca [mlir] Bug fix. Stream must outlive the pass manager. adds 3f3bee42d229 [NFC][llvm] Inclusive language: remove instance of master [...] adds a6f53afbcb4d [MLIR][GPU] Link in device libraries during HSA compilatio [...] adds de11de308b64 [InstrProf] Use i32 for GEP index from lowering llvm.instr [...] adds f764a1a5bd7c [clangd] Avoid possible crash: apply configuration after b [...] adds 241df03ce5f0 [NFC] Test commit, add whitespace to end-of-line adds 1bd4dc4f2854 [hmaptool] Port to python3 adds 97b9e8438e26 [GVN][NFC] Remove redundant check adds 43f5f6916f0e [ORC][JITLink] Move JITDylib name into JITLinkDylib base class. adds 18f935122348 [AMDGPU] Do not generate ELF symbols for the local branch [...] adds d1abf481daf2 [llvm] Use range-based for loops (NFC) adds 0dec59305a52 [ORC] Make JITDylib::AsynchronousSymbolQuerySet private. adds 1cb991e75405 [X86] Add test case for pr52567. NFC adds a4373f6753fa [X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), [...] adds 1f9ca5adbac0 [MLIR] Avoid creation of buggy affine maps while replacing [...] adds 2f364f6f0d3a [NFC][X86][MCA] Add forgotten test coverage for AVX512's V [...] adds da47a63e0394 [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll adds 7dbbb5d3a46e compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 [...] adds fbfe8fcbc31d [Libomptarget] Remove undefined symbol in old runtime adds ec7b0d4d3458 [MLIR] Simplify Semi-affine expressions by rule based matc [...] adds 401b76fdf2b3 [libc++] [test] Eliminate libcpp-no-noexcept-function-type [...] adds 1d007d0e5a92 [InstCombine] add tests for bitwise logic with bool op; NFC adds 337948ac6e22 [InstCombine] add folds for binop with sexted bool and con [...] adds cf8efbd30e43 [VPlan] Wrap vector loop blocks in region. adds 25a9ee52f139 [CVP] Add tests for implied conditions using urem (NFC) adds cd84cab6b37f [LVI] Support urem in implied conditions adds 0a2bde94a06c [LVI] Drop requirement that modulus is constant adds fefe20b99313 [clang-tidy] performance-unnecessary-copy-initialization: [...] adds aeba28bc6244 [DSE] Drop hasAnalyzableMemoryWrite() (NFCI) adds df70cf5e1409 [NFC][X86][Costmodel] Actually test +prefer-256-bit in rep [...] adds e74114add3b3 [libc++] [doc] Mark some spaceship-related LWG issues as " [...] adds dca681fee93e [libc++][NFC] Fix typo in ranges::iterator_t synopsis adds 6cc820a3e284 [X86][FP16] Relax the pattern condition for VZEXT_MOVL to [...] adds f6bce30cf949 [llvm] Use range-based for loops (NFC) adds 648157b05a1d [ELF] Move getOutputSectionName from Writer.cpp to LinkerS [...] adds 2b9c41189e75 [AArch64] Extra testing for sinking splats to various inst [...] adds 3234f2d9c166 [ARM][ParallelDSP] Regenerate complex_dot_prod.ll test adds ad48ef1e3142 [MLIR][NFC] Simplex::restoreRow: improve documentation adds 73d52ee7859f Add a best practice section on how to configure a fast builder adds 357d6362891e [PowerPC] Regenerate rlwinm2.ll test adds eced44637cfb [Thumb2] Regenerate ext + rot tests adds 4a5e1ffcf9b8 [ARM] Regenerate sxt_rot.ll tests adds fc981cedea07 [llvm] Use range-based for loops (NFC) adds c133fb321f7c [CodeGen] Use llvm::is_contained (NFC) adds 6f9cceb7751a [mlir] Move trait to InferTypeOpInterface adds e5a4d0f1498c [mlir] Fix unused function warning (NFC) adds 1dc62f2653f8 [libc++] Implement P1272R4 (std::byteswap) adds 0a413506a29e [gn build] Port 1dc62f2653f8 adds a60b63940a65 [libc++][NFC] Sort includes in __ranges/concepts.h adds b72b56016a6b NFC: clang-format lib/Transforms/Instrumentation/InstrProf [...] adds ea5421bd0db3 [llvm] Use range-based for loops (NFC) adds 49e3838145df [llvm] Use make_early_inc_range (NFC) adds af0ecfccae82 [RISCV] Generate pseudo instruction li adds a05b694b1e1d [ELF][NFC] Do not pass region name to expandMemoryRegion() adds 6a3958247aee tsan: add another fork test adds 2ac339ef5f0f [C++20] [Coroutines] Warn for deprecated form 'for co_await' adds 83484f8472ad Fix nits in clang-tidy's documentation (NFC) adds 760d4d03d5d3 [AArch64] Sink splat shuffles to lane index intrinsics adds b5f20372a82f [clangd] IncludeCleaner: Mark possible expr resolutions as used adds a82942dd07ea Add missing clang-tidy args in index.rst (NFC) adds 84bf5e328664 Fix various problems found by fuzzing. adds 2f1c037bbdc4 [libc] Remove unused variable adds a7027bb79971 [LV] Pre-commit test for D111846 adds d92aabc33666 [MLIR][NFC] Simplex: remove repeated words in comment adds 4d21b64464ac [BPI] Look-up tables for non-loop branches. NFC. adds a9e236bed835 [mlir][Vector] Add a vblendps-based impl for transpose8x8 [...] adds 0ccc44cec067 [mlir][linalg] Fix tile and fuse for outermost reduction. adds 789c88e80e87 [mlir] Fix unintentional mutation by VectorType/RankedTens [...] adds 4348cd42c385 [LV] Drop integer poison-generating flags from instruction [...] adds e3d386ea2733 [mlir][linalg] Add a tile and fuse on tensors pattern. adds 050cc1cd6e68 [mlir] Add InitializeNativeTargetAsmParser to ExecutionEngine. adds 8d09dd61c381 [X86][TTI] Costmodel for AVX512DQ's VPMOVM2[DQ] / VPMOV[DQ [...] adds 704d92607d26 [X86][TTI] Finish costmodel for AVX512BW's VPMOVM2[BW] / V [...] adds 56db1c072c92 [DA][NFC] Update publication - add remarks adds 955c72c35caf [AArch64][ARM] Add missing SVE/SVE2 features from Cortex-A710 adds f7751a3a4218 [mlir][linalg] Remove tile and fuse test pass (NFC). adds 106f3074996c Rename MlirExecutionEngine lookup to lookupPacked adds 32c43241e716 [mlir][linalg] Always generate an extract/insert slice pai [...] adds 247a1a55eb6a [mlir][linalg] Use getAsOpFoldResult in padding (NFC). adds 7c8ae65f2c3d [lldb/test] Make it possible to run the mock gdb server on [...] adds 7f09ab08de5a [lldb] Fix [some] leaks in python bindings adds d633db8f9dd4 [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency adds 0512bf354063 [MLIR] PresburgerSetTest: fix comment and add a test case adds 1b927b68b66e [libc] add memmove basic building blocks adds 62e9acad0a51 Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap [...] adds e69d50d9ff3e tsan: disable instrumentation in runtime callbacks in tests adds 1784fe0532a6 tsan: new runtime (v3) adds 137d3474ca39 [RISCV] Reverse the order of loading/storing callee-saved [...] adds dc9b5550b223 [NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity [...]
No new revisions were added by this update.
Summary of changes: .../performance/UnnecessaryCopyInitialization.cpp | 8 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 5 +- clang-tools-extra/clangd/IncludeCleaner.cpp | 8 + .../clangd/unittests/IncludeCleanerTests.cpp | 4 + clang-tools-extra/docs/clang-tidy/index.rst | 40 +- ...opy-initialization-excluded-container-types.cpp | 10 + clang/include/clang/AST/Redeclarable.h | 3 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/Analysis/CFG.h | 2 +- clang/include/clang/Basic/Attr.td | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 4 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/include/clang/CodeGen/CGFunctionInfo.h | 2 +- clang/include/clang/Sema/Lookup.h | 7 +- .../Core/PathSensitive/CallDescription.h | 69 +- .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 14 - clang/lib/AST/ASTContext.cpp | 3 + clang/lib/Analysis/BodyFarm.cpp | 5 +- clang/lib/Analysis/RetainSummaryManager.cpp | 2 +- clang/lib/Basic/DiagnosticIDs.cpp | 2 +- clang/lib/Basic/SourceManager.cpp | 11 +- clang/lib/Driver/ToolChains/Clang.cpp | 1 - clang/lib/Format/ContinuationIndenter.cpp | 7 +- clang/lib/Format/Format.cpp | 2 +- clang/lib/Format/TokenAnnotator.cpp | 10 +- clang/lib/Format/UnwrappedLineParser.cpp | 19 +- clang/lib/Format/WhitespaceManager.cpp | 12 +- clang/lib/Frontend/FrontendActions.cpp | 2 +- clang/lib/Parse/ParseStmt.cpp | 3 + clang/lib/Sema/SemaChecking.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 8 +- clang/lib/Sema/SemaDeclCXX.cpp | 5 +- clang/lib/Sema/SemaExpr.cpp | 1 - clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaLookup.cpp | 4 +- .../Checkers/BasicObjCFoundationChecks.cpp | 13 +- .../Checkers/BlockInCriticalSectionChecker.cpp | 27 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 11 +- .../lib/StaticAnalyzer/Checkers/ChrootChecker.cpp | 6 +- .../StaticAnalyzer/Checkers/ContainerModeling.cpp | 47 +- .../Checkers/DebugContainerModeling.cpp | 8 +- .../Checkers/DebugIteratorModeling.cpp | 12 +- .../Checkers/InnerPointerChecker.cpp | 16 +- clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp | 6 +- .../Checkers/MmapWriteExecChecker.cpp | 2 +- .../Checkers/SimpleStreamChecker.cpp | 4 +- .../StaticAnalyzer/Checkers/SmartPtrModeling.cpp | 5 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 6 +- .../lib/StaticAnalyzer/Checkers/StringChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp | 5 +- .../lib/StaticAnalyzer/Checkers/ValistChecker.cpp | 8 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 7 +- clang/lib/StaticAnalyzer/Core/CallDescription.cpp | 124 +- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 82 - clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 4 +- clang/lib/StaticAnalyzer/Core/Store.cpp | 2 +- clang/lib/Tooling/Syntax/Tree.cpp | 2 +- clang/test/AST/attr-swift_attr.m | 10 +- clang/test/CodeGen/profile-filter.c | 20 +- ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/Profile/branch-logical-mixed.cpp | 68 +- clang/test/Profile/c-captured.c | 32 +- clang/test/Profile/c-general.c | 238 +- clang/test/Profile/c-ternary.c | 10 +- clang/test/Profile/cxx-class.cpp | 24 +- clang/test/Profile/cxx-lambda.cpp | 17 +- clang/test/Profile/cxx-rangefor.cpp | 10 +- clang/test/Profile/cxx-stmt-initializers.cpp | 12 +- clang/test/Profile/cxx-templates.cpp | 8 +- clang/test/Profile/cxx-throws.cpp | 24 +- clang/test/Profile/objc-general.m | 18 +- clang/test/SemaCXX/co_await-range-for.cpp | 14 +- .../StaticAnalyzer/ConflictingEvalCallsTest.cpp | 2 +- .../NoStateChangeFuncVisitorTest.cpp | 6 +- clang/utils/hmaptool/hmaptool | 17 +- compiler-rt/lib/builtins/cpu_model.c | 6 + .../sanitizer_common/sanitizer_thread_registry.h | 2 + compiler-rt/lib/tsan/CMakeLists.txt | 1 - compiler-rt/lib/tsan/check_analyze.sh | 12 +- compiler-rt/lib/tsan/go/build.bat | 1 + compiler-rt/lib/tsan/go/buildgo.sh | 1 + compiler-rt/lib/tsan/go/tsan_go.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_defs.h | 23 +- compiler-rt/lib/tsan/rtl/tsan_dense_alloc.h | 9 + compiler-rt/lib/tsan/rtl/tsan_flags.cpp | 6 - compiler-rt/lib/tsan/rtl/tsan_flags.inc | 10 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 3 +- compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp | 87 +- compiler-rt/lib/tsan/rtl/tsan_interface_java.cpp | 4 +- compiler-rt/lib/tsan/rtl/tsan_mman.cpp | 24 +- compiler-rt/lib/tsan/rtl/tsan_mutexset.cpp | 54 +- compiler-rt/lib/tsan/rtl/tsan_mutexset.h | 11 +- compiler-rt/lib/tsan/rtl/tsan_platform.h | 173 +- compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp | 48 +- compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp | 7 - compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp | 16 +- compiler-rt/lib/tsan/rtl/tsan_platform_windows.cpp | 3 - compiler-rt/lib/tsan/rtl/tsan_rtl.cpp | 630 ++- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 325 +- compiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp | 860 ++-- compiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp | 642 +-- compiler-rt/lib/tsan/rtl/tsan_rtl_proc.cpp | 1 - compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp | 367 +- compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 191 +- compiler-rt/lib/tsan/rtl/tsan_shadow.h | 315 +- compiler-rt/lib/tsan/rtl/tsan_sync.cpp | 82 +- compiler-rt/lib/tsan/rtl/tsan_sync.h | 48 +- compiler-rt/lib/tsan/rtl/tsan_trace.h | 73 +- .../lib/tsan/rtl/tsan_update_shadow_word.inc | 59 - .../lib/tsan/tests/unit/tsan_flags_test.cpp | 2 +- .../lib/tsan/tests/unit/tsan_shadow_test.cpp | 92 +- .../lib/tsan/tests/unit/tsan_stack_test.cpp | 4 +- compiler-rt/lib/tsan/tests/unit/tsan_sync_test.cpp | 17 +- .../lib/tsan/tests/unit/tsan_trace_test.cpp | 175 +- compiler-rt/test/tsan/Darwin/debug_external.cpp | 3 +- .../test/tsan/Darwin/external-swift-debugging.cpp | 4 +- compiler-rt/test/tsan/Linux/fork_deadlock.cpp | 63 + compiler-rt/test/tsan/free_race2.c | 2 +- compiler-rt/test/tsan/memcmp_race.cpp | 2 +- compiler-rt/test/tsan/memcpy_race.cpp | 10 +- compiler-rt/test/tsan/mutexset7.cpp | 6 +- .../include/flang/Optimizer/Dialect/FIRDialect.td | 1 + libc/fuzzing/math/RemQuoDiff.h | 5 + libc/fuzzing/stdlib/CMakeLists.txt | 4 +- .../{atof_fuzz.cpp => atof_differential_fuzz.cpp} | 0 libc/include/sys/mman.h.def | 5 + libc/include/sys/syscall.h.def | 5 + libc/src/__support/architectures.h | 7 +- libc/src/__support/common.h | 2 +- libc/src/__support/endian.h | 2 +- libc/src/__support/sanitizer.h | 2 +- libc/src/__support/str_to_float.h | 2 - libc/src/string/memory_utils/elements.h | 76 +- libc/src/string/memory_utils/elements_x86.h | 4 + .../test/src/string/memory_utils/elements_test.cpp | 38 +- libcxx/docs/FeatureTestMacroTable.rst | 2 + libcxx/docs/Status/Cxx20Issues.csv | 6 +- libcxx/docs/Status/Cxx2bPapers.csv | 2 +- libcxx/docs/Status/SpaceshipPapers.csv | 2 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__algorithm/binary_search.h | 2 +- libcxx/include/__algorithm/is_heap.h | 4 +- libcxx/include/__algorithm/is_heap_until.h | 21 +- libcxx/include/__algorithm/is_sorted.h | 4 +- libcxx/include/__algorithm/is_sorted_until.h | 19 +- libcxx/include/__algorithm/max.h | 4 +- libcxx/include/__algorithm/max_element.h | 21 +- libcxx/include/__algorithm/min.h | 4 +- libcxx/include/__algorithm/min_element.h | 21 +- libcxx/include/__bit/byteswap.h | 55 + libcxx/include/__format/formatter.h | 43 + libcxx/include/__format/formatter_integral.h | 39 - libcxx/include/__ranges/concepts.h | 2 +- libcxx/include/bit | 13 +- libcxx/include/module.modulemap | 1 + libcxx/include/ranges | 2 +- libcxx/include/version | 4 +- .../robust_against_copying_comparators.pass.cpp | 190 + .../detail.headers/bit/byteswap.module.verify.cpp} | 18 +- .../libcxx/thread/thread.mutex/version.pass.cpp | 2 + .../algorithms/robust_against_adl.compile.pass.cpp | 7 +- .../robust_re_difference_type.compile.pass.cpp | 7 +- .../equality_comparable.compile.pass.cpp | 5 +- .../equality_comparable_with.compile.pass.cpp | 5 +- .../assignable_from.compile.pass.cpp | 5 +- .../concepts.object/movable.compile.pass.cpp | 5 +- .../support.limits.general/bit.version.pass.cpp | 24 + .../support.limits.general/charconv.pass.cpp | 33 - .../charconv.version.pass.cpp | 84 + .../memory_resource.version.pass.cpp | 35 - .../support.limits.general/mutex.version.pass.cpp | 2 + .../utility.version.pass.cpp | 48 - .../version.version.pass.cpp | 24 + libcxx/test/std/numerics/bit/byteswap.pass.cpp | 100 + .../c.math/{abs.fail.cpp => abs.verify.cpp} | 17 +- .../thread.once.callonce/call_once.pass.cpp | 2 +- .../thread.once/thread.once.callonce/race.pass.cpp | 2 +- .../thread.once.onceflag/assign.compile.fail.cpp | 2 + .../thread.once.onceflag/copy.compile.fail.cpp | 2 + .../thread.once.onceflag/default.pass.cpp | 2 + .../meta/meta.rel/is_nothrow_invocable.pass.cpp | 24 +- .../tuple_size_structured_bindings.pass.cpp | 1 - libcxx/test/support/uses_alloc_types.h | 1 + .../generate_feature_test_macro_components.py | 17 +- libcxx/utils/generate_header_inclusion_tests.py | 9 +- libcxx/utils/libcxx/test/features.py | 2 - libcxxabi/test/catch_function_03.pass.cpp | 3 +- .../test/catch_member_function_pointer_02.pass.cpp | 3 +- lld/ELF/LinkerScript.cpp | 78 +- lld/ELF/SyntheticSections.cpp | 4 +- lld/ELF/Writer.cpp | 61 - lld/ELF/Writer.h | 1 - lld/test/ELF/linkerscript/discard-plt.s | 37 + lldb/bindings/python/python-swigsafecast.swig | 58 +- lldb/bindings/python/python-wrapper.swig | 113 +- .../Python/lldbsuite/test/gdbclientutils.py | 56 +- .../Python/lldbsuite/test/lldbgdbclient.py | 2 +- .../Python/ScriptInterpreterPython.cpp | 15 +- .../unique_ptr/TestUniquePtrFromStdModule.py | 1 + .../functionalities/gdb_remote_client/TestPty.py | 6 +- .../functionalities/mtc/simple/TestMTCSimple.py | 2 + .../TestModulesCompileError.py | 1 + .../API/tools/lldb-server/TestLldbGdbServer.py | 3 + .../ScriptInterpreter/Python/PythonTestSuite.cpp | 8 +- llvm/docs/HowToAddABuilder.rst | 89 + .../llvm/ExecutionEngine/JITLink/JITLinkDylib.h | 13 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 10 +- llvm/include/llvm/IR/IntrinsicsNVVM.td | 2 +- llvm/include/llvm/Support/AArch64TargetParser.def | 3 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 201 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 10 +- llvm/lib/Analysis/IntervalPartition.cpp | 16 +- llvm/lib/Analysis/LazyValueInfo.cpp | 15 +- llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 40 +- llvm/lib/Analysis/SyncDependenceAnalysis.cpp | 59 +- llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 9 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 28 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 4 +- llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp | 17 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 11 +- llvm/lib/CodeGen/LiveRangeEdit.cpp | 11 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 9 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 28 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 19 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 14 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 18 +- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 13 +- llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 2 +- llvm/lib/Target/Hexagon/BitTracker.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonBitTracker.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 24 +- llvm/lib/Target/Hexagon/HexagonGenInsert.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonGenMux.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 6 +- .../lib/Target/Hexagon/HexagonMachineScheduler.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonPeephole.cpp | 18 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 1 - llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 9 +- llvm/lib/Target/MSP430/MSP430FrameLowering.cpp | 4 +- llvm/lib/Target/Mips/Mips16FrameLowering.cpp | 11 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 14 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 36 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 11 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 8 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 - llvm/lib/Target/RISCV/RISCVISelLowering.h | 8 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 + llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 36 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 18 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 226 +- llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 8 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 14 + .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 23 + .../Transforms/Instrumentation/InstrProfiling.cpp | 43 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 59 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 72 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 5 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 13 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 12 +- llvm/lib/Transforms/Utils/MetaRenamer.cpp | 6 +- llvm/lib/Transforms/Utils/VNCoercion.cpp | 14 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 187 +- llvm/lib/Transforms/Vectorize/VPlan.h | 12 +- .../BranchProbabilityInfo/pointer_heuristics.ll | 70 + llvm/test/Analysis/CostModel/X86/extend.ll | 1376 +++++-- .../CostModel/X86/min-legal-vector-width.ll | 28 +- .../CostModel/X86/shuffle-replication-i1.ll | 705 ++-- .../CostModel/X86/shuffle-replication-i16.ll | 428 +- .../CostModel/X86/shuffle-replication-i32.ll | 172 +- .../CostModel/X86/shuffle-replication-i64.ll | 151 +- .../CostModel/X86/shuffle-replication-i8.ll | 428 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 2489 +++++++++--- llvm/test/CodeGen/AArch64/sinksplat.ll | 375 ++ .../GlobalISel/atomic_optimizations_mul_one.ll | 24 +- .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 8 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 42 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 32 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll | 344 +- llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll | 4 +- .../test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll | 16 +- llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll | 4 +- llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 24 +- .../CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll | 20 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/amd.endpgm.ll | 8 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 184 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 416 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 100 +- llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/basic-branch.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll | 32 +- .../AMDGPU/branch-relaxation-debug-info.mir | 6 +- .../branch-relaxation-gfx10-branch-offset-bug.ll | 16 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 72 +- llvm/test/CodeGen/AMDGPU/bypass-div.ll | 48 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 2 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 6 +- llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll | 6 +- .../CodeGen/AMDGPU/cgp-addressing-modes-flat.ll | 2 +- .../CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll | 4 +- .../CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll | 4 +- llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 14 +- llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll | 18 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 26 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 14 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 16 +- llvm/test/CodeGen/AMDGPU/ctpop16.ll | 24 +- llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 12 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 18 +- llvm/test/CodeGen/AMDGPU/early-if-convert.ll | 12 +- llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll | 2 +- .../AMDGPU/expand-scalar-carry-out-select-user.ll | 12 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 44 +- llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll | 100 +- .../CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll | 8 +- llvm/test/CodeGen/AMDGPU/global-saddr-load.ll | 16 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 20 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 4 +- llvm/test/CodeGen/AMDGPU/idiv-licm.ll | 64 +- llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll | 4 +- .../CodeGen/AMDGPU/indirect-addressing-si-noopt.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | 6 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 72 +- llvm/test/CodeGen/AMDGPU/infinite-loop.ll | 40 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 24 +- llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll | 56 +- llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 2 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll | 2 +- .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll | 12 +- .../llvm.amdgcn.struct.buffer.load.format.v3f16.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll | 344 +- .../AMDGPU/local-stack-alloc-block-sp-reference.ll | 24 +- .../AMDGPU/loop-live-out-copy-undef-subrange.ll | 8 +- llvm/test/CodeGen/AMDGPU/loop-prefetch.ll | 38 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 48 +- llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 22 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 30 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 12 +- llvm/test/CodeGen/AMDGPU/mul_int24.ll | 12 +- .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 46 +- llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 42 +- llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll | 40 +- llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll | 12 +- .../CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 16 +- llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll | 2 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 8 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 4 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 96 +- llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir | 212 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 36 +- llvm/test/CodeGen/AMDGPU/sgpr-copy.ll | 2 +- llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll | 4 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll | 24 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll | 92 +- .../CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll | 8 +- .../si-lower-control-flow-unreachable-block.ll | 6 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 4 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 424 +- llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 4 +- llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll | 4 +- llvm/test/CodeGen/AMDGPU/spill-m0.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 112 +- .../stack-pointer-offset-relative-frameindex.ll | 8 +- llvm/test/CodeGen/AMDGPU/subvector-test.mir | 4 +- llvm/test/CodeGen/AMDGPU/trap-abis.ll | 48 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 112 +- .../CodeGen/AMDGPU/undefined-subreg-liverange.ll | 8 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 50 +- llvm/test/CodeGen/AMDGPU/uniform-crash.ll | 6 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 46 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 84 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 24 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 8 +- llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll | 46 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 6 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 4 +- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 192 +- llvm/test/CodeGen/ARM/sxt_rot.ll | 82 +- llvm/test/CodeGen/Hexagon/abi-padding-2.ll | 2 +- .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir | 2 +- .../test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir | 3 +- llvm/test/CodeGen/PowerPC/rlwinm2.ll | 17 +- llvm/test/CodeGen/PowerPC/vector-reduce-add.ll | 1808 +++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-and.ll | 390 ++ llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll | 4247 ++++++++++++++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll | 1169 ++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll | 1169 ++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll | 1717 ++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll | 204 + llvm/test/CodeGen/PowerPC/vector-reduce-or.ll | 392 ++ llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll | 392 ++ llvm/test/CodeGen/RISCV/addimm-mulimm.ll | 70 +- llvm/test/CodeGen/RISCV/aext-to-sext.ll | 4 +- llvm/test/CodeGen/RISCV/alloca.ll | 30 +- llvm/test/CodeGen/RISCV/alu32.ll | 12 +- llvm/test/CodeGen/RISCV/alu64.ll | 30 +- llvm/test/CodeGen/RISCV/analyze-branch.ll | 4 +- llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 400 +- llvm/test/CodeGen/RISCV/atomic-load-store.ll | 144 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2658 ++++++------ llvm/test/CodeGen/RISCV/atomic-signext.ll | 542 +-- llvm/test/CodeGen/RISCV/branch-relaxation.ll | 4 +- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 68 +- llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll | 208 +- llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll | 108 +- llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 192 +- llvm/test/CodeGen/RISCV/calling-conv-half.ll | 132 +- .../RISCV/calling-conv-ilp32-ilp32f-common.ll | 68 +- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 230 +- llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll | 52 +- llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll | 54 +- .../RISCV/calling-conv-ilp32f-ilp32d-common.ll | 36 +- .../RISCV/calling-conv-lp64-lp64f-common.ll | 8 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 104 +- llvm/test/CodeGen/RISCV/calling-conv-lp64.ll | 52 +- .../test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll | 32 +- llvm/test/CodeGen/RISCV/calls.ll | 8 +- llvm/test/CodeGen/RISCV/codemodel-lowering.ll | 16 +- llvm/test/CodeGen/RISCV/copysign-casts.ll | 22 +- llvm/test/CodeGen/RISCV/div.ll | 124 +- llvm/test/CodeGen/RISCV/double-arith.ll | 234 +- .../CodeGen/RISCV/double-bitmanip-dagcombines.ll | 12 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/double-calling-conv.ll | 26 +- llvm/test/CodeGen/RISCV/double-convert.ll | 206 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 56 +- llvm/test/CodeGen/RISCV/double-intrinsics.ll | 30 +- llvm/test/CodeGen/RISCV/double-previous-failure.ll | 4 +- .../CodeGen/RISCV/exception-pointer-register.ll | 8 +- llvm/test/CodeGen/RISCV/fastcc-int.ll | 4 +- llvm/test/CodeGen/RISCV/float-arith.ll | 148 +- .../RISCV/float-bit-preserving-dagcombines.ll | 24 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 18 +- llvm/test/CodeGen/RISCV/float-convert.ll | 174 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/float-intrinsics.ll | 16 +- llvm/test/CodeGen/RISCV/flt-rounds.ll | 4 +- llvm/test/CodeGen/RISCV/fp-imm.ll | 10 +- llvm/test/CodeGen/RISCV/fp16-promote.ll | 16 +- llvm/test/CodeGen/RISCV/frame-info.ll | 16 +- llvm/test/CodeGen/RISCV/frame.ll | 6 +- llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll | 16 +- llvm/test/CodeGen/RISCV/half-arith.ll | 380 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/half-convert.ll | 270 +- llvm/test/CodeGen/RISCV/half-fcmp.ll | 16 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 56 +- llvm/test/CodeGen/RISCV/half-mem.ll | 4 +- llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll | 16 +- llvm/test/CodeGen/RISCV/i32-icmp.ll | 4 +- llvm/test/CodeGen/RISCV/imm.ll | 180 +- llvm/test/CodeGen/RISCV/indirectbr.ll | 4 +- llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll | 6 +- llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll | 374 +- llvm/test/CodeGen/RISCV/interrupt-attr.ll | 884 ++-- llvm/test/CodeGen/RISCV/jumptable.ll | 128 +- llvm/test/CodeGen/RISCV/large-stack.ll | 10 +- llvm/test/CodeGen/RISCV/legalize-fneg.ll | 6 +- llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll | 4 +- llvm/test/CodeGen/RISCV/mul.ll | 88 +- .../CodeGen/RISCV/out-of-reach-emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/pr51206.ll | 4 +- llvm/test/CodeGen/RISCV/rem.ll | 72 +- llvm/test/CodeGen/RISCV/remat.ll | 34 +- llvm/test/CodeGen/RISCV/rotl-rotr.ll | 4 +- .../test/CodeGen/RISCV/rv32i-rv64i-float-double.ll | 10 +- llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll | 12 +- llvm/test/CodeGen/RISCV/rv32zba.ll | 62 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 64 +- llvm/test/CodeGen/RISCV/rv32zbp.ll | 8 +- llvm/test/CodeGen/RISCV/rv32zbs.ll | 40 +- llvm/test/CodeGen/RISCV/rv64i-complex-float.ll | 6 +- .../CodeGen/RISCV/rv64i-w-insts-legalization.ll | 4 +- .../CodeGen/RISCV/rv64m-w-insts-legalization.ll | 4 +- llvm/test/CodeGen/RISCV/rv64zba.ll | 72 +- llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll | 12 +- llvm/test/CodeGen/RISCV/rv64zbb.ll | 44 +- llvm/test/CodeGen/RISCV/rv64zbp.ll | 12 +- llvm/test/CodeGen/RISCV/rv64zbs.ll | 76 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 388 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 524 +-- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 24 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 24 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 2 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 56 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 132 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 206 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 172 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 46 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 220 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 14 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 14 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 14 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 6 +- 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llvm/test/CodeGen/RISCV/ssub_sat.ll | 62 +- llvm/test/CodeGen/RISCV/ssub_sat_plus.ll | 62 +- ...tack-realignment-with-variable-sized-objects.ll | 8 +- llvm/test/CodeGen/RISCV/stack-realignment.ll | 32 +- llvm/test/CodeGen/RISCV/stack-slot-size.ll | 12 +- llvm/test/CodeGen/RISCV/stack-store-check.ll | 24 +- llvm/test/CodeGen/RISCV/uadd_sat.ll | 38 +- llvm/test/CodeGen/RISCV/uadd_sat_plus.ll | 38 +- .../RISCV/umulo-128-legalisation-lowering.ll | 12 +- .../unfold-masked-merge-scalar-variablemask.ll | 24 +- llvm/test/CodeGen/RISCV/urem-lkk.ll | 50 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 118 +- llvm/test/CodeGen/RISCV/urem-vector-lkk.ll | 316 +- llvm/test/CodeGen/RISCV/usub_sat.ll | 26 +- llvm/test/CodeGen/RISCV/usub_sat_plus.ll | 26 +- llvm/test/CodeGen/RISCV/vararg.ll | 242 +- llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll | 12 +- llvm/test/CodeGen/RISCV/xaluo.ll | 316 +- llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll | 8 +- llvm/test/CodeGen/Thumb2/thumb2-sxt_rot.ll | 83 +- llvm/test/CodeGen/Thumb2/thumb2-uxt_rot.ll | 101 +- llvm/test/CodeGen/X86/avx512fp16-mov.ll | 70 + llvm/test/CodeGen/X86/pr52567.ll | 27 + .../InstrProfiling/atomic-updates.ll | 2 +- .../InstrProfiling/runtime-counter-relocation.ll | 4 +- llvm/test/MC/RISCV/compress-rv32i.s | 4 +- llvm/test/MC/RISCV/numeric-reg-names.s | 4 +- llvm/test/MC/RISCV/rv32i-aliases-valid.s | 23 +- llvm/test/MC/RISCV/rv64i-aliases-valid.s | 98 +- llvm/test/MC/RISCV/rv64zba-aliases-valid.s | 2 +- llvm/test/MC/RISCV/rv64zbs-aliases-valid.s | 4 +- llvm/test/MC/RISCV/rvi-aliases-valid.s | 2 +- .../AArch64/sink-free-instructions.ll | 36 +- .../Transforms/CorrelatedValuePropagation/urem.ll | 309 +- .../Transforms/DeadStoreElimination/libcalls.ll | 76 + llvm/test/Transforms/InstCombine/and.ll | 58 + llvm/test/Transforms/InstCombine/or.ll | 79 +- .../AMDGPU/different-addrspace-crash.ll | 2 +- .../LoopVectorize/AArch64/sve-masked-loadstore.ll | 4 +- .../AArch64/sve-vector-reverse-mask4.ll | 4 +- .../LoopVectorize/AArch64/sve-widen-gep.ll | 1 + .../LoopVectorize/AArch64/vector-reverse-mask4.ll | 12 +- .../X86/drop-poison-generating-flags.ll | 416 ++ .../Transforms/LoopVectorize/X86/gather_scatter.ll | 44 +- .../X86/invariant-store-vectorization.ll | 4 +- .../LoopVectorize/X86/load-deref-pred.ll | 176 +- .../LoopVectorize/X86/masked_load_store.ll | 592 +-- .../X86/x86-interleaved-accesses-masked-group.ll | 48 +- .../x86-interleaved-store-accesses-with-gaps.ll | 4 +- .../Transforms/LoopVectorize/X86/x86-pr39099.ll | 4 +- ...first-order-recurrence-sink-replicate-region.ll | 15 + .../test/Transforms/LoopVectorize/icmp-uniforms.ll | 1 + .../LoopVectorize/single-value-blend-phis.ll | 4 +- .../Transforms/LoopVectorize/vplan-dot-printing.ll | 5 +- .../Transforms/LoopVectorize/vplan-printing.ll | 15 + .../vplan-sink-scalars-and-merge-vf1.ll | 3 + .../LoopVectorize/vplan-sink-scalars-and-merge.ll | 12 + .../PGOProfile/counter_promo_exit_catchswitch.ll | 16 +- llvm/test/Transforms/PGOProfile/instr_entry_bb.ll | 6 +- .../hoisting-sinking-required-for-vectorization.ll | 2 +- llvm/test/Transforms/SROA/alloca-struct.ll | 139 + .../Inputs/riscv_function_name.ll.expected | 2 +- .../llvm-mca/X86/Generic/resources-avx512bw.s | 16 +- .../llvm-mca/X86/Generic/resources-avx512bwvl.s | 30 +- .../llvm-mca/X86/Generic/resources-avx512dq.s | 16 +- .../llvm-mca/X86/Generic/resources-avx512dqvl.s | 30 +- .../X86/IceLakeServer/resources-avx512bw.s | 16 +- .../X86/IceLakeServer/resources-avx512bwvl.s | 30 +- .../X86/IceLakeServer/resources-avx512dq.s | 16 +- .../X86/IceLakeServer/resources-avx512dqvl.s | 30 +- .../X86/SkylakeServer/resources-avx512bw.s | 16 +- .../X86/SkylakeServer/resources-avx512bwvl.s | 30 +- .../X86/SkylakeServer/resources-avx512dq.s | 16 +- .../X86/SkylakeServer/resources-avx512dqvl.s | 30 +- llvm/unittests/Support/TargetParserTest.cpp | 12 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 1 + mlir/docs/Canonicalization.md | 1 + .../standalone/include/Standalone/StandaloneOps.td | 1 + mlir/include/mlir-c/ExecutionEngine.h | 5 + mlir/include/mlir/Analysis/Presburger/Simplex.h | 6 +- .../mlir/Dialect/Arithmetic/IR/ArithmeticOps.td | 1 + mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td | 9 +- mlir/include/mlir/Dialect/GPU/GPUDialect.h | 1 + mlir/include/mlir/Dialect/GPU/GPUOps.td | 11 +- mlir/include/mlir/Dialect/GPU/Passes.h | 15 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 6 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 36 +- mlir/include/mlir/Dialect/Linalg/Passes.h | 9 +- mlir/include/mlir/Dialect/Linalg/Passes.td | 18 +- .../Dialect/Linalg/Transforms/CodegenStrategy.h | 34 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 35 + mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 9 +- mlir/include/mlir/Dialect/Math/IR/MathOps.td | 1 + mlir/include/mlir/Dialect/Quant/QuantOps.td | 1 + .../mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td | 1 + .../mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td | 3 - .../mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td | 2 - mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h | 1 + .../Dialect/SparseTensor/IR/SparseTensorOps.td | 1 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.h | 1 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 22 +- mlir/include/mlir/Dialect/X86Vector/Transforms.h | 63 +- mlir/include/mlir/Dialect/X86Vector/X86Vector.td | 1 + .../mlir/Dialect/X86Vector/X86VectorDialect.h | 1 + .../include/mlir/ExecutionEngine/ExecutionEngine.h | 11 +- mlir/include/mlir/IR/BuiltinTypes.h | 38 +- mlir/include/mlir/IR/OpBase.td | 2 - .../mlir/Interfaces/InferTypeOpInterface.td | 4 + mlir/lib/Analysis/Presburger/Simplex.cpp | 4 +- mlir/lib/Bindings/Python/ExecutionEngineModule.cpp | 2 +- mlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp | 9 + .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 19 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 4 +- mlir/lib/Dialect/GPU/CMakeLists.txt | 30 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 2 +- .../lib/Dialect/GPU/Transforms/SerializeToBlob.cpp | 42 +- .../Dialect/GPU/Transforms/SerializeToHsaco.cpp | 318 +- mlir/lib/Dialect/LLVMIR/CMakeLists.txt | 1 + mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 27 - .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 95 +- .../Linalg/Transforms/LinalgStrategyPasses.cpp | 46 + mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp | 89 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 8 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 11 - mlir/lib/Dialect/StandardOps/CMakeLists.txt | 1 + mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 22 - mlir/lib/Dialect/Vector/CMakeLists.txt | 1 + mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp | 259 ++ mlir/lib/Dialect/Vector/VectorOps.cpp | 83 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 333 +- mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp | 1 + .../Dialect/X86Vector/Transforms/AVXTranspose.cpp | 86 +- mlir/lib/ExecutionEngine/CMakeLists.txt | 6 +- mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 2 +- mlir/lib/IR/AffineExpr.cpp | 31 +- .../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 42 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 18 +- .../Dialect/Affine/simplify-affine-structures.mlir | 14 + mlir/test/Dialect/GPU/ops.mlir | 6 + mlir/test/Dialect/LLVMIR/invalid.mlir | 6 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 22 +- .../test/Dialect/Linalg/fusion-tensor-pattern.mlir | 16 +- .../Dialect/Linalg/tile-and-fuse-on-tensors.mlir | 275 +- .../Linalg/tile-and-fuse-sequence-on-tensors.mlir | 75 +- mlir/test/Dialect/SPIRV/IR/bit-ops.mlir | 8 +- mlir/test/Dialect/SPIRV/IR/logical-ops.mlir | 6 +- mlir/test/Dialect/Vector/canonicalize.mlir | 39 +- .../Dialect/Vector/vector-dim-one-shape-cast.mlir | 23 - mlir/test/Dialect/Vector/vector-transforms.mlir | 66 +- .../Dialect/Vector/vector-transpose-lowering.mlir | 27 +- mlir/test/IR/invalid-ops.mlir | 6 +- .../LLVMIR/CPU/X86/test-inline-asm-vector.mlir | 56 + mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir | 12 +- mlir/test/Integration/GPU/ROCM/two-modules.mlir | 12 +- mlir/test/Integration/GPU/ROCM/vecadd.mlir | 30 +- .../Integration/GPU/ROCM/vector-transferops.mlir | 16 +- mlir/test/Target/LLVMIR/nvvmir.mlir | 32 +- .../Dialect/Linalg/TestLinalgCodegenStrategy.cpp | 27 +- mlir/test/lib/Dialect/Vector/CMakeLists.txt | 2 + .../lib/Dialect/Vector/TestVectorTransforms.cpp | 5 + mlir/unittests/Analysis/PresburgerSetTest.cpp | 11 +- openmp/libomptarget/deviceRTLs/target_interface.h | 1 - openmp/libomptarget/plugins/amdgpu/impl/internal.h | 13 +- .../plugins/amdgpu/impl/interop_hsa.cpp | 45 - .../libomptarget/plugins/amdgpu/impl/interop_hsa.h | 5 - openmp/libomptarget/plugins/amdgpu/impl/system.cpp | 64 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 26 +- utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 16 + .../llvm-project-overlay/mlir/test/BUILD.bazel | 2 + 828 files changed, 39172 insertions(+), 17885 deletions(-) delete mode 100644 compiler-rt/lib/tsan/rtl/tsan_update_shadow_word.inc create mode 100644 compiler-rt/test/tsan/Linux/fork_deadlock.cpp rename libc/fuzzing/stdlib/{atof_fuzz.cpp => atof_differential_fuzz.cpp} (100%) create mode 100644 libcxx/include/__bit/byteswap.h create mode 100644 libcxx/test/libcxx/algorithms/robust_against_copying_comparator [...] copy libcxx/test/libcxx/{thread/thread.mutex/version.pass.cpp => diagnostics/detai [...] delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/numerics/bit/byteswap.pass.cpp rename libcxx/test/std/numerics/c.math/{abs.fail.cpp => abs.verify.cpp} (50%) create mode 100644 lld/test/ELF/linkerscript/discard-plt.s create mode 100644 llvm/test/Analysis/BranchProbabilityInfo/pointer_heuristics.ll create mode 100644 llvm/test/CodeGen/AArch64/sinksplat.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-add.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-and.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-or.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll create mode 100644 llvm/test/CodeGen/RISCV/sink-icmp.ll create mode 100644 llvm/test/CodeGen/X86/pr52567.ll create mode 100644 llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll create mode 100644 llvm/test/Transforms/SROA/alloca-struct.ll create mode 100644 mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp delete mode 100644 mlir/test/Dialect/Vector/vector-dim-one-shape-cast.mlir create mode 100644 mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-ve [...]