[Tcwg-commits] [llvm] branch master updated (c760298a35c -> 6ba87d01dcd)

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from c760298a35c [X86] When iselling (x << C1) and/or/xor C2 as (x and/or/xo [...] new 6ba87d01dcd [X86] Add test cases for missed opportunities in (x << C1) [...]

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Summary of changes: test/CodeGen/X86/narrow-shl-cst.ll | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)