[Tcwg-commits] [gcc] branch master updated (1b4f296d551 -> ff87aefc061)

30 Jun 2025


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unknown user pushed a change to branch master
in repository gcc.
from  1b4f296d551 ada: Fix Execution_Successful value with exceptions
       new  b7fe719e449 RISC-V: Combine vec_duplicate + vssubu.vv to vssubu.vx on G [...]
       new  db267b0d1dc RISC-V: Reconcile the existing test due to cost model change
       new  342694acd59 RISC-V: Add test for vec_duplicate + vssubu.vv combine case [...]
       new  ff87aefc061 RISC-V: Add test for vec_duplicate + vssubu.vv combine case [...]
The 4 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
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Summary of changes:
 gcc/config/riscv/riscv-v.cc                        |   1 +
 gcc/config/riscv/riscv.cc                          |   1 +
 gcc/config/riscv/vector-iterators.md               |   2 +-
 .../rvv/autovec/sat/vec_sat_u_sub_trunc-1-u16.c    |   2 +-
 .../rvv/autovec/sat/vec_sat_u_sub_trunc-1-u32.c    |   2 +-
 .../rvv/autovec/sat/vec_sat_u_sub_trunc-1-u8.c     |   2 +-
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h |  18 +-
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h       | 196 +++++++++++++++++++++
 .../{vx_vmin-run-1-u16.c => vx_vssub-run-1-u16.c}  |   4 +-
 .../{vx_vmin-run-1-u32.c => vx_vssub-run-1-u32.c}  |   4 +-
 .../{vx_vmin-run-1-u64.c => vx_vssub-run-1-u64.c}  |   4 +-
 .../{vx_vmin-run-1-u8.c => vx_vssub-run-1-u8.c}    |   4 +-
 36 files changed, 263 insertions(+), 13 deletions(-)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-1-u16.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-1-u32.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-1-u64.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-1-u8.c => vx_vs [...]
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[Tcwg-commits] [gcc] branch master updated (1b4f296d551 -> ff87aefc061)