This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/qemu.
from 3757b0d08b Merge tag 'pull-request-2022-05-18' of https://gitlab.com/th [...] adds d6cd3ae0eb target/riscv: Fix VS mode hypervisor CSR access adds 02b511985e target/riscv: rvv: Fix early exit condition for whole regist [...] adds 77046729f9 hw/intc: Pass correct hartid while updating mtimecmp adds 6047dcc245 target/riscv: Move Zhinx* extensions on ISA string adds a4a9a4432e target/riscv: Add short-isa-string option adds 4bcfc391ac hw/riscv: Make CPU config error handling generous (virt/spike) adds 91a3387dc4 hw/riscv: Make CPU config error handling generous (sifive_e/ [...] adds 61cdf4593e target/riscv: Fix coding style on "G" expansion adds 1d398ab9dc target/riscv: Disable "G" by default adds 9f6b7da5d2 target/riscv: Change "G" expansion adds 1086504c6f target/riscv: FP extension requirements adds bc57381669 target/riscv: Move/refactor ISA extension checks adds 8f1b608798 hw/vfio/pci-quirks: Resolve redundant property getters adds 96c7fff703 hw/riscv/sifive_u: Resolve redundant property accessors adds bb06941f95 target/riscv: check 'I' and 'E' after checking 'G' in riscv_ [...] adds 075eeda931 target/riscv: Fix typo of mimpid cpu option adds c1fbcecb3a target/riscv: Fix csr number based privilege checking adds 24826da0ee target/riscv: Fix hstatus.GVA bit setting for traps taken fr [...] adds 62cf02451e target/riscv: Set [m|s]tval for both illegal and virtual ins [...] adds d644e5e44f hw/riscv: virt: Fix interrupt parent for dynamic platform devices adds 5160bacc06 target/riscv: add zicsr/zifencei to isa_string adds d616889ece hw/core: Sync uboot_image.h from U-Boot v2022.01 adds 8fe63fe8e5 hw/core: loader: Set is_linux to true for VxWorks uImage adds 0cac736e73 Merge tag 'pull-riscv-to-apply-20220525' of github.com:alist [...] adds 3569664ee9 qga: add guest-get-diskstats command for Linux guests adds 323f3a8f22 trivial: qga: Log version on start adds 2e7b218958 tests: Bump Fedora image version for cross-compilation adds b9a002609f qga-win32: Add support for NVME bus type adds ffae6d9585 Merge tag 'qga-win32-pull-2022-05-25' of github.com:kostyanf [...] adds 60f1c8017a linux-user: Clean up arg_start/arg_end confusion adds c3a28d7122 linux-user/syscall.c: fix build without RLIMIT_RTTIME adds 2f6f4290e0 linux-user/elfload: Remove pointless non-const CPUArchState cast adds a0939b8916 linux-user: Have do_syscall() use CPUArchState* instead of void* adds 0effdc29b5 linux-user: Remove pointless CPU{ARCH}State casts adds 9a12adc704 linux-user/s390x: Fix unwinding from signal handlers adds 1a75b14038 tests/tcg/s390x: Test unwinding from signal handlers adds 565a84c1e6 linux-user/host/s390: Treat EX and EXRL as writes adds 6882d65161 Merge tag 'linux-user-for-7.1-pull-request' of https://gitla [...] adds 29320530cf docs: Correct the default thread-pool-size adds 7929f75f34 Merge tag 'block-pull-request' of https://gitlab.com/stefanh [...] adds 3d393bb7d3 docs: add minibmc section in aspeed document adds fa699e80a8 hw/arm/aspeed: Add fby35 machine type adds 264a360ae0 docs: aspeed: Add fby35 board adds 188052a133 hw: m25p80: allow write_enable latch get/set adds 699db71520 aspeed: Introduce a get_irq AspeedSoCClass method adds ab5e86053d hw: aspeed: Add missing UART's adds c5e1bdb9e2 hw: aspeed: Add uarts_num SoC attribute adds 94d10f4210 hw: aspeed: Ensure AST1030 respects uart-default adds 470253b6d0 hw: aspeed: Introduce common UART init function adds 6827ff20b2 hw: aspeed: Init all UART's with serial devices adds 7b1d21a8ba hw/gpio Add GPIO read/write trace event. adds 17075ef244 hw/gpio: Add ASPEED GPIO model for AST1030 adds 247c00294a hw/gpio support GPIO index mode for write operation. adds 554c294514 hw/gpio: replace HWADDR_PRIx with PRIx64 adds 52bcd99780 hw/arm/aspeed: Add i2c devices for AST2600 EVB adds 6291d2588f Merge tag 'pull-aspeed-20220525' of https://github.com/legoa [...] adds 3a7a27cffb target/i386: Remove LBREn bit check when access Arch LBR MSRs adds f8d426a685 hostmem: default the amount of prealloc-threads to smp-cpus adds 3c7b72ddca thread-pool: optimize scheduling of completion bottom half adds 900fa208f5 thread-pool: replace semaphore with condition variable adds 232e925547 thread-pool: remove stopping variable adds c06ebc0f1b contrib/elf2dmp: add ELF dump header checking adds ab9f0f7d44 hw/audio/ac97: Coding style fixes to avoid checkpatch errors adds dafea9e286 hw/audio/ac97: Remove unimplemented reset functions adds dba2b2941c hw/audio/ac97: Remove unneeded local variables adds 267b5e7e37 target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-c [...] adds 758c925ee0 ide_ioport_read: Return lower octet of data register instead [...] adds 7110fe56c1 i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES adds 869840d26c i386: Hyper-V Enlightened MSR bitmap feature adds 9411e8b6fa i386: Hyper-V XMM fast hypercall input feature adds aa6bb5fad5 i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls adds 3aae0854b2 i386: Hyper-V Direct TLB flush hypercall adds 9ad6634ec9 i386: docs: Convert hyperv.txt to rST adds 58b53669e8 Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu [...]
No new revisions were added by this update.
Summary of changes: backends/hostmem.c | 2 +- contrib/elf2dmp/qemu_elf.c | 53 ++ docs/hyperv.txt | 270 -------- docs/system/arm/aspeed.rst | 62 ++ docs/system/i386/hyperv.rst | 288 ++++++++ docs/system/target-i386.rst | 1 + docs/tools/virtiofsd.rst | 2 +- hw/arm/aspeed.c | 74 +- hw/arm/aspeed_ast10x0.c | 48 +- hw/arm/aspeed_ast2600.c | 32 +- hw/arm/aspeed_soc.c | 46 +- hw/audio/ac97.c | 758 ++++++++++----------- hw/block/m25p80.c | 1 + hw/core/loader.c | 15 + hw/core/uboot_image.h | 213 ++++-- hw/gpio/aspeed_gpio.c | 257 ++++++- hw/gpio/trace-events | 4 + hw/ide/core.c | 6 +- hw/ide/macio.c | 4 +- hw/intc/riscv_aclint.c | 3 +- hw/riscv/opentitan.c | 2 +- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 28 +- hw/riscv/spike.c | 2 +- hw/riscv/virt.c | 27 +- hw/vfio/pci-quirks.c | 34 +- include/hw/arm/aspeed_soc.h | 13 + include/hw/gpio/aspeed_gpio.h | 16 +- linux-user/elfload.c | 12 +- linux-user/include/host/s390/host-signal.h | 7 + linux-user/linuxload.c | 12 +- linux-user/main.c | 4 +- linux-user/qemu.h | 12 +- linux-user/s390x/signal.c | 5 + linux-user/strace.c | 202 +++--- linux-user/strace.h | 4 +- linux-user/syscall.c | 83 ++- linux-user/uname.c | 4 +- linux-user/uname.h | 2 +- linux-user/user-internals.h | 18 +- qga/commands-posix.c | 123 ++++ qga/commands-win32.c | 11 + qga/main.c | 2 + qga/qapi-schema.json | 86 +++ semihosting/arm-compat-semi.c | 4 +- target/i386/cpu.c | 16 + target/i386/cpu.h | 5 +- target/i386/kvm/hyperv-proto.h | 9 +- target/i386/kvm/kvm.c | 76 ++- target/riscv/cpu.c | 91 ++- target/riscv/cpu.h | 12 +- target/riscv/cpu_helper.c | 4 +- target/riscv/csr.c | 26 +- target/riscv/insn_trans/trans_rvv.c.inc | 58 +- target/riscv/translate.c | 17 +- tests/docker/dockerfiles/fedora-win32-cross.docker | 2 +- tests/docker/dockerfiles/fedora-win64-cross.docker | 2 +- tests/qtest/aspeed_gpio-test.c | 40 +- tests/qtest/aspeed_smc-test.c | 43 ++ tests/qtest/libqtest.c | 24 + tests/qtest/libqtest.h | 22 + tests/tcg/s390x/signals-s390x.c | 69 +- util/thread-pool.c | 74 +- 63 files changed, 2235 insertions(+), 1209 deletions(-) delete mode 100644 docs/hyperv.txt create mode 100644 docs/system/i386/hyperv.rst