This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig in repository toolchain/ci/llvm-project.
from 0489682ef3b Merging r360405: adds 836f1e2be4c Merging r359891: ------------------------------------------ [...] new b73bafaff70 Correct test in r362634 new c8af2415480 Merging r359898: ------------------------------------------ [...] new 5b37d896a02 Merging r359899: ------------------------------------------ [...] new d95b14d04ee Merging r360293: ------------------------------------------ [...]
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 68 +++--- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 12 +- llvm/test/CodeGen/AMDGPU/add.ll | 83 ++------ .../ds-negative-offset-addressing-mode-loop.ll | 6 +- llvm/test/CodeGen/AMDGPU/fence-barrier.ll | 3 +- .../test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir | 230 +++++++++++++++++++++ .../AMDGPU/fold-immediate-operand-shrink.mir | 56 +++++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 3 +- llvm/test/CodeGen/AMDGPU/{add.ll => r600.add.ll} | 56 ----- llvm/test/CodeGen/AMDGPU/{sub.ll => r600.sub.ll} | 95 --------- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 2 +- llvm/test/CodeGen/AMDGPU/sub.ll | 90 ++++---- .../test/tools/llvm-objdump/AMDGPU/source-lines.ll | 4 +- 13 files changed, 401 insertions(+), 307 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir copy llvm/test/CodeGen/AMDGPU/{add.ll => r600.add.ll} (75%) copy llvm/test/CodeGen/AMDGPU/{sub.ll => r600.sub.ll} (63%)