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from 17f72131c2b AMDGPU: wave_barrier is not isBarrier new 47101319272 MIR: Freeze reserved regs after parsing everything new 68048d45d3f AMDGPU: Don't hardcode num defs for MUBUF instructions
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Summary of changes: lib/CodeGen/MIRParser/MIRParser.cpp | 11 +++++--- lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +-- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 4 +-- test/CodeGen/AMDGPU/endpgm-dce.mir | 1 + test/CodeGen/AMDGPU/misched-killflags.mir | 10 +++++--- .../rename-independent-subregs-mac-operands.mir | 12 +++++++-- .../MIR/AMDGPU/parse-order-reserved-regs.mir | 29 ++++++++++++++++++++++ 7 files changed, 59 insertions(+), 12 deletions(-) create mode 100644 test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir