[Tcwg-commits] [toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (025aeb9487c -> 1f9a518d8a1)

17 Nov 2018


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig
in repository toolchain/ci/llvm-monorepo.
from  025aeb9487c [clang-tidy] Fix reference to -[NSError init] in AvoidNSErr [...]
      adds  6610167d84f AMDHSA: More code object v3 fixes:
      adds  26d6696f797 [AMDGPU] NFC Test commit
      adds  f82205664f8 [WebAssembly] Split BBs after throw instructions
      adds  83a02e9b61d Re-apply r346985: [ADT] Drop llvm::Optional clang-specific  [...]
      adds  603a8573fd8 [WebAssembly] Change type of wake count to unsigned int
      adds  78b567fb139 [analyzer] ConversionChecker: handle floating point
      adds  928c4fd743a [CUDA] updated CompileCudaWithLLVM.rst
      adds  8fb027c0cfd [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs [...]
      adds  eeea3d23132 [VFS] Implement `RedirectingFileSystem::getRealPath`.
      adds  06c849c8777 [X86] Update a couple comments to remove a mention of a sig [...]
      adds  d974e75192a [X86] Use ANY_EXTEND instead of SIGN_EXTEND in the AVX2 and [...]
      adds  d2ff55ae288 [VFS] Implement `RedirectingFileSystem::getRealPath`.
      adds  099dd9ccb2d Added missing whitespace in the link.
      adds  24287ec17c5 [X86] Add some test cases for vector multiplies on vectors  [...]
      adds  9c0131580e0 Revert r347014 "[X86] Add some test cases for vector multip [...]
      adds  829fbcc3c28 [VFS] Update unittest to fix Windows buildbot.
      adds  79145fed181 [NativePDB] Rewrite the PdbSymUid to use our own custom nam [...]
      adds  c2bb1ca23a4 [Clang][Sema]Choose a better candidate in overload function [...]
      adds  5b80c33d001 Don't use uniform initialization syntax.
      adds  c8ad20bbada [CMake] Use the correct spelling for armv7 in Fuchsia's toolchain
      adds  dae709b025e [compiler-rt] Use exact spelling when building for default target
      adds  138eb6e77f1 [CMake] Support cross-compiling with multi-stage builds
      adds  53ddacef944 [CMake] Support cross-compiling with Fuchsia toolchain build
      adds  76e69eda418 AMDGPU: Fix analyzeBranch failing with pseudoterminators
      adds  a3b76406f07 [ELF][MIPS] Use MIPS R6 `sigrie` as a trap instruction
      adds  bcd8bc37e70 [X86] Add some test cases for vector multiplies on vectors  [...]
      adds  d139d805b75 [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul u [...]
      adds  e579f25e26f [ThinLTO] Internalize readonly globals
      adds  2583bfd4ffd [LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY [...]
      adds  59aa1cb4aea [clang] - Simplify tools::SplitDebugName.
      adds  0d9a93115a6 [clangd] Initial clang-tidy diagnostics support.
      adds  d5357cd9c15 [DAGCombine] Fix non-deterministic debug output
      adds  0bd2dae7adc Introduce shard storage to auto-index.
      adds  5a6696d0076 [clangd] Fix a compiler warning and test crashes caused in  [...]
      adds  c9b761e109c [MSP430] Add more tests for ABI and calling convention
      adds  f1d9df9d035 [MSP430] Add support for .refsym directive
      adds  08b9196394c [RISCV] Constant materialisation for RV64I
      adds  3bdb53bfdbf [RISCV][NFC] Define and use the new CA instruction format
      adds  e70e5536a1c [clangd] Truncate SymbolID to 8 bytes.
      adds  ec27209c7cd [TargetLowering] Cleanup more of the EXTEND demanded bits c [...]
      adds  3064202eefa Remove BUILD file from google-benchmark
      adds  094af196271 [lldb] NFC: Remove the extra ';'
      adds  e2070ba3d8c [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X`
      adds  da3e6308e8f [DWARF] Use PRIx64 instead of 'x' to format 64-bit values
      adds  02bbc4956c9 [IRVerifier] Allow StructRet in statepoint
      adds  b28c609e9e6 [x86] regenerate complete checks for test; NFC
      adds  6881f9126fc [libcxx] Mention restriction on inline namespaces in LIBCXX [...]
      adds  5976f9e685f [clang-tidy] Expanded a test NFC
      adds  4089049fc16 [X86][SSE] Move number of input limit out of resolveTargetS [...]
      adds  02d00b9a1f2 [InstSimplify] add test to demonstrate undef matching diffe [...]
      adds  f356005646c Makefile.rules: Use a shared clang module cache directory.
      adds  0995bfe8bcf Use a shared module cache directory for LLDB.
      adds  7d713d5f2af Typo
      adds  25372e02294 [OpenCL] Enable address spaces for references in C++
      adds  6a2e1d88f6e [InstSimplify] add tests for saturating add/sub; NFC
      adds  59469e38ca8 [CodeGen] Expose some data types and accessors from StackMaps
      adds  793854cedb5 [AST][NFC] Pack CXXBoolLiteralExpr
      adds  27a906a761f [AST][NFC] Pack CXXNullPtrLiteralExpr
      adds  3ed5220fe21 [AST][NFC] Pack CXXThisExpr
      adds  7e1c886d1f6 GlobalDCE: Teach isEmptyFunction() to ignore debug intrinsics.
      adds  a6119380571 [X86] Add codegen tests for scalar funnel shifts
      adds  cf919fed010 [SelectionDAG] Move (repeated) SDTIntShiftDOp double shift  [...]
      adds  ef5d7630a18 [CMake] Accept ENTITLEMENTS in add_llvm_executable and llvm [...]
      adds  f7e6c6d84ab [PowerPC] Make no-PIC default to match GCC - LLVM
      adds  becbcdba25a [PowerPC] Make no-PIC default to match GCC - CLANG
      adds  7927aa1288d Make path more robust so it also works with out-of-tree builds.
      adds  aef089897f8 [codeview] Expose -gcodeview-ghash for global type hashing
      adds  8efa3877a1b [WebAssembly] Default to static reloc model
      adds  6421f0dc8eb [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixup
      adds  b44e1b3ca2c Revert "[PowerPC] Make no-PIC default to match GCC - CLANG"
      adds  5aec7fd8f08 Revert "[PowerPC] Make no-PIC default to match GCC - LLVM"
      adds  f01b004d880 Support ARM_V4BX relocation
      adds  4118662c386 [X86] Disable Condbr_merge pass
      adds  18b788bc752 [MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls
      adds  b2a2911c099 [OPENMP][NVPTX]Emit correct reduction code for teams/parall [...]
      adds  b23282b0dd1 [hwasan] optionally right-align heap allocations
      adds  546af08d1a9 Add new interceptor for getmntinfo(3) from NetBSD
      adds  a2182d17b30 [SymbolFile] Remove unused function. NFCI.
      adds  c8ab49aefe4 [libcxx] Add missing includes in tests
      adds  8acb54df2b8 [FNeg] Add FNeg Instruction to LangRef document
      adds  037a850ff03 [Cocoa] Prefer llvm::SignExtend64. Pointed out by zturner.
      adds  04ccf2af96e Add new interceptor for mi_vector_hash(3)
      adds  73ce343f2bd AArch64: Emit a call frame instruction for the shadow call  [...]
      adds  c5a13810aa9 [PowerPC][NFC] Add tests for vector fp <-> int conversions
      adds  f5818452afc [hwasan] disable one test line while investigating a bot failure
      adds  b9d8c46d56e Preprocessing support in tablegen.
      adds  10511eb50d6 [X86] In LowerLoad, fix assert messages and rename a variab [...]
      adds  3d2513e5540 [LegalizeVectorOps] After custom legalizing an extending lo [...]
      adds  88787838f9c [X86] Remove a branch on SSE4.1 from LowerLoad
      adds  d556f50b20a [OPENMP]Fix PR39694: do not capture `this` in non-`this` region.
      adds  94709f33dec [SimpleLoopUnswitch] adding cost multiplier to cap exponent [...]
      adds  1f3d9b6b65f [WebAssembly] Cleanup unused declares in test code. NFC.
      adds  4693c9f5c3e [sanitizer] Update global_symbols.txt
      adds  5b091ac9239 [X86] Qualify part of the masked gather handling in Replace [...]
      adds  85507ecdf3c Cast _Unwind_GetIP() and _Unwind_GetRegionStart() to uintptr_t
      adds  c27a4ed1060 Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr
      adds  6d9e4e702b0 Speed up git-llvm script by only svn up'ing affected directories.
      adds  d719bb36c3f Makefile.rules: Degrade gracefully on Windows machines with [...]
      adds  01b08e9824d [X86] Add custom promotion of narrow fp_to_uint/fp_to_sint  [...]
       new  1f9a518d8a1 Revert "Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr"
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 clang-tools-extra/clangd/CMakeLists.txt            |   19 +
 clang-tools-extra/clangd/ClangdUnit.cpp            |   83 +-
 clang-tools-extra/clangd/XRefs.cpp                 |    3 +-
 clang-tools-extra/clangd/index/Background.cpp      |   65 +-
 clang-tools-extra/clangd/index/Background.h        |   42 +-
 .../clangd/index/BackgroundIndexStorage.cpp        |  112 ++
 clang-tools-extra/clangd/index/Index.h             |    3 +-
 clang-tools-extra/clangd/index/Serialization.cpp   |    4 +-
 ...onsistent-declaration-parameter-name-macros.cpp |   38 +-
 .../unittests/clangd/BackgroundIndexTests.cpp      |   82 +-
 .../unittests/clangd/ClangdUnitTests.cpp           |   25 +
 .../unittests/clangd/SerializationTests.cpp        |   16 +-
 clang/CMakeLists.txt                               |   33 +-
 clang/cmake/caches/Fuchsia-stage2.cmake            |    2 +-
 clang/cmake/caches/Fuchsia.cmake                   |   33 +-
 clang/include/clang/AST/ExprCXX.h                  |   69 +-
 clang/include/clang/AST/Stmt.h                     |   36 +
 clang/include/clang/Basic/BuiltinsWebAssembly.def  |    2 +-
 clang/include/clang/Driver/Options.td              |    6 +
 clang/include/clang/Frontend/CodeGenOptions.def    |    3 +
 clang/include/clang/Sema/Sema.h                    |    4 +
 clang/lib/AST/Expr.cpp                             |   19 +-
 clang/lib/CodeGen/CGExpr.cpp                       |    9 +-
 clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp         |  407 +++---
 clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h           |    4 +
 clang/lib/CodeGen/CodeGenModule.cpp                |    3 +
 clang/lib/Driver/ToolChains/Clang.cpp              |   13 +-
 clang/lib/Driver/ToolChains/CommonArgs.cpp         |   19 +-
 clang/lib/Driver/ToolChains/CommonArgs.h           |    2 +-
 clang/lib/Driver/ToolChains/Gnu.cpp                |    2 +-
 clang/lib/Driver/ToolChains/MinGW.cpp              |    2 +-
 clang/lib/Frontend/CompilerInvocation.cpp          |    1 +
 clang/lib/Sema/DeclSpec.cpp                        |    6 +-
 clang/lib/Sema/SemaDecl.cpp                        |   12 +-
 clang/lib/Sema/SemaExprCXX.cpp                     |   22 +-
 clang/lib/Sema/SemaInit.cpp                        |   31 +-
 clang/lib/Sema/SemaOpenMP.cpp                      |   11 +-
 clang/lib/Sema/SemaOverload.cpp                    |   25 +
 clang/lib/Sema/SemaType.cpp                        |    3 +-
 .../StaticAnalyzer/Checkers/ConversionChecker.cpp  |   55 +-
 clang/test/Analysis/conversion.c                   |   31 +-
 clang/test/CodeGen/builtins-wasm.c                 |    2 +-
 clang/test/CodeGenCXX/debug-info-ms-abi.cpp        |    4 +
 .../CodeGenOpenCLCXX/address-space-deduction.cl    |   46 +
 clang/test/OpenMP/nvptx_data_sharing.cpp           |    2 +-
 ...tx_distribute_parallel_generic_mode_codegen.cpp |    2 +-
 clang/test/OpenMP/nvptx_lambda_capturing.cpp       |   27 +-
 clang/test/OpenMP/nvptx_parallel_codegen.cpp       |    2 +-
 clang/test/OpenMP/nvptx_parallel_for_codegen.cpp   |    2 +-
 .../nvptx_target_parallel_reduction_codegen.cpp    |  107 +-
 ...arget_teams_distribute_parallel_for_codegen.cpp |    2 +-
 ..._teams_distribute_parallel_for_simd_codegen.cpp |    2 +-
 clang/test/OpenMP/nvptx_teams_codegen.cpp          |    4 +-
 .../test/OpenMP/nvptx_teams_reduction_codegen.cpp  |  410 +++++-
 clang/test/Sema/altivec-generic-overload.c         |  100 ++
 clang/test/SemaCXX/vector.cpp                      |    8 +-
 clang/test/VFS/subframework-symlink.m              |   23 +
 compiler-rt/cmake/Modules/CompilerRTUtils.cmake    |    5 +-
 compiler-rt/lib/builtins/gcc_personality_v0.c      |    5 +-
 compiler-rt/lib/hwasan/hwasan_allocator.cc         |   81 +-
 compiler-rt/lib/hwasan/hwasan_allocator.h          |    3 +-
 compiler-rt/lib/hwasan/hwasan_flags.inc            |   27 +
 .../sanitizer_common_interceptors.inc              |   36 +
 .../sanitizer_platform_interceptors.h              |    2 +
 .../symbolizer/scripts/global_symbols.txt          |    3 +
 .../test/hwasan/TestCases/heap-buffer-overflow.c   |   36 +-
 .../test/hwasan/TestCases/random-align-right.c     |   35 +
 compiler-rt/test/hwasan/TestCases/use-after-free.c |    4 +-
 .../TestCases/NetBSD/getmntinfo.cc                 |   25 +
 .../TestCases/NetBSD/mi_vector_hash.cc             |   19 +
 libcxx/docs/BuildingLibcxx.rst                     |    4 +-
 .../unord.map/unord.map.cnstr/assign_init.pass.cpp |    1 +
 .../unord.map/unord.map.cnstr/assign_move.pass.cpp |    1 +
 .../unord/unord.map/unord.map.cnstr/init.pass.cpp  |    1 +
 .../unord/unord.map/unord.map.cnstr/range.pass.cpp |    1 +
 .../unord.multimap.cnstr/assign_copy.pass.cpp      |    2 +
 .../unord.multimap.cnstr/assign_init.pass.cpp      |    1 +
 .../unord.multimap.cnstr/assign_move.pass.cpp      |    1 +
 .../unord.multimap.cnstr/init.pass.cpp             |    1 +
 .../unord.multimap.cnstr/range.pass.cpp            |    1 +
 .../unord/unord.multiset/erase_range.pass.cpp      |    1 +
 .../unord.multiset.cnstr/assign_copy.pass.cpp      |    2 +
 .../unord.multiset.cnstr/assign_init.pass.cpp      |    1 +
 .../unord.multiset.cnstr/assign_move.pass.cpp      |    1 +
 .../unord.multiset.cnstr/init.pass.cpp             |    1 +
 .../unord.multiset.cnstr/range.pass.cpp            |    1 +
 .../unord/unord.set/erase_range.pass.cpp           |    1 +
 .../unord.set/unord.set.cnstr/assign_copy.pass.cpp |    2 +
 .../unord.set/unord.set.cnstr/assign_init.pass.cpp |    1 +
 .../unord.set/unord.set.cnstr/assign_move.pass.cpp |    1 +
 .../unord/unord.set/unord.set.cnstr/init.pass.cpp  |    1 +
 .../unord/unord.set/unord.set.cnstr/range.pass.cpp |    1 +
 libcxx/utils/google-benchmark/test/BUILD           |   65 -
 lld/ELF/Arch/ARM.cpp                               |    6 +
 lld/ELF/Arch/Mips.cpp                              |    4 +-
 lld/test/ELF/mips-got16-relocatable.s              |    8 +-
 lld/test/ELF/mips-npic-call-pic-os.s               |   35 +-
 lld/test/ELF/mips-npic-call-pic-script.s           |  114 +-
 lld/test/ELF/mips-npic-call-pic.s                  |   25 +-
 lld/test/ELF/mips-traps.s                          |   22 +
 lld/test/ELF/v4bx.yaml                             |   38 +
 lldb/lit/lit.cfg.py                                |   13 +-
 lldb/packages/Python/lldbsuite/test/lldbtest.py    |    5 +-
 .../Python/lldbsuite/test/make/Makefile.rules      |    7 +-
 .../Plugins/Language/CPlusPlus/LibCxxVariant.cpp   |    2 +-
 lldb/source/Plugins/Language/ObjC/Cocoa.cpp        |    3 +-
 .../Plugins/SymbolFile/NativePDB/CMakeLists.txt    |    1 +
 .../SymbolFile/NativePDB/CompileUnitIndex.cpp      |   28 +-
 .../SymbolFile/NativePDB/CompileUnitIndex.h        |   12 +-
 .../Plugins/SymbolFile/NativePDB/PdbIndex.cpp      |   14 +-
 .../source/Plugins/SymbolFile/NativePDB/PdbIndex.h |    2 +-
 .../Plugins/SymbolFile/NativePDB/PdbSymUid.cpp     |  161 +++
 .../Plugins/SymbolFile/NativePDB/PdbSymUid.h       |  244 +---
 .../Plugins/SymbolFile/NativePDB/PdbUtil.cpp       |   15 +
 lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h |   11 +
 .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp   |  333 ++---
 .../SymbolFile/NativePDB/SymbolFileNativePDB.h     |   39 +-
 .../SymbolFile/NativePDB/UdtRecordCompleter.cpp    |   12 +-
 .../SymbolFile/NativePDB/UdtRecordCompleter.h      |    4 +-
 lldb/test/CMakeLists.txt                           |    2 +-
 llvm/CMakeLists.txt                                |    4 +-
 llvm/cmake/modules/AddLLVM.cmake                   |   28 +-
 llvm/cmake/modules/LLVMExternalProjectUtils.cmake  |   29 +-
 llvm/docs/CompileCudaWithLLVM.rst                  |   41 +-
 llvm/docs/LangRef.rst                              |   52 +-
 llvm/docs/TableGen/LangRef.rst                     |   49 +-
 llvm/include/llvm/ADT/Optional.h                   |   18 -
 llvm/include/llvm/CodeGen/StackMaps.h              |   44 +-
 .../include/llvm/DebugInfo/CodeView/SymbolRecord.h |    1 +
 llvm/include/llvm/IR/ModuleSummaryIndex.h          |   50 +-
 llvm/include/llvm/Target/TargetSelectionDAG.td     |    3 +
 llvm/include/llvm/Transforms/IPO/FunctionImport.h  |    8 +
 .../llvm/Transforms/Utils/FunctionImportUtils.h    |    1 -
 llvm/lib/Analysis/ModuleSummaryAnalysis.cpp        |   75 +-
 llvm/lib/AsmParser/LLParser.cpp                    |    3 +-
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |   51 +-
 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp          |   22 +-
 llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp      |    8 +-
 llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h        |    3 +
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |    8 +-
 .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp |   12 +-
 .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp   |    2 +
 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp   |   21 +-
 llvm/lib/CodeGen/WasmEHPrepare.cpp                 |   62 +-
 llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp         |    4 +-
 llvm/lib/IR/ModuleSummaryIndex.cpp                 |  107 +-
 llvm/lib/IR/Verifier.cpp                           |   16 +-
 llvm/lib/LTO/LTO.cpp                               |    5 +-
 llvm/lib/LTO/ThinLTOCodeGenerator.cpp              |   19 +-
 llvm/lib/Linker/IRMover.cpp                        |    5 -
 llvm/lib/Support/VirtualFileSystem.cpp             |   33 +-
 llvm/lib/TableGen/Main.cpp                         |    6 +-
 llvm/lib/TableGen/TGLexer.cpp                      |  557 +++++++-
 llvm/lib/TableGen/TGLexer.h                        |  243 +++-
 llvm/lib/TableGen/TGParser.h                       |    5 +-
 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp   |   31 +-
 llvm/lib/Target/AMDGPU/AMDGPU.h                    |    4 +
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |    2 +-
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp     |    2 +
 llvm/lib/Target/AMDGPU/CMakeLists.txt              |    1 +
 llvm/lib/Target/AMDGPU/FLATInstructions.td         |   23 +-
 llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp       |  224 +++
 llvm/lib/Target/AMDGPU/SIInsertSkips.cpp           |    2 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |   29 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.h               |    3 +
 llvm/lib/Target/AMDGPU/SIInstrInfo.td              |    9 +
 llvm/lib/Target/AMDGPU/SIInstructions.td           |    3 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp    |    4 +-
 .../Target/MSP430/AsmParser/MSP430AsmParser.cpp    |   13 +
 .../MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp  |    2 +-
 llvm/lib/Target/MSP430/MSP430ISelLowering.cpp      |    9 +-
 llvm/lib/Target/NVPTX/NVPTXInstrInfo.td            |    3 -
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp        |   29 +-
 llvm/lib/Target/RISCV/RISCVInstrFormats.td         |    9 +-
 llvm/lib/Target/RISCV/RISCVInstrFormatsC.td        |   13 +
 llvm/lib/Target/RISCV/RISCVInstrInfoC.td           |   21 +-
 llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h        |    7 +-
 .../WebAssembly/WebAssemblyLateEHPrepare.cpp       |   58 +-
 .../WebAssembly/WebAssemblyTargetMachine.cpp       |    8 +-
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp            |   20 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |  167 ++-
 llvm/lib/Target/X86/X86InstrInfo.td                |    4 -
 llvm/lib/Target/X86/X86TargetMachine.cpp           |    2 +-
 llvm/lib/Transforms/IPO/FunctionImport.cpp         |   39 +-
 llvm/lib/Transforms/IPO/GlobalDCE.cpp              |   15 +-
 llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp  |  118 +-
 llvm/lib/Transforms/Utils/FunctionImportUtils.cpp  |   21 +-
 llvm/test/Bitcode/summary_version.ll               |    2 +-
 llvm/test/Bitcode/thinlto-alias.ll                 |    4 +-
 llvm/test/Bitcode/thinlto-alias2.ll                |    2 +-
 .../thinlto-function-summary-callgraph-cast.ll     |    4 +-
 .../thinlto-function-summary-callgraph-pgo.ll      |    4 +-
 ...o-function-summary-callgraph-profile-summary.ll |    4 +-
 .../thinlto-function-summary-callgraph-relbf.ll    |    2 +-
 ...ion-summary-callgraph-sample-profile-summary.ll |    4 +-
 .../Bitcode/thinlto-function-summary-callgraph.ll  |    4 +-
 .../Bitcode/thinlto-function-summary-refgraph.ll   |   12 +-
 llvm/test/CodeGen/AArch64/shadow-call-stack.ll     |    1 +
 llvm/test/CodeGen/AMDGPU/ds_write2.ll              |   12 +-
 llvm/test/CodeGen/AMDGPU/ds_write2st64.ll          |   12 +-
 .../CodeGen/AMDGPU/global-load-store-atomics.mir   |  249 ++++
 llvm/test/CodeGen/AMDGPU/global-saddr.ll           |  102 ++
 .../CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll  |   85 ++
 .../AMDGPU/indirect-addressing-si-pregfx9.ll       |   88 ++
 llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll |   73 +-
 .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll |   32 +-
 .../insert_vector_elt.v2i16.subtest-nosaddr.ll     |   36 +
 .../insert_vector_elt.v2i16.subtest-saddr.ll       |   36 +
 llvm/test/CodeGen/AMDGPU/madak.ll                  |   12 +-
 llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll  |    2 +-
 llvm/test/CodeGen/AMDGPU/memory-legalizer-store.ll |    2 +-
 llvm/test/CodeGen/AMDGPU/memory_clause.ll          |    2 +-
 .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll  |   15 +-
 .../CodeGen/AMDGPU/verifier-pseudo-terminators.mir |   23 +
 llvm/test/CodeGen/MSP430/callee-saved.ll           |   38 +
 llvm/test/CodeGen/MSP430/calls.ll                  |   22 +
 llvm/test/CodeGen/MSP430/cc_args.ll                |   79 ++
 llvm/test/CodeGen/MSP430/interrupt.ll              |   49 +
 llvm/test/CodeGen/MSP430/libcalls.ll               |   35 +
 llvm/test/CodeGen/MSP430/struct-return.ll          |   36 +-
 .../CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll   | 1474 +++++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll   |  846 +++++++++++
 .../CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll    | 1486 ++++++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll   | 1304 +++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll   |  598 ++++++++
 .../CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll    | 1316 +++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll |  304 ++++
 .../CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll |  438 ++++++
 .../CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll   | 1366 ++++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll   |  828 +++++++++++
 .../CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll   |  518 +++++++
 .../CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll   |  844 +++++++++++
 .../CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll    | 1382 ++++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll    | 1322 +++++++++++++++++
 .../CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll |  304 ++++
 .../CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll |  438 ++++++
 llvm/test/CodeGen/RISCV/imm.ll                     |  211 ++-
 llvm/test/CodeGen/WebAssembly/byval.ll             |    3 -
 llvm/test/CodeGen/WebAssembly/exception.ll         |    9 +-
 llvm/test/CodeGen/WebAssembly/global.ll            |    2 +-
 llvm/test/CodeGen/WebAssembly/indirect-import.ll   |    9 +-
 llvm/test/CodeGen/WebAssembly/vtable.ll            |    8 +-
 llvm/test/CodeGen/WebAssembly/wasmehprepare.ll     |   30 +-
 llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll  |   79 +-
 llvm/test/CodeGen/X86/O3-pipeline.ll               |    1 -
 llvm/test/CodeGen/X86/avx2-arith.ll                |   24 +-
 llvm/test/CodeGen/X86/avx512-cvt-widen.ll          |   42 +-
 llvm/test/CodeGen/X86/combine-mul.ll               |    2 +-
 llvm/test/CodeGen/X86/condbr_if.ll                 |   14 +-
 llvm/test/CodeGen/X86/condbr_switch.ll             |   14 +-
 llvm/test/CodeGen/X86/extract-bits.ll              |  406 +++---
 llvm/test/CodeGen/X86/fshl.ll                      |  268 ++++
 llvm/test/CodeGen/X86/fshr.ll                      |  264 ++++
 llvm/test/CodeGen/X86/pmul.ll                      |  108 +-
 llvm/test/CodeGen/X86/vec_cast2.ll                 |   94 +-
 llvm/test/CodeGen/X86/vec_cast3.ll                 |   28 +-
 llvm/test/CodeGen/X86/vec_fp_to_int-widen.ll       |  334 +----
 llvm/test/CodeGen/X86/vector-mul.ll                |    6 +-
 llvm/test/CodeGen/X86/vector-reduce-mul.ll         |  832 +++++------
 llvm/test/CodeGen/X86/vector-shift-shl-128.ll      |    2 +-
 llvm/test/CodeGen/X86/widen_mul.ll                 |  148 ++
 llvm/test/DebugInfo/COFF/global-type-hashes.ll     |    9 +-
 llvm/test/MC/AMDGPU/hsa-diag-v3.s                  |    2 +-
 llvm/test/MC/AMDGPU/hsa-metadata-kernel-args.s     |    6 +-
 llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs.s    |    6 +-
 .../MC/AMDGPU/hsa-metadata-kernel-code-props.s     |    6 +-
 .../MC/AMDGPU/hsa-metadata-kernel-debug-props.s    |    6 +-
 llvm/test/MC/AMDGPU/hsa-metadata-unknown-key.s     |   12 +-
 llvm/test/MC/MSP430/refsym.s                       |   14 +
 llvm/test/MC/MSP430/reloc.s                        |    5 +
 llvm/test/MC/WebAssembly/event-section.ll          |    7 +-
 llvm/test/TableGen/prep-diag1.td                   |   26 +
 llvm/test/TableGen/prep-diag10.td                  |    6 +
 llvm/test/TableGen/prep-diag11-include.inc         |    1 +
 llvm/test/TableGen/prep-diag11.td                  |    8 +
 llvm/test/TableGen/prep-diag12-include.inc         |    2 +
 llvm/test/TableGen/prep-diag12.td                  |    8 +
 llvm/test/TableGen/prep-diag13.td                  |    9 +
 llvm/test/TableGen/prep-diag14.td                  |    6 +
 llvm/test/TableGen/prep-diag2.td                   |   14 +
 llvm/test/TableGen/prep-diag3.td                   |   14 +
 llvm/test/TableGen/prep-diag4.td                   |    8 +
 llvm/test/TableGen/prep-diag5.td                   |    6 +
 llvm/test/TableGen/prep-diag6.td                   |    7 +
 llvm/test/TableGen/prep-diag7.td                   |    4 +
 llvm/test/TableGen/prep-diag8.td                   |    5 +
 llvm/test/TableGen/prep-diag9.td                   |    5 +
 llvm/test/TableGen/prep-region-include.inc         |    8 +
 llvm/test/TableGen/prep-region-processing.td       |  150 ++
 .../TableGen/unterminated-c-comment-include.inc    |    2 +
 llvm/test/TableGen/unterminated-c-comment.td       |    5 +
 .../TableGen/unterminated-code-block-include.inc   |    8 +
 llvm/test/TableGen/unterminated-code-block.td      |    5 +
 .../ThinLTO/X86/Inputs/index-const-prop-alias.ll   |    5 +
 .../X86/Inputs/index-const-prop-cache-foo.ll       |   19 +
 .../X86/Inputs/index-const-prop-cache-test1.ll     |   10 +
 .../X86/Inputs/index-const-prop-cache-test2.ll     |   14 +
 .../ThinLTO/X86/Inputs/index-const-prop-comdat.ll  |    5 +
 .../X86/Inputs/index-const-prop-define-g.ll        |    4 +
 .../X86/Inputs/index-const-prop-full-lto.ll        |   12 +
 .../ThinLTO/X86/Inputs/index-const-prop-gvref.ll   |    5 +
 .../ThinLTO/X86/Inputs/index-const-prop-linkage.ll |   15 +
 llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll   |   64 +
 llvm/test/ThinLTO/X86/dot-dumper.ll                |   10 +-
 llvm/test/ThinLTO/X86/globals-import-const-fold.ll |    4 +-
 llvm/test/ThinLTO/X86/index-const-prop-O0.ll       |   18 +
 llvm/test/ThinLTO/X86/index-const-prop-alias.ll    |   42 +
 llvm/test/ThinLTO/X86/index-const-prop-cache.ll    |   41 +
 llvm/test/ThinLTO/X86/index-const-prop-comdat.ll   |   17 +
 llvm/test/ThinLTO/X86/index-const-prop-dead.ll     |   26 +
 llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll |   24 +
 llvm/test/ThinLTO/X86/index-const-prop-gvref.ll    |   27 +
 llvm/test/ThinLTO/X86/index-const-prop-ldst.ll     |   21 +
 llvm/test/ThinLTO/X86/index-const-prop-linkage.ll  |   27 +
 llvm/test/ThinLTO/X86/index-const-prop.ll          |   40 +
 llvm/test/ThinLTO/X86/index-const-prop2.ll         |   59 +
 llvm/test/Transforms/GlobalDCE/global_ctors.ll     |   25 +-
 .../Transforms/InstSimplify/saturating-add-sub.ll  |  448 ++++++
 .../InstSimplify/shr-scalar-vector-consistency.ll  |   25 +
 .../exponential-nontrivial-unswitch-nested.ll      |  139 ++
 .../exponential-nontrivial-unswitch-nested2.ll     |  149 ++
 .../exponential-nontrivial-unswitch.ll             |   80 ++
 .../exponential-nontrivial-unswitch2.ll            |   56 +
 .../exponential-switch-unswitch.ll                 |  118 ++
 llvm/test/Verifier/statepoint.ll                   |   18 +
 llvm/unittests/ADT/OptionalTest.cpp                |    8 -
 llvm/unittests/Support/VirtualFileSystemTest.cpp   |   46 +
 llvm/utils/git-svn/git-llvm                        |  102 +-
 328 files changed, 24126 insertions(+), 2890 deletions(-)
 create mode 100644 clang-tools-extra/clangd/index/BackgroundIndexStorage.cpp
 create mode 100644 clang/test/CodeGenOpenCLCXX/address-space-deduction.cl
 create mode 100644 clang/test/Sema/altivec-generic-overload.c
 create mode 100644 clang/test/VFS/subframework-symlink.m
 create mode 100644 compiler-rt/test/hwasan/TestCases/random-align-right.c
 create mode 100644 compiler-rt/test/sanitizer_common/TestCases/NetBSD/getmntinfo.cc
 create mode 100644 compiler-rt/test/sanitizer_common/TestCases/NetBSD/mi_vector_hash.cc
 delete mode 100644 libcxx/utils/google-benchmark/test/BUILD
 create mode 100644 lld/test/ELF/mips-traps.s
 create mode 100644 lld/test/ELF/v4bx.yaml
 create mode 100644 lldb/source/Plugins/SymbolFile/NativePDB/PdbSymUid.cpp
 create mode 100644 llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
 create mode 100644 llvm/test/CodeGen/AMDGPU/global-load-store-atomics.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/global-saddr.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir
 create mode 100644 llvm/test/CodeGen/MSP430/callee-saved.ll
 create mode 100644 llvm/test/CodeGen/MSP430/calls.ll
 create mode 100644 llvm/test/CodeGen/MSP430/interrupt.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
 create mode 100644 llvm/test/CodeGen/X86/fshl.ll
 create mode 100644 llvm/test/CodeGen/X86/fshr.ll
 create mode 100644 llvm/test/CodeGen/X86/widen_mul.ll
 create mode 100644 llvm/test/MC/MSP430/refsym.s
 create mode 100644 llvm/test/TableGen/prep-diag1.td
 create mode 100644 llvm/test/TableGen/prep-diag10.td
 create mode 100644 llvm/test/TableGen/prep-diag11-include.inc
 create mode 100644 llvm/test/TableGen/prep-diag11.td
 create mode 100644 llvm/test/TableGen/prep-diag12-include.inc
 create mode 100644 llvm/test/TableGen/prep-diag12.td
 create mode 100644 llvm/test/TableGen/prep-diag13.td
 create mode 100644 llvm/test/TableGen/prep-diag14.td
 create mode 100644 llvm/test/TableGen/prep-diag2.td
 create mode 100644 llvm/test/TableGen/prep-diag3.td
 create mode 100644 llvm/test/TableGen/prep-diag4.td
 create mode 100644 llvm/test/TableGen/prep-diag5.td
 create mode 100644 llvm/test/TableGen/prep-diag6.td
 create mode 100644 llvm/test/TableGen/prep-diag7.td
 create mode 100644 llvm/test/TableGen/prep-diag8.td
 create mode 100644 llvm/test/TableGen/prep-diag9.td
 create mode 100644 llvm/test/TableGen/prep-region-include.inc
 create mode 100644 llvm/test/TableGen/prep-region-processing.td
 create mode 100644 llvm/test/TableGen/unterminated-c-comment-include.inc
 create mode 100644 llvm/test/TableGen/unterminated-c-comment.td
 create mode 100644 llvm/test/TableGen/unterminated-code-block-include.inc
 create mode 100644 llvm/test/TableGen/unterminated-code-block.td
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-alias.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-foo.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-test1.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-test2.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-comdat.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-define-g.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-full-lto.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-gvref.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-linkage.ll
 create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-O0.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-alias.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-cache.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-comdat.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-dead.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-gvref.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-ldst.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-linkage.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop.ll
 create mode 100644 llvm/test/ThinLTO/X86/index-const-prop2.ll
 create mode 100644 llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
 create mode 100644 llvm/test/Transforms/InstSimplify/shr-scalar-vector-consistency.ll
 create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...]
 create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...]
 create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...]
 create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...]
 create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll
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[Tcwg-commits] [toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (025aeb9487c -> 1f9a518d8a1)