This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project.

from 4a0267e3ad8 Convert a reachable llvm_unreachable into an assert. adds 47ec8702cbc [mlir][Linalg] Revisit 0-D abstraction adds c8f0d27ef37 [AMDGPU] Fix the gfx10 scheduling model for f32 conversions adds 7ce1e7ab075 [mlir][NFC] Move the operation interfaces out of Analysis/ [...] adds 153720a0a56 [mlir][NFC] Move the interfaces and traits for side effects [...] adds 1090a830692 [mlir][vulkan-runner] Update mlir-vulkan-runner execution driver. adds f9e63891597 [Concepts] Add FoundDecl to ConceptSpecializationExpr seria [...] adds 7fb562c1ab3 [Concepts] Add constraints checks to isSameEntity adds 2eff566b07d [MLIR] Add `and`, `or`, `xor`, `min`, `max` too gpu.all_red [...] adds 5b0c60c58ea [mlir][vulkan-runner] Use std::make_tuple to create tuple adds ebdb98f254f [clang-tidy] Move fuchsia-restrict-system-includes to porta [...] adds 7ecc743c5de [gn build] Port ebdb98f254f adds 484402abaca [clangd] Run clang-format on CodeComplete.cpp and SourceCod [...] adds 445195ba6ce [clangd] Have visibleNamespaces() and getEligiblePoints() t [...] adds 72aa619a7fe Warn of uninitialized variables on asm goto's indirect branch adds ddfcda0256c [clang-tidy] Fix warning from my previous patch in ReleaseN [...] adds 40568fec7e3 [CodeGen] Emit destructor calls to destruct compound literals adds 9769e1ee9ac [Concepts] Fix incorrect DeclContext for transformed Requir [...] adds 75af694a6da [CodeGenObjC] Place property names in __objc_methname adds 200b20639ac AMDGPU: Use V_MAC_F32 for fmad.ftz adds 5c845c1c50a PR45083: Mark statement expressions as being dependent if t [...] adds a13417352ad [libc++] Properly mark std::function as deprecated in C++03 adds fde9d33f710 [libc++abi] Change __cxa_finalize return type to void adds c0f4408d76f [mlir] Create a std op instead of chain of ops. adds 0b017c85ca2 Revert "[libc++abi] Change __cxa_finalize return type to void" adds ce8a1f72944 GlobalISel: Implement fewerElementsVector for G_TRUNC adds 218dd339541 Add triple for non-x86 environments. adds edd0dfca0db AMDGPU/GlobalISel: Refine G_TRUNC legality rules adds aed57125220 [RuntimeDyld] Allow multi-line rtdyld-check and jitlink-che [...] adds 337e131ca7d [RuntimeDyld][COFF] Build stubs for COFF dllimport symbols. adds d07f9e73096 [AMDGPU] Allow struct.buffer.*.format intrinsics to accept i32 adds 4cba668ac13 Fix crash-on-invalid when trying to recover from a function [...] adds 54928ba0ec8 [clang-tidy] Use more widely available headers for protabil [...] adds 48121a5743b [cmake] Link libclangDaemonTweaks with clangFormat adds 1c70dec18c7 [libunwind] Remove __FILE__ and __LINE__ from error reporting adds 206d46a192c AMDGPU/GlobalISel: Add some tests that used to infinite loop adds b17a81f8b23 GlobalISel: Add missing add/sub with carries to MachineIRBuilder adds c0ad75e7587 GlobalISel: Don't try to narrow extending loads/trunc store adds 14a1b80e044 Make IEEEFloat::roundToIntegral more standard conformant adds 37fa9d65eaa [CodeGen][ObjC] Don't extend lifetime of ObjC pointers pass [...] adds 4016c6b07f2 [lldb/Reproducer] Prevent crash when GDB multi-loader can't [...] adds 5edf900da0d [NFC][Test] Format the test PowerPC/recipest.ll with update [...] adds 2f857eadf5d [AMDGPU] Use script to generate atomic optimizations test adds 9304decdeeb [NFC][Test] Add a PowerPC test to verify the behavior of a* [...] adds 8a125532231 [ARM] Improve codegen of volatile load/store of i64 adds a6d3bec83fc [TTI][ARM][MVE] Refine gather/scatter cost model adds 326bc1da45b [Object] Fix handling of large archive members adds 8d9886f8936 [gn build] Port 326bc1da45b adds 6d5603e2d22 [LLD][ELF] Add initial LLD LinkerScript docs page adds b3b4727a3e7 [X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL [...] adds d941df363d1 [NFC][ARM] Reorder some logic adds 51cad66e97f [NFC][ARM] Add test adds 5c917bd9a7d [clang-format] No space in `new()` and `this[Type x]` in C# adds 1fb9c29833a [clang-format] Improved identification of C# nullables adds f6790a1c635 Revert "[MLIR] Add `and`, `or`, `xor`, `min`, `max` too gpu [...] adds c7380995f81 [MLIR] Add `and`, `or`, `xor`, `min`, `max` too gpu.all_red [...] adds c422d69b1ad [LIBOMPTARGET]Fix PR45139: Bug in mixing Python and OpenMP [...] adds 31c85ca06d7 [compiler-rt][tsan] Make fiber support in thread sanitizer [...] adds edbf2fde14a [analyzer] Fix a strange compile error on a certain Clang-7.0.0 adds b94d4b19034 [unittests][Object] Use matching signedness for expected value adds f3ad6eb5d3d Change to individual pretty printer classes, remove generic [...] adds fc421d7ca3e [MLIR] Remove all-reduce lowering from GPU to NVVM. Use in- [...] adds a2202f6a3f1 AMDGPU/GlobalISel: Manually RegBankSelect copies adds d83ade45060 [clangd] Improve the "max limit" error message in rename, NFC. adds 72bf26feb3a [ARM] Extra VFMA tests. NFC adds 2150a6d0d63 [Object][unittest] Skip tests on machines with non-64 bit size_t adds fbf41b52677 [ELF] Simplify sh_addr computation and warn if sh_addr is n [...] adds 0396aa4c05a Add a decorator option to skip tests based on a default setting. adds e6716418442 [GC] Remove buggy untested optimization from statepoint lowering adds a9f15832287 [AArch64][SVE] Add the @llvm.aarch64.sve.sel intrinsic adds 8ffdabdb61e Lazily save initialState of registers during unwind. adds 0d7c8c07d2a [OPENMP][DOCS]Mark depobj as implemented, NFC. adds bc6c8c4bbbe [Matrix] Add remark propagation along the inlined-at chain. adds a46dba24fa3 [AMDGPU] Extend macro fusion for ADDC and SUBB to SUBBREV adds ed77efeff18 [libc++] [cmake] Better diagnostics for missing abi library [...] adds 8eb2f865c30 [CodeGenPrepare] Fold br(freeze(icmp x, const)) to br(icmp( [...] adds ced0dd8e510 [MLIR] Guard DMA-specific logic with DMA option adds 9801e5469b4 [AMDGPU] Disable nested endcf collapse new 4dde9e9b023 [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict [...] new 0197eac3330 Temporarily re-apply https://reviews.llvm.org/D74347 new dc120bae46d [MLIR] Do not link mlir-cpu-runner with X86 libs new d8f9416fdc8 [DAG] MatchRotate - Add funnel shift by immediate support

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../clang-tidy/fuchsia/CMakeLists.txt | 1 - .../clang-tidy/fuchsia/FuchsiaTidyModule.cpp | 3 - .../clang-tidy/portability/CMakeLists.txt | 1 + .../portability/PortabilityTidyModule.cpp | 3 + .../RestrictSystemIncludesCheck.cpp | 6 +- .../RestrictSystemIncludesCheck.h | 14 +- clang-tools-extra/clangd/CodeComplete.cpp | 7 +- clang-tools-extra/clangd/SourceCode.cpp | 224 +- clang-tools-extra/clangd/SourceCode.h | 4 +- clang-tools-extra/clangd/refactor/Rename.cpp | 6 +- .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/DefineOutline.cpp | 15 +- .../clangd/unittests/SourceCodeTests.cpp | 21 +- clang-tools-extra/docs/ReleaseNotes.rst | 3 + .../checks/fuchsia-restrict-system-includes.rst | 32 - clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 +- .../portability-restrict-system-includes.rst | 51 + .../a.h | 0 .../system/cstdarg.h | 0 .../system/cstdlib.h | 0 .../system/j.h | 0 .../system/r.h | 0 .../system/s.h | 0 .../system/t.h | 0 .../system/transitive.h | 0 .../transitive2.h | 0 .../fuchsia-restrict-system-includes-all.cpp | 10 - .../fuchsia-restrict-system-includes-glob.cpp | 9 - .../checkers/fuchsia-restrict-system-includes.cpp | 25 - .../portability-restrict-system-includes-allow.cpp | 9 + ...rtability-restrict-system-includes-disallow.cpp | 10 + .../portability-restrict-system-includes-glob.cpp | 10 + ...bility-restrict-system-includes-transitive.cpp} | 10 +- clang/cmake/caches/CrossWinToARMLinux.cmake | 3 + clang/docs/OpenMPSupport.rst | 2 + clang/include/clang/AST/ASTImporter.h | 5 + clang/include/clang/AST/Expr.h | 22 +- clang/include/clang/AST/ExprCXX.h | 12 +- clang/include/clang/AST/Stmt.h | 15 + clang/include/clang/AST/TextNodeDumper.h | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 4 + clang/include/clang/Sema/Sema.h | 48 +- clang/include/clang/Sema/Template.h | 10 + clang/include/clang/Serialization/ASTBitCodes.h | 3 + clang/lib/AST/ASTImporter.cpp | 17 +- clang/lib/AST/JSONNodeDumper.cpp | 11 +- clang/lib/AST/TextNodeDumper.cpp | 19 +- clang/lib/Analysis/UninitializedValues.cpp | 30 +- clang/lib/CodeGen/CGBlocks.cpp | 6 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 +- clang/lib/CodeGen/CGExpr.cpp | 8 + clang/lib/CodeGen/CGExprAgg.cpp | 14 + clang/lib/CodeGen/CGExprScalar.cpp | 5 + clang/lib/CodeGen/CGObjCMac.cpp | 3 +- clang/lib/Format/TokenAnnotator.cpp | 25 +- clang/lib/Parse/ParseExpr.cpp | 3 +- clang/lib/Sema/JumpDiagnostics.cpp | 25 +- clang/lib/Sema/SemaDeclCXX.cpp | 11 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaTemplate.cpp | 42 + clang/lib/Sema/SemaTemplateInstantiate.cpp | 4 + clang/lib/Sema/TreeTransform.h | 30 +- clang/lib/Serialization/ASTReaderDecl.cpp | 67 +- clang/lib/Serialization/ASTReaderStmt.cpp | 16 +- clang/lib/Serialization/ASTWriterStmt.cpp | 13 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 2 +- clang/test/AST/ast-dump-objc-arc-json.m | 36 + clang/test/AST/ast-dump-stmt.m | 15 +- clang/test/Analysis/uninit-asm-goto.cpp | 53 +- clang/test/CodeGenObjC/arc-ternary-op.m | 56 + clang/test/CodeGenObjC/arc.m | 37 + clang/test/CodeGenObjC/metadata-symbols-64.m | 2 +- clang/test/CodeGenObjC/os_log.m | 4 + clang/test/CodeGenObjC/strong-in-c-struct.m | 99 + .../test/Import/objc-arc/Inputs/cleanup-objects.m | 10 + clang/test/Import/objc-arc/test-cleanup-object.m | 10 + clang/test/PCH/cxx2a-constraints.cpp | 37 + clang/test/PCH/non-trivial-c-compound-literal.m | 29 + .../test/SemaCXX/cxx0x-cursory-default-delete.cpp | 12 + clang/test/SemaObjC/strong-in-c-struct.m | 18 + clang/test/SemaTemplate/dependent-expr.cpp | 69 +- .../SemaTemplate/instantiate-requires-expr.cpp | 13 + .../tools/clang-import-test/clang-import-test.cpp | 5 + clang/unittests/Format/FormatTestCSharp.cpp | 6 + compiler-rt/lib/tsan/rtl/tsan.syms.extra | 5 + .../llvm-prettyprinters/gdb/llvm-support.cpp | 8 +- .../llvm-prettyprinters/gdb/llvm-support.gdb | 9 +- libcxx/cmake/Modules/HandleLibCXXABI.cmake | 6 +- libcxx/include/__functional_03 | 15 +- libcxx/include/functional | 9 +- .../func.wrap/depr_in_cxx03.fail.cpp | 29 + libunwind/src/DwarfParser.hpp | 101 +- libunwind/src/config.h | 3 +- lld/ELF/LinkerScript.cpp | 17 +- lld/ELF/LinkerScript.h | 4 - lld/ELF/Writer.cpp | 18 +- lld/docs/ELF/linker_script.rst | 53 + lld/docs/index.rst | 1 + lld/test/ELF/linkerscript/lma-align.test | 12 +- .../ELF/linkerscript/section-address-align.test | 34 + lld/test/ELF/linkerscript/section-align2.test | 17 +- lldb/packages/Python/lldbsuite/test/decorators.py | 14 +- lldb/source/Commands/CommandObjectReproducer.cpp | 12 +- lldb/test/API/sanity/TestSettingSkipping.py | 29 + lldb/test/Shell/Reproducer/TestDump.test | 8 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 62 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 10 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 15 +- llvm/include/llvm/CodeGen/FunctionLoweringInfo.h | 35 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 51 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 19 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 4 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 23 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 20 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 31 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 16 - llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 36 +- .../CodeGen/SelectionDAG/StatepointLowering.cpp | 56 +- .../RuntimeDyld/RuntimeDyldCOFF.cpp | 36 + .../ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h | 17 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 16 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h | 10 +- .../RuntimeDyld/Targets/RuntimeDyldCOFFAArch64.h | 31 +- .../RuntimeDyld/Targets/RuntimeDyldCOFFI386.h | 35 +- .../RuntimeDyld/Targets/RuntimeDyldCOFFThumb.h | 47 +- .../RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h | 31 +- llvm/lib/Object/Archive.cpp | 10 +- llvm/lib/Support/APFloat.cpp | 62 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 3 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 4 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 18 + llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 21 + .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 21 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 11 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 32 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 10 + llvm/lib/Target/AMDGPU/SISchedule.td | 3 + llvm/lib/Target/AMDGPU/VOP1Instructions.td | 4 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 18 + llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 82 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 62 +- llvm/lib/Target/ARM/ARMISelLowering.h | 8 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 22 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 9 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 61 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 61 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 3 +- .../Target/Hexagon/HexagonTargetTransformInfo.cpp | 20 +- .../Target/Hexagon/HexagonTargetTransformInfo.h | 11 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 14 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h | 8 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 12 +- .../Target/SystemZ/SystemZTargetTransformInfo.h | 9 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.h | 10 +- llvm/lib/Target/X86/X86InstrCompiler.td | 33 +- llvm/lib/Target/X86/X86InstrInfo.td | 4 +- llvm/lib/Target/X86/X86InstrShiftRotate.td | 70 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 13 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 8 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 193 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 4 +- .../CostModel/ARM/mve-gather-scatter-cost.ll | 168 +- llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll | 94 + ...ve2-intrinsics-contiguous-conflict-detection.ll | 139 + .../artifact-combiner-unmerge-values.mir | 38 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 51 +- .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 15 + .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 60 +- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 21 +- .../AMDGPU/GlobalISel/legalize-implicit-def.mir | 41 +- .../AMDGPU/GlobalISel/legalize-load-constant.mir | 1201 +------- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 635 +---- .../AMDGPU/GlobalISel/legalize-load-global.mir | 812 +----- .../AMDGPU/GlobalISel/legalize-load-local.mir | 908 +----- .../AMDGPU/GlobalISel/legalize-load-private.mir | 904 +----- .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 51 +- .../AMDGPU/GlobalISel/legalize-sext-inreg.mir | 66 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 18 + .../AMDGPU/GlobalISel/legalize-store-global.mir | 116 +- .../CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir | 283 +- .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 51 +- .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 21 + .../llvm.amdgcn.struct.buffer.load.format.f16.ll | 37 + .../llvm.amdgcn.struct.buffer.load.format.ll | 22 + .../llvm.amdgcn.struct.buffer.store.format.f16.ll | 36 + .../llvm.amdgcn.struct.buffer.store.format.f32.ll | 21 + .../AMDGPU/GlobalISel/regbankselect-copy.mir | 181 ++ llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll | 68 + .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 166 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 446 ++- llvm/test/CodeGen/AMDGPU/bypass-div.ll | 148 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 2 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.mir | 2 +- .../CodeGen/AMDGPU/fcanonicalize-elimination.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll | 7 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll | 9 +- .../llvm.amdgcn.struct.buffer.load.format.d16.ll | 10 + .../llvm.amdgcn.struct.buffer.load.format.ll | 11 + .../llvm.amdgcn.struct.buffer.store.format.d16.ll | 11 + .../llvm.amdgcn.struct.buffer.store.format.ll | 10 + .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 26 + llvm/test/CodeGen/AMDGPU/srem64.ll | 178 +- llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll | 6 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 30 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 136 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +- llvm/test/CodeGen/ARM/i64_volatile_load_store.ll | 183 ++ llvm/test/CodeGen/PowerPC/fma-precision.ll | 99 + llvm/test/CodeGen/PowerPC/recipest.ll | 475 ++- .../test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir | 3011 ++++++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-fmas.ll | 204 ++ llvm/test/CodeGen/X86/avg.ll | 706 +++-- llvm/test/CodeGen/X86/avx512vbmi2-funnel-shifts.ll | 36 +- .../CodeGen/X86/avx512vbmi2vl-funnel-shifts.ll | 72 +- llvm/test/CodeGen/X86/clear-highbits.ll | 255 +- llvm/test/CodeGen/X86/clear-lowbits.ll | 158 +- .../test/CodeGen/X86/const-shift-of-constmasked.ll | 10 +- llvm/test/CodeGen/X86/extract-bits.ll | 464 ++- llvm/test/CodeGen/X86/extract-lowbits.ll | 489 ++-- llvm/test/CodeGen/X86/fshl.ll | 34 +- llvm/test/CodeGen/X86/fshr.ll | 47 +- llvm/test/CodeGen/X86/known-bits.ll | 2 +- llvm/test/CodeGen/X86/sdiv_fix.ll | 215 +- llvm/test/CodeGen/X86/sdiv_fix_sat.ll | 473 ++- llvm/test/CodeGen/X86/shift-combine.ll | 1 - llvm/test/CodeGen/X86/shift-parts.ll | 11 +- .../CodeGen/X86/statepoint-duplicates-export.ll | 80 + llvm/test/CodeGen/X86/udiv_fix_sat.ll | 6 +- .../X86/x86-64-double-precision-shift-left.ll | 8 +- .../CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll | 4 +- .../ExecutionEngine/RuntimeDyld/ARM/COFF_Thumb.s | 61 +- .../ExecutionEngine/RuntimeDyld/X86/COFF_i386.s | 43 +- .../ExecutionEngine/RuntimeDyld/X86/COFF_x86_64.s | 37 +- .../Transforms/CodeGenPrepare/X86/freeze-icmp.ll | 75 + .../LowerMatrixIntrinsics/remarks-inlining.ll | 166 ++ .../Transforms/LowerMatrixIntrinsics/remarks.ll | 14 +- llvm/unittests/ADT/APFloatTest.cpp | 118 + .../CodeGen/GlobalISel/MachineIRBuilderTest.cpp | 36 + llvm/unittests/Object/ArchiveTest.cpp | 93 + llvm/unittests/Object/CMakeLists.txt | 1 + llvm/utils/gdb-scripts/prettyprinters.py | 65 +- .../clang-tools-extra/clang-tidy/fuchsia/BUILD.gn | 1 - .../clang-tidy/portability/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Object/BUILD.gn | 1 + mlir/docs/Dialects/Affine.md | 3 +- mlir/docs/ShapeInference.md | 2 +- mlir/docs/Tutorials/Toy/Ch-4.md | 2 +- mlir/examples/toy/Ch2/CMakeLists.txt | 1 + mlir/examples/toy/Ch2/include/toy/Dialect.h | 1 + mlir/examples/toy/Ch3/CMakeLists.txt | 1 + mlir/examples/toy/Ch3/include/toy/Dialect.h | 1 + mlir/examples/toy/Ch4/CMakeLists.txt | 3 +- mlir/examples/toy/Ch4/include/toy/Dialect.h | 1 + mlir/examples/toy/Ch4/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch5/CMakeLists.txt | 3 +- mlir/examples/toy/Ch5/include/toy/Dialect.h | 1 + mlir/examples/toy/Ch5/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch6/CMakeLists.txt | 3 +- mlir/examples/toy/Ch6/include/toy/Dialect.h | 1 + mlir/examples/toy/Ch6/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch7/CMakeLists.txt | 3 +- mlir/examples/toy/Ch7/include/toy/Dialect.h | 1 + mlir/examples/toy/Ch7/include/toy/Ops.td | 2 +- mlir/include/mlir/CMakeLists.txt | 2 +- .../GPUToVulkan/ConvertGPUToVulkanPass.h | 5 +- mlir/include/mlir/Dialect/AffineOps/AffineOps.h | 1 + mlir/include/mlir/Dialect/FxpMathOps/FxpMathOps.h | 1 + mlir/include/mlir/Dialect/GPU/GPUDialect.h | 1 + mlir/include/mlir/Dialect/GPU/GPUOps.td | 16 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 3 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h | 2 + mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h | 1 + .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 4 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.h | 1 + mlir/include/mlir/Dialect/QuantOps/QuantOps.h | 1 + .../mlir/Dialect/SPIRV/SPIRVControlFlowOps.td | 4 +- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.h | 3 +- .../mlir/Dialect/SPIRV/SPIRVStructureOps.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/Shape.h | 1 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.h | 5 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 6 +- mlir/include/mlir/Dialect/VectorOps/VectorOps.h | 1 + mlir/include/mlir/ExecutionEngine/RunnerUtils.h | 2 + mlir/include/mlir/IR/AffineMap.h | 8 +- mlir/include/mlir/IR/CMakeLists.txt | 5 - mlir/include/mlir/IR/Function.h | 2 +- mlir/include/mlir/IR/OpDefinition.h | 212 -- mlir/include/mlir/InitAllPasses.h | 3 +- .../mlir/{Analysis => Interfaces}/CMakeLists.txt | 9 +- .../mlir/{Analysis => Interfaces}/CallInterfaces.h | 8 +- .../{Analysis => Interfaces}/CallInterfaces.td | 8 +- .../ControlFlowInterfaces.h | 8 +- .../ControlFlowInterfaces.td | 6 +- .../InferTypeOpInterface.h | 8 +- .../InferTypeOpInterface.td | 0 mlir/include/mlir/Interfaces/SideEffects.h | 230 ++ .../include/mlir/{IR => Interfaces}/SideEffects.td | 6 +- mlir/lib/Analysis/CMakeLists.txt | 31 +- mlir/lib/Analysis/CallGraph.cpp | 8 +- mlir/lib/CMakeLists.txt | 1 + .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 426 +-- mlir/lib/Conversion/GPUToVulkan/CMakeLists.txt | 1 + .../ConvertGPULaunchFuncToVulkanLaunchFunc.cpp | 173 ++ .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 310 +- mlir/lib/Dialect/AffineOps/CMakeLists.txt | 1 + mlir/lib/Dialect/AffineOps/EDSC/Builders.cpp | 6 +- mlir/lib/Dialect/FxpMathOps/CMakeLists.txt | 1 + mlir/lib/Dialect/GPU/CMakeLists.txt | 1 + mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 8 + .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 29 + mlir/lib/Dialect/LLVMIR/CMakeLists.txt | 7 +- mlir/lib/Dialect/Linalg/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 10 +- .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 46 +- mlir/lib/Dialect/LoopOps/CMakeLists.txt | 1 + mlir/lib/Dialect/QuantOps/CMakeLists.txt | 1 + mlir/lib/Dialect/SPIRV/CMakeLists.txt | 3 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 2 +- mlir/lib/Dialect/Shape/CMakeLists.txt | 1 + mlir/lib/Dialect/StandardOps/CMakeLists.txt | 6 +- mlir/lib/Dialect/VectorOps/CMakeLists.txt | 1 + mlir/lib/ExecutionEngine/RunnerUtils.cpp | 29 +- mlir/lib/IR/AffineMap.cpp | 13 +- mlir/lib/IR/CMakeLists.txt | 3 +- mlir/lib/IR/MLIRContext.cpp | 5 + mlir/lib/IR/Operation.cpp | 11 - mlir/lib/Interfaces/CMakeLists.txt | 62 + mlir/lib/Interfaces/CallInterfaces.cpp | 17 + .../ControlFlowInterfaces.cpp | 6 +- .../InferTypeOpInterface.cpp | 4 +- mlir/lib/Interfaces/SideEffects.cpp | 27 + mlir/lib/Parser/Parser.cpp | 15 +- mlir/lib/Transforms/LoopInvariantCodeMotion.cpp | 1 + mlir/lib/Transforms/Utils/LoopUtils.cpp | 36 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 2 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 72 +- .../test/Conversion/GPUToVulkan/invoke-vulkan.mlir | 67 +- .../lower-gpu-launch-vulkan-launch.mlir | 32 + mlir/test/Dialect/GPU/all-reduce-max.mlir | 203 ++ mlir/test/Dialect/GPU/invalid.mlir | 8 + mlir/test/Dialect/Linalg/invalid.mlir | 19 +- mlir/test/Dialect/Linalg/loops.mlir | 8 +- mlir/test/Dialect/Linalg/roundtrip.mlir | 2 +- mlir/test/EDSC/builder-api-test.cpp | 38 + mlir/test/lib/IR/CMakeLists.txt | 1 + mlir/test/lib/TestDialect/CMakeLists.txt | 5 +- mlir/test/lib/TestDialect/TestDialect.h | 7 +- mlir/test/lib/TestDialect/TestOps.td | 8 +- mlir/test/mlir-cuda-runner/all-reduce-and.mlir | 60 + mlir/test/mlir-cuda-runner/all-reduce-max.mlir | 58 + mlir/test/mlir-cuda-runner/all-reduce-min.mlir | 58 + mlir/test/mlir-cuda-runner/all-reduce-or.mlir | 58 + mlir/test/mlir-cuda-runner/all-reduce-xor.mlir | 58 + mlir/test/mlir-tblgen/op-side-effects.td | 2 +- mlir/test/mlir-vulkan-runner/addf.mlir | 8 +- mlir/tools/mlir-cpu-runner/CMakeLists.txt | 3 - mlir/tools/mlir-vulkan-runner/VulkanRuntime.h | 2 +- .../mlir-vulkan-runner/mlir-vulkan-runner.cpp | 3 +- .../mlir-vulkan-runner/vulkan-runtime-wrappers.cpp | 127 +- openmp/libomptarget/src/rtl.h | 59 +- 368 files changed, 12820 insertions(+), 8617 deletions(-) rename clang-tools-extra/clang-tidy/{fuchsia => portability}/RestrictSystemInclude [...] rename clang-tools-extra/clang-tidy/{fuchsia => portability}/RestrictSystemInclude [...] delete mode 100644 clang-tools-extra/docs/clang-tidy/checks/fuchsia-restrict-syste [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/portability-restrict-s [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] rename clang-tools-extra/test/clang-tidy/checkers/Inputs/{fuchsia-restrict-system- [...] delete mode 100644 clang-tools-extra/test/clang-tidy/checkers/fuchsia-restrict-sys [...] delete mode 100644 clang-tools-extra/test/clang-tidy/checkers/fuchsia-restrict-sys [...] delete mode 100644 clang-tools-extra/test/clang-tidy/checkers/fuchsia-restrict-sys [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/portability-restrict [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/portability-restrict [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/portability-restrict [...] rename clang-tools-extra/test/clang-tidy/checkers/{fuchsia-restrict-system-include [...] create mode 100644 clang/test/AST/ast-dump-objc-arc-json.m create mode 100644 clang/test/Import/objc-arc/Inputs/cleanup-objects.m create mode 100644 clang/test/Import/objc-arc/test-cleanup-object.m create mode 100644 clang/test/PCH/cxx2a-constraints.cpp create mode 100644 clang/test/PCH/non-trivial-c-compound-literal.m create mode 100644 libcxx/test/libcxx/utilities/function.objects/func.wrap/depr_in [...] create mode 100644 lld/docs/ELF/linker_script.rst create mode 100644 lld/test/ELF/linkerscript/section-address-align.test create mode 100644 lldb/test/API/sanity/TestSettingSkipping.py create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll create mode 100644 llvm/test/CodeGen/AArch64/sve2-intrinsics-contiguous-conflict-d [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir create mode 100644 llvm/test/CodeGen/ARM/i64_volatile_load_store.ll create mode 100644 llvm/test/CodeGen/PowerPC/fma-precision.ll create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir create mode 100644 llvm/test/CodeGen/X86/statepoint-duplicates-export.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/freeze-icmp.ll create mode 100644 llvm/test/Transforms/LowerMatrixIntrinsics/remarks-inlining.ll create mode 100644 llvm/unittests/Object/ArchiveTest.cpp rename mlir/include/mlir/{Analysis => Interfaces}/CMakeLists.txt (63%) rename mlir/include/mlir/{Analysis => Interfaces}/CallInterfaces.h (84%) rename mlir/include/mlir/{Analysis => Interfaces}/CallInterfaces.td (94%) rename mlir/include/mlir/{Analysis => Interfaces}/ControlFlowInterfaces.h (88%) rename mlir/include/mlir/{Analysis => Interfaces}/ControlFlowInterfaces.td (95%) rename mlir/include/mlir/{Analysis => Interfaces}/InferTypeOpInterface.h (95%) rename mlir/include/mlir/{Analysis => Interfaces}/InferTypeOpInterface.td (100%) create mode 100644 mlir/include/mlir/Interfaces/SideEffects.h rename mlir/include/mlir/{IR => Interfaces}/SideEffects.td (98%) create mode 100644 mlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLau [...] create mode 100644 mlir/lib/Interfaces/CMakeLists.txt create mode 100644 mlir/lib/Interfaces/CallInterfaces.cpp rename mlir/lib/{Analysis => Interfaces}/ControlFlowInterfaces.cpp (95%) rename mlir/lib/{Analysis => Interfaces}/InferTypeOpInterface.cpp (95%) create mode 100644 mlir/lib/Interfaces/SideEffects.cpp create mode 100644 mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir create mode 100644 mlir/test/Dialect/GPU/all-reduce-max.mlir create mode 100644 mlir/test/mlir-cuda-runner/all-reduce-and.mlir create mode 100644 mlir/test/mlir-cuda-runner/all-reduce-max.mlir create mode 100644 mlir/test/mlir-cuda-runner/all-reduce-min.mlir create mode 100644 mlir/test/mlir-cuda-runner/all-reduce-or.mlir create mode 100644 mlir/test/mlir-cuda-runner/all-reduce-xor.mlir