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from 0c8ecbcd3cf [RA]: Add flag for checking IRA in progress new 88d8829e4f4 RISC-V: Support {U}INT64 to FP16 auto-vectorization

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Summary of changes: gcc/config/riscv/autovec.md | 24 +++++++++++ gcc/config/riscv/vector-iterators.md | 38 +++++++++++++++++ .../gcc.target/riscv/rvv/autovec/unop/cvt-0.c | 21 ++++++++++ .../gcc.target/riscv/rvv/autovec/unop/cvt-1.c | 22 ++++++++++ .../gcc.target/riscv/rvv/autovec/vls/cvt-0.c | 47 ++++++++++++++++++++++ 5 files changed, 152 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cvt-0.c