Common ARM context save/restore code
Jon.Callan at arm.com
Tue Oct 12 12:57:42 UTC 2010
Yes, it does seem a little tight doesn't it? Bobby is who I'm working with on this, btw.
Maybe I could get the source code tidied and open it up in 2-3 weeks time? Then we can all work on it together :-)
From: Amit Kucheria [mailto:amit.kucheria at linaro.org]
Sent: 12 October 2010 13:32
To: Jon Callan
Cc: linaro-dev at lists.linaro.org
Subject: Re: Common ARM context save/restore code
As you can see, if you make the source available somewhere, there is plenty
of people interested in dissecting it.
Jon, if you start working on them in December, we'll almost certainly miss
the 2.6.38 merge window to get it integrated to mainline.
p.s. /me makes a note to talk to Bobby at ARM et al. regarding this.
On 10 Oct 12, Jon Callan wrote:
> Well, my plan was to... er... post a message on linaro-dev and see happened!
> And yes, refactor as an ARM-common driver + SoC-specific stubs, that sounds about right.
> I plan to work on the Linux integration from 1st December. I have done some Linux kernel work before but I'm a little rusty.
> -----Original Message-----
> From: Amit Kucheria [mailto:amit.kucheria at linaro.org]
> Sent: 12 October 2010 12:04
> To: Jon Callan
> Cc: linaro-dev at lists.linaro.org
> Subject: Re: Common ARM context save/restore code
> I'm sure you anticipated this - What is your plan for pushing this out
> to the kernel? :)
> And how can we help?
> On Tue, Oct 12, 2010 at 1:39 PM, Jon Callan <Jon.Callan at arm.com> wrote:
> > Vishwa,
> > I have a more-or-less complete set of example code for CPU context save/restore, currently supporting A5/A8/A9 and with planned support for Eagle.
> > It is structured as "firmware" at the moment, but it would be much better if it was integrated into the ARM Linux kernel. The idea is the kernel calls it from CPUidle, and it saves all CPU context and cuts the power. Then when power returns, it restores all CPU context and returns to the kernel as if nothing has happened.
> > It handles just the CPU and cluster context, which on A9mpcore includes MMU, GIC, VFP, SCU, L2cc, Debug, etc. It takes care of cleaning caches and entering/leaving the coherency domain. There is also support for TrustZone, but as you say that's quite platform-specific.
> > So we would need to integrate this with the SoC-specific code somehow.
> So you need to refactor these to an ARM-common driver and SoC-specific stubs?
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