devicetree: Tegra SoC configuration tables

Tegra's board files currently contain quite a number of tables, with board-specific content. For example, (in mainline) arch/arm/mach-tegra/ board-seaboard-pinmux.c contains a table of pinmux settings, a table of pin drive strengths, and a list of all GPIOs that must be enabled. In the ChromeOS kernel, there are a number of additional tables for DVFS limits on various clocks and regulators, memory controller timing settings, etc. etc.

In a devicetree-enabled kernel, it seems like these could simply be pushed into the Tegra SoC/CPU DT node as custom fields holding many- valued tuples that contain the raw table data.

Does this seem like a reasonable thing to do?