Acc August 2023

acc@lists.linaro.org

3 participants
3 discussions

by Weili Qian

From: Shangbin Liu <liushangbin(a)hisilicon.com> This patchset fixes some issues of the uadk. The first patch adds init wait timeout judgment to prevent deadlocks when making loopback calls from the same thread. The second and third patches add a key length validity check before calculating the actual key length of the algorithm in xts mode. Because if the key length is odd, it will result in incorrect calculation results. Shangbin Liu (3): uadk: add init wait timeout uadk: fix key length check error in xts mode uadk/v1: fix key length check error in xts mode include/wd_util.h | 7 ++++--- v1/wd_cipher.c | 29 ++++++++++++++++------------- wd_aead.c | 16 +++++++--------- wd_cipher.c | 47 ++++++++++++++++++++++++++--------------------- wd_comp.c | 15 +++++++-------- wd_dh.c | 16 +++++++--------- wd_digest.c | 16 +++++++--------- wd_ecc.c | 15 +++++++-------- wd_rsa.c | 16 +++++++--------- wd_util.c | 18 +++++++++++------- 10 files changed, 99 insertions(+), 96 deletions(-) -- 2.22.0

1 year, 4 months

[PATCH 1/3] uadk/v1/cipher: support aes-cbc cts mode

by Zhiqi Song

Support AES-CBC CTS(ciphertext stealing) mode in v1, including CBC-CS1, CBC-CS2, CBC-CS3. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- v1/drv/hisi_sec_udrv.c | 100 ++++++++++++++++++++++++++++++++++++++--- v1/drv/hisi_sec_udrv.h | 6 +++ v1/wd_cipher.c | 3 ++ v1/wd_cipher.h | 4 ++ 4 files changed, 106 insertions(+), 7 deletions(-) diff --git a/v1/drv/hisi_sec_udrv.c b/v1/drv/hisi_sec_udrv.c index 4d5ede5..f9cd8c0 100644 --- a/v1/drv/hisi_sec_udrv.c +++ b/v1/drv/hisi_sec_udrv.c @@ -174,6 +174,18 @@ static int fill_cipher_bd2_mode(struct wcrypto_cipher_msg *msg, case WCRYPTO_CIPHER_XTS: sqe->type2.c_mode = C_MODE_XTS; break; + case WCRYPTO_CIPHER_CBC_CS1: + sqe->type2.c_mode = C_MODE_CBC_CS; + sqe->type2.c_width = C_WIDTH_CS1; + break; + case WCRYPTO_CIPHER_CBC_CS2: + sqe->type2.c_mode = C_MODE_CBC_CS; + sqe->type2.c_width = C_WIDTH_CS2; + break; + case WCRYPTO_CIPHER_CBC_CS3: + sqe->type2.c_mode = C_MODE_CBC_CS; + sqe->type2.c_width = C_WIDTH_CS3; + break; default: WD_ERR("Invalid cipher alg type!\n"); ret = -WD_EINVAL; @@ -248,6 +260,9 @@ static void update_iv(struct wcrypto_cipher_msg *msg) { switch (msg->mode) { case WCRYPTO_CIPHER_CBC: + case WCRYPTO_CIPHER_CBC_CS1: + case WCRYPTO_CIPHER_CBC_CS2: + case WCRYPTO_CIPHER_CBC_CS3: if (msg->op_type == WCRYPTO_CIPHER_ENCRYPTION && msg->out_bytes >= msg->iv_bytes) update_iv_from_res(msg->iv, msg->out, @@ -355,6 +370,18 @@ static int fill_cipher_bd1_mode(struct wcrypto_cipher_msg *msg, case WCRYPTO_CIPHER_XTS: sqe->type1.c_mode = C_MODE_XTS; break; + case WCRYPTO_CIPHER_CBC_CS1: + sqe->type1.c_mode = C_MODE_CBC_CS; + sqe->type1.c_width = C_WIDTH_CS1; + break; + case WCRYPTO_CIPHER_CBC_CS2: + sqe->type1.c_mode = C_MODE_CBC_CS; + sqe->type1.c_width = C_WIDTH_CS2; + break; + case WCRYPTO_CIPHER_CBC_CS3: + sqe->type1.c_mode = C_MODE_CBC_CS; + sqe->type1.c_width = C_WIDTH_CS3; + break; default: WD_ERR("Invalid cipher alg type for bd1\n"); return -WD_EINVAL; @@ -582,8 +609,32 @@ map_in_error: return ret; } +static int aes_sm4_param_check(struct wcrypto_cipher_msg *msg) +{ + if (msg->alg == WCRYPTO_CIPHER_AES && + msg->in_bytes <= CBC_AES_BLOCK_SIZE && + (msg->mode == WCRYPTO_CIPHER_CBC_CS1 || + msg->mode == WCRYPTO_CIPHER_CBC_CS2 || + msg->mode == WCRYPTO_CIPHER_CBC_CS3)) { + WD_ERR("failed to check input bytes of AES CTS, size = %u\n", + msg->in_bytes); + return -WD_EINVAL; + } + + if ((msg->in_bytes & (CBC_AES_BLOCK_SIZE - 1)) && + (msg->mode == WCRYPTO_CIPHER_CBC || + msg->mode == WCRYPTO_CIPHER_ECB)) { + WD_ERR("input AES or SM4 cipher parameter is error!\n"); + return -WD_EINVAL; + } + + return WD_SUCCESS; +} + static int cipher_param_check(struct wcrypto_cipher_msg *msg) { + int ret; + if (unlikely(msg->in_bytes > MAX_CIPHER_LENGTH || !msg->in_bytes)) { WD_ERR("input cipher len is too large!\n"); @@ -611,10 +662,9 @@ static int cipher_param_check(struct wcrypto_cipher_msg *msg) } if (msg->alg == WCRYPTO_CIPHER_AES || msg->alg == WCRYPTO_CIPHER_SM4) { - if (unlikely(msg->in_bytes & (CBC_AES_BLOCK_SIZE - 1))) { - WD_ERR("input AES or SM4 cipher parameter is error!\n"); - return -WD_EINVAL; - } + ret = aes_sm4_param_check(msg); + if (ret) + return ret; } return WD_SUCCESS; @@ -788,6 +838,18 @@ static int fill_cipher_bd3_mode(struct wcrypto_cipher_msg *msg, case WCRYPTO_CIPHER_CFB: sqe->c_mode = C_MODE_CFB; break; + case WCRYPTO_CIPHER_CBC_CS1: + sqe->c_mode = C_MODE_CBC_CS; + sqe->c_width = C_WIDTH_CS1; + break; + case WCRYPTO_CIPHER_CBC_CS2: + sqe->c_mode = C_MODE_CBC_CS; + sqe->c_width = C_WIDTH_CS2; + break; + case WCRYPTO_CIPHER_CBC_CS3: + sqe->c_mode = C_MODE_CBC_CS; + sqe->c_width = C_WIDTH_CS3; + break; default: WD_ERR("Invalid cipher alg type!\n"); ret = -WD_EINVAL; @@ -838,7 +900,7 @@ static int fill_cipher_bd3(struct wd_queue *q, struct hisi_sec_bd3_sqe *sqe, return ret; } -static int sm4_aes_mode_check(int mode) +static int sm4_mode_check(int mode) { switch (mode) { case WCRYPTO_CIPHER_ECB: @@ -855,6 +917,26 @@ static int sm4_aes_mode_check(int mode) } } +static int aes_mode_check(int mode) +{ + switch (mode) { + case WCRYPTO_CIPHER_ECB: + case WCRYPTO_CIPHER_CBC: + case WCRYPTO_CIPHER_OFB: + case WCRYPTO_CIPHER_CFB: + case WCRYPTO_CIPHER_CTR: + case WCRYPTO_CIPHER_XTS: + case WCRYPTO_CIPHER_CCM: + case WCRYPTO_CIPHER_GCM: + case WCRYPTO_CIPHER_CBC_CS1: + case WCRYPTO_CIPHER_CBC_CS2: + case WCRYPTO_CIPHER_CBC_CS3: + return WD_SUCCESS; + default: + return -WD_EINVAL; + } +} + static int triple_des_mode_check(int mode) { switch (mode) { @@ -873,8 +955,10 @@ static int cipher_comb_param_check(struct wcrypto_cipher_msg *msg) switch (msg->alg) { case WCRYPTO_CIPHER_SM4: + ret = sm4_mode_check(msg->mode); + break; case WCRYPTO_CIPHER_AES: - ret = sm4_aes_mode_check(msg->mode); + ret = aes_mode_check(msg->mode); break; case WCRYPTO_CIPHER_DES: case WCRYPTO_CIPHER_3DES: @@ -2125,8 +2209,10 @@ static int aead_comb_param_check(struct wcrypto_aead_msg *msg) switch (msg->calg) { case WCRYPTO_CIPHER_SM4: + ret = sm4_mode_check(msg->cmode); + break; case WCRYPTO_CIPHER_AES: - ret = sm4_aes_mode_check(msg->cmode); + ret = aes_mode_check(msg->cmode); break; default: return -WD_EINVAL; diff --git a/v1/drv/hisi_sec_udrv.h b/v1/drv/hisi_sec_udrv.h index 9c0da47..054ab71 100644 --- a/v1/drv/hisi_sec_udrv.h +++ b/v1/drv/hisi_sec_udrv.h @@ -461,6 +461,12 @@ enum C_MODE { C_MODE_CBC_CS = 0x9 }; +enum SEC_C_WIDTH { + C_WIDTH_CS1 = 0x1, + C_WIDTH_CS2 = 0x2, + C_WIDTH_CS3 = 0x3, +}; + enum CKEY_LEN { CKEY_LEN_128_BIT = 0x0, CKEY_LEN_192_BIT = 0x1, diff --git a/v1/wd_cipher.c b/v1/wd_cipher.c index 3d7d140..a53cf8f 100644 --- a/v1/wd_cipher.c +++ b/v1/wd_cipher.c @@ -82,6 +82,9 @@ static __u32 get_iv_block_size(int alg, int mode) switch (mode) { case WCRYPTO_CIPHER_CBC: + case WCRYPTO_CIPHER_CBC_CS1: + case WCRYPTO_CIPHER_CBC_CS2: + case WCRYPTO_CIPHER_CBC_CS3: case WCRYPTO_CIPHER_OFB: if (alg == WCRYPTO_CIPHER_3DES || alg == WCRYPTO_CIPHER_DES) diff --git a/v1/wd_cipher.h b/v1/wd_cipher.h index 591a590..dafd8a4 100644 --- a/v1/wd_cipher.h +++ b/v1/wd_cipher.h @@ -47,6 +47,10 @@ enum wcrypto_cipher_mode { WCRYPTO_CIPHER_CFB, WCRYPTO_CIPHER_CCM, WCRYPTO_CIPHER_GCM, + WCRYPTO_CIPHER_CBC_CS1, + WCRYPTO_CIPHER_CBC_CS2, + WCRYPTO_CIPHER_CBC_CS3, + WCRYPTO_CIPHER_MODE_MAX, }; /** -- 2.33.0

1 year, 4 months

[PATCH 1/2] digest: fix free sess when it is still used

by Wenkai Lin

When EVP_MD_CTX_copy is used, the session is shared among ctxs. Ensure that the session is released when it is not used. Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- src/uadk_digest.c | 184 ++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 163 insertions(+), 21 deletions(-) diff --git a/src/uadk_digest.c b/src/uadk_digest.c index b75c408..b7b9533 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -148,6 +148,78 @@ static EVP_MD *uadk_sha256; static EVP_MD *uadk_sha384; static EVP_MD *uadk_sha512; +struct ctx_info { + /* Use md_ctx as the key */ + EVP_MD_CTX *md_ctx; + /* Multiple ctxs may share the same session and data */ + handle_t sess; + unsigned char *data; + struct ctx_info *next; +}; + +/* Global table to record ctx and its session */ +static struct ctx_info *digest_ctx_info; +/* Lock for global ctx_info table */ +static pthread_mutex_t digest_ctx_mutex = PTHREAD_MUTEX_INITIALIZER; + +static void find_ctx_info(EVP_MD_CTX *ctx, struct ctx_info **node) +{ + struct ctx_info *pnext = digest_ctx_info; + + while (pnext) { + if (pnext->md_ctx == ctx) { + *node = pnext; + return; + } + pnext = pnext->next; + } +} + +static void del_ctx_info(struct ctx_info *node) +{ + struct ctx_info *pnext = digest_ctx_info; + + if (pnext == node) { + digest_ctx_info = pnext->next; + return; + } + + while (pnext) { + if (pnext->next == node) { + pnext->next = pnext->next->next; + return; + } + pnext = pnext->next; + } +} + +static void add_ctx_info(struct ctx_info *node) +{ + struct ctx_info *pnext = digest_ctx_info; + + if (!pnext) { + digest_ctx_info = node; + node->next = NULL; + } else { + node->next = digest_ctx_info; + digest_ctx_info = node; + } +} + +static bool is_ctx_sess_shared(struct ctx_info *node) +{ + struct ctx_info *pnext = digest_ctx_info; + + while (pnext) { + if ((pnext != node) && (pnext->sess == node->sess)) + return true; + + pnext = pnext->next; + } + + return false; +} + static const EVP_MD *uadk_e_digests_soft_md(uint32_t e_nid) { const EVP_MD *digest_md = NULL; @@ -491,6 +563,7 @@ static int uadk_e_init_digest(void) goto err_unlock; g_digest_engine.pid = getpid(); + digest_ctx_info = NULL; pthread_spin_unlock(&g_digest_engine.lock); free(dev); } @@ -515,7 +588,7 @@ static void digest_priv_ctx_setup(struct digest_priv_ctx *priv, priv->req.out_bytes = out_len; } -static void digest_priv_ctx_cleanup(struct digest_priv_ctx *priv) +static void digest_priv_ctx_reset(struct digest_priv_ctx *priv) { /* Ensure that private variable values are initialized */ priv->state = SEC_DIGEST_INIT; @@ -524,29 +597,52 @@ static void digest_priv_ctx_cleanup(struct digest_priv_ctx *priv) priv->switch_flag = 0; } +static int alloc_ctx_info(EVP_MD_CTX *ctx) +{ + struct digest_priv_ctx *priv = + (struct digest_priv_ctx *) EVP_MD_CTX_md_data(ctx); + struct ctx_info *node = NULL; + + pthread_mutex_lock(&digest_ctx_mutex); + find_ctx_info(ctx, &node); + if (node == NULL) { + node = malloc(sizeof(*node)); + if (node == NULL) { + pthread_mutex_unlock(&digest_ctx_mutex); + return 0; + } + node->md_ctx = ctx; + add_ctx_info(node); + } + node->sess = priv->sess; + node->data = priv->data; + pthread_mutex_unlock(&digest_ctx_mutex); + + return 1; +} + static int uadk_e_digest_init(EVP_MD_CTX *ctx) { struct digest_priv_ctx *priv = (struct digest_priv_ctx *) EVP_MD_CTX_md_data(ctx); __u32 digest_counts = ARRAY_SIZE(digest_info_table); - int nid = EVP_MD_nid(EVP_MD_CTX_md(ctx)); struct sched_params params = {0}; __u32 i; int ret; - priv->e_nid = nid; + priv->e_nid = EVP_MD_nid(EVP_MD_CTX_md(ctx)); - digest_priv_ctx_cleanup(priv); + digest_priv_ctx_reset(priv); ret = uadk_e_init_digest(); if (unlikely(!ret)) { priv->switch_flag = UADK_DO_SOFT; fprintf(stderr, "uadk failed to initialize digest.\n"); - goto soft_init; + return digest_soft_init(priv); } for (i = 0; i < digest_counts; i++) { - if (nid == digest_info_table[i].nid) { + if (priv->e_nid == digest_info_table[i].nid) { digest_priv_ctx_setup(priv, digest_info_table[i].alg, digest_info_table[i].mode, digest_info_table[i].out_len); break; @@ -561,22 +657,30 @@ static int uadk_e_digest_init(EVP_MD_CTX *ctx) /* Use the default numa parameters */ params.numa_id = -1; priv->setup.sched_param = &params; - priv->sess = wd_digest_alloc_sess(&priv->setup); - if (unlikely(!priv->sess)) - return 0; + if (!priv->sess) { + priv->sess = wd_digest_alloc_sess(&priv->setup); + if (unlikely(!priv->sess)) + return 0; - priv->data = malloc(DIGEST_BLOCK_SIZE); - if (unlikely(!priv->data)) { - wd_digest_free_sess(priv->sess); - return 0; + priv->data = malloc(DIGEST_BLOCK_SIZE); + if (unlikely(!priv->data)) + goto out; + + if (!alloc_ctx_info(ctx)) { + free(priv->data); + priv->data = NULL; + goto out; + } } - priv->switch_threshold = sec_digest_get_sw_threshold(nid); + priv->switch_threshold = sec_digest_get_sw_threshold(priv->e_nid); return 1; -soft_init: - return digest_soft_init(priv); +out: + wd_digest_free_sess(priv->sess); + priv->sess = 0; + return 0; } static void digest_update_out_length(EVP_MD_CTX *ctx) @@ -809,19 +913,36 @@ static int uadk_e_digest_cleanup(EVP_MD_CTX *ctx) { struct digest_priv_ctx *priv = (struct digest_priv_ctx *)EVP_MD_CTX_md_data(ctx); + struct ctx_info *node = NULL; - /* Prevent double-free after the copy is used */ - if (!priv || priv->copy) + if (!priv) + return 1; + + pthread_mutex_lock(&digest_ctx_mutex); + find_ctx_info(ctx, &node); + if (node == NULL) { + pthread_mutex_unlock(&digest_ctx_mutex); return 1; + } + + /* If another ctx uses the same session, the session is not released */ + if (is_ctx_sess_shared(node)) + goto out; + + if (priv->data) { + free(priv->data); + priv->data = NULL; + } if (priv->sess) { wd_digest_free_sess(priv->sess); priv->sess = 0; } - if (priv && priv->data) - free(priv->data); - +out: + del_ctx_info(node); + free(node); + pthread_mutex_unlock(&digest_ctx_mutex); return 1; } @@ -831,6 +952,7 @@ static int uadk_e_digest_copy(EVP_MD_CTX *to, const EVP_MD_CTX *from) (struct digest_priv_ctx *)EVP_MD_CTX_md_data(from); struct digest_priv_ctx *t = (struct digest_priv_ctx *)EVP_MD_CTX_md_data(to); + struct ctx_info *node = NULL; /* * EVP_MD_CTX_copy will copy from->priv to to->priv, @@ -838,6 +960,26 @@ static int uadk_e_digest_copy(EVP_MD_CTX *to, const EVP_MD_CTX *from) * add a flag to prevent double-free. */ + pthread_mutex_lock(&digest_ctx_mutex); + find_ctx_info(to, &node); + if (node == NULL) { + node = malloc(sizeof(*node)); + if (node == NULL) { + pthread_mutex_unlock(&digest_ctx_mutex); + return 0; + } + node->md_ctx = to; + add_ctx_info(node); + } else { + if (!is_ctx_sess_shared(node)) { + wd_digest_free_sess(node->sess); + free(node->data); + } + } + node->sess = t->sess; + node->data = t->data; + pthread_mutex_unlock(&digest_ctx_mutex); + if (f && f->data) t->copy = true; -- 2.33.0

1 year, 4 months

2024

2023

2022

Acc August 2023