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New Salary Upgrade for all Staff - January [Staff No.: 00-11455 ]

by Finance Department

1 year, 7 months

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New Salary Upgrade for all Staff - January [Staff No.: 00-16354 ]

by Finance Department

1 year, 7 months

1
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0 0

[PATCH] uadk: fix sec send and recv check failed

by Yang Shen

From: Wenkai Lin <linwenkai6(a)hisilicon.com> The send and recv pointers should be assigned at the beginning, not during wd initialization. Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- drv/hisi_sec.c | 260 ++++++++++++++++++++++++++++--------------------- 1 file changed, 149 insertions(+), 111 deletions(-) diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index d7369fe..2948fe1 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -539,12 +539,93 @@ static __u32 g_sec_hmac_full_len[WD_DIGEST_TYPE_MAX] = { static int hisi_sec_init(void *conf, void *priv); static void hisi_sec_exit(void *priv); +static int hisi_sec_cipher_send(handle_t ctx, void *wd_msg); +static int hisi_sec_cipher_recv(handle_t ctx, void *wd_msg); +static int hisi_sec_cipher_send_v3(handle_t ctx, void *wd_msg); +static int hisi_sec_cipher_recv_v3(handle_t ctx, void *wd_msg); + +static int hisi_sec_digest_send(handle_t ctx, void *wd_msg); +static int hisi_sec_digest_recv(handle_t ctx, void *wd_msg); +static int hisi_sec_digest_send_v3(handle_t ctx, void *wd_msg); +static int hisi_sec_digest_recv_v3(handle_t ctx, void *wd_msg); + +static int hisi_sec_aead_send(handle_t ctx, void *wd_msg); +static int hisi_sec_aead_recv(handle_t ctx, void *wd_msg); +static int hisi_sec_aead_send_v3(handle_t ctx, void *wd_msg); +static int hisi_sec_aead_recv_v3(handle_t ctx, void *wd_msg); + +static int cipher_send(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_cipher_send(ctx, msg); + return hisi_sec_cipher_send_v3(ctx, msg); +} + +static int cipher_recv(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_cipher_recv(ctx, msg); + return hisi_sec_cipher_recv_v3(ctx, msg); +} + +static int digest_send(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_digest_send(ctx, msg); + return hisi_sec_digest_send_v3(ctx, msg); +} + +static int digest_recv(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_digest_recv(ctx, msg); + return hisi_sec_digest_recv_v3(ctx, msg); +} + +static int aead_send(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_aead_send(ctx, msg); + return hisi_sec_aead_send_v3(ctx, msg); +} + +static int aead_recv(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_aead_recv(ctx, msg); + return hisi_sec_aead_recv_v3(ctx, msg); +} + static int hisi_sec_get_usage(void *param) { return 0; } -#define GEN_SEC_ALG_DRIVER(sec_alg_name) \ +#define GEN_SEC_ALG_DRIVER(sec_alg_name, alg_type) \ {\ .drv_name = "hisi_sec2",\ .alg_name = (sec_alg_name),\ @@ -556,57 +637,59 @@ static int hisi_sec_get_usage(void *param) .fallback = 0,\ .init = hisi_sec_init,\ .exit = hisi_sec_exit,\ + .send = alg_type##_send,\ + .recv = alg_type##_recv,\ .get_usage = hisi_sec_get_usage,\ } static struct wd_alg_driver cipher_alg_driver[] = { - GEN_SEC_ALG_DRIVER("ecb(aes)"), - GEN_SEC_ALG_DRIVER("cbc(aes)"), - GEN_SEC_ALG_DRIVER("xts(aes)"), - GEN_SEC_ALG_DRIVER("ecb(sm4)"), - GEN_SEC_ALG_DRIVER("cbc(sm4)"), - GEN_SEC_ALG_DRIVER("ctr(sm4)"), - GEN_SEC_ALG_DRIVER("xts(sm4)"), - GEN_SEC_ALG_DRIVER("ecb(des)"), - GEN_SEC_ALG_DRIVER("cbc(des)"), - GEN_SEC_ALG_DRIVER("ecb(des3_ede)"), - GEN_SEC_ALG_DRIVER("cbc(des3_ede)"), - - GEN_SEC_ALG_DRIVER("ctr(aes)"), - GEN_SEC_ALG_DRIVER("ofb(aes)"), - GEN_SEC_ALG_DRIVER("cfb(aes)"), - GEN_SEC_ALG_DRIVER("cbc-cs1(aes)"), - GEN_SEC_ALG_DRIVER("cbc-cs2(aes)"), - GEN_SEC_ALG_DRIVER("cbc-cs3(aes)"), - GEN_SEC_ALG_DRIVER("ofb(sm4)"), - GEN_SEC_ALG_DRIVER("cfb(sm4)"), - GEN_SEC_ALG_DRIVER("cbc-cs1(sm4)"), - GEN_SEC_ALG_DRIVER("cbc-cs2(sm4)"), - GEN_SEC_ALG_DRIVER("cbc-cs3(sm4)"), + GEN_SEC_ALG_DRIVER("ecb(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc(aes)", cipher), + GEN_SEC_ALG_DRIVER("xts(aes)", cipher), + GEN_SEC_ALG_DRIVER("ecb(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc(sm4)", cipher), + GEN_SEC_ALG_DRIVER("ctr(sm4)", cipher), + GEN_SEC_ALG_DRIVER("xts(sm4)", cipher), + GEN_SEC_ALG_DRIVER("ecb(des)", cipher), + GEN_SEC_ALG_DRIVER("cbc(des)", cipher), + GEN_SEC_ALG_DRIVER("ecb(des3_ede)", cipher), + GEN_SEC_ALG_DRIVER("cbc(des3_ede)", cipher), + + GEN_SEC_ALG_DRIVER("ctr(aes)", cipher), + GEN_SEC_ALG_DRIVER("ofb(aes)", cipher), + GEN_SEC_ALG_DRIVER("cfb(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs1(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs2(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs3(aes)", cipher), + GEN_SEC_ALG_DRIVER("ofb(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cfb(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs1(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs2(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs3(sm4)", cipher), }; static struct wd_alg_driver digest_alg_driver[] = { - GEN_SEC_ALG_DRIVER("sm3"), - GEN_SEC_ALG_DRIVER("md5"), - GEN_SEC_ALG_DRIVER("sha1"), - GEN_SEC_ALG_DRIVER("sha224"), - GEN_SEC_ALG_DRIVER("sha256"), - GEN_SEC_ALG_DRIVER("sha384"), - GEN_SEC_ALG_DRIVER("sha512"), - GEN_SEC_ALG_DRIVER("sha512-224"), - GEN_SEC_ALG_DRIVER("sha512-256"), - GEN_SEC_ALG_DRIVER("xcbc-mac-96(aes)"), - GEN_SEC_ALG_DRIVER("xcbc-prf-128(aes)"), - GEN_SEC_ALG_DRIVER("cmac(aes)"), - GEN_SEC_ALG_DRIVER("gmac(aes)"), + GEN_SEC_ALG_DRIVER("sm3", digest), + GEN_SEC_ALG_DRIVER("md5", digest), + GEN_SEC_ALG_DRIVER("sha1", digest), + GEN_SEC_ALG_DRIVER("sha224", digest), + GEN_SEC_ALG_DRIVER("sha256", digest), + GEN_SEC_ALG_DRIVER("sha384", digest), + GEN_SEC_ALG_DRIVER("sha512", digest), + GEN_SEC_ALG_DRIVER("sha512-224", digest), + GEN_SEC_ALG_DRIVER("sha512-256", digest), + GEN_SEC_ALG_DRIVER("xcbc-mac-96(aes)", digest), + GEN_SEC_ALG_DRIVER("xcbc-prf-128(aes)", digest), + GEN_SEC_ALG_DRIVER("cmac(aes)", digest), + GEN_SEC_ALG_DRIVER("gmac(aes)", digest), }; static struct wd_alg_driver aead_alg_driver[] = { - GEN_SEC_ALG_DRIVER("ccm(aes)"), - GEN_SEC_ALG_DRIVER("gcm(aes)"), - GEN_SEC_ALG_DRIVER("authenc(hmac(sha256),cbc(aes))"), - GEN_SEC_ALG_DRIVER("ccm(sm4)"), - GEN_SEC_ALG_DRIVER("gcm(sm4)"), + GEN_SEC_ALG_DRIVER("ccm(aes)", aead), + GEN_SEC_ALG_DRIVER("gcm(aes)", aead), + GEN_SEC_ALG_DRIVER("authenc(hmac(sha256),cbc(aes))", aead), + GEN_SEC_ALG_DRIVER("ccm(sm4)", aead), + GEN_SEC_ALG_DRIVER("gcm(sm4)", aead), }; static void dump_sec_msg(void *msg, const char *alg) @@ -1093,10 +1176,10 @@ static int fill_cipher_bd2(struct wd_cipher_msg *msg, struct hisi_sec_sqe *sqe) return 0; } -int hisi_sec_cipher_send(handle_t ctx, void *cipher_msg) +static int hisi_sec_cipher_send(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *msg = cipher_msg; + struct wd_cipher_msg *msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -1139,10 +1222,10 @@ int hisi_sec_cipher_send(handle_t ctx, void *cipher_msg) return 0; } -int hisi_sec_cipher_recv(handle_t ctx, void *cipher_msg) +int hisi_sec_cipher_recv(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *recv_msg = cipher_msg; + struct wd_cipher_msg *recv_msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -1298,10 +1381,10 @@ static int fill_cipher_bd3(struct wd_cipher_msg *msg, struct hisi_sec_sqe3 *sqe) return 0; } -int hisi_sec_cipher_send_v3(handle_t ctx, void *cipher_msg) +static int hisi_sec_cipher_send_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *msg = cipher_msg; + struct wd_cipher_msg *msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -1389,10 +1472,10 @@ static void parse_cipher_bd3(struct hisi_qp *qp, struct hisi_sec_sqe3 *sqe, dump_sec_msg(temp_msg, "cipher"); } -int hisi_sec_cipher_recv_v3(handle_t ctx, void *cipher_msg) +int hisi_sec_cipher_recv_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *recv_msg = cipher_msg; + struct wd_cipher_msg *recv_msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -1662,10 +1745,10 @@ static int digest_len_check(struct wd_digest_msg *msg, enum sec_bd_type type) return 0; } -int hisi_sec_digest_send(handle_t ctx, void *digest_msg) +static int hisi_sec_digest_send(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *msg = digest_msg; + struct wd_digest_msg *msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; __u8 scene; @@ -1729,10 +1812,10 @@ put_sgl: return ret; } -int hisi_sec_digest_recv(handle_t ctx, void *digest_msg) +int hisi_sec_digest_recv(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *recv_msg = digest_msg; + struct wd_digest_msg *recv_msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -1906,10 +1989,10 @@ static void fill_digest_v3_scene(struct hisi_sec_sqe3 *sqe, sqe->bd_param |= (__u16)(de | scene); } -int hisi_sec_digest_send_v3(handle_t ctx, void *digest_msg) +static int hisi_sec_digest_send_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *msg = digest_msg; + struct wd_digest_msg *msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2006,10 +2089,10 @@ static void parse_digest_bd3(struct hisi_qp *qp, struct hisi_sec_sqe3 *sqe, dump_sec_msg(temp_msg, "digest"); } -int hisi_sec_digest_recv_v3(handle_t ctx, void *digest_msg) +int hisi_sec_digest_recv_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *recv_msg = digest_msg; + struct wd_digest_msg *recv_msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2478,10 +2561,10 @@ int aead_msg_state_check(struct wd_aead_msg *msg) return 0; } -int hisi_sec_aead_send(handle_t ctx, void *aead_msg) +static int hisi_sec_aead_send(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *msg = aead_msg; + struct wd_aead_msg *msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -2600,10 +2683,10 @@ static bool soft_compute_check(struct hisi_qp *qp, struct wd_aead_msg *msg) qp->q_info.qp_mode == CTX_MODE_SYNC; } -int hisi_sec_aead_recv(handle_t ctx, void *aead_msg) +int hisi_sec_aead_recv(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *recv_msg = aead_msg; + struct wd_aead_msg *recv_msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -2864,10 +2947,10 @@ static int fill_aead_bd3(struct wd_aead_msg *msg, struct hisi_sec_sqe3 *sqe) return 0; } -int hisi_sec_aead_send_v3(handle_t ctx, void *aead_msg) +static int hisi_sec_aead_send_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *msg = aead_msg; + struct wd_aead_msg *msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2965,10 +3048,10 @@ static void parse_aead_bd3(struct hisi_qp *qp, struct hisi_sec_sqe3 *sqe, dump_sec_msg(temp_msg, "aead"); } -int hisi_sec_aead_recv_v3(handle_t ctx, void *aead_msg) +int hisi_sec_aead_recv_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *recv_msg = aead_msg; + struct wd_aead_msg *recv_msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2993,50 +3076,6 @@ int hisi_sec_aead_recv_v3(handle_t ctx, void *aead_msg) return 0; } -static void hisi_sec_driver_adapter(struct hisi_qp *qp) -{ - struct hisi_qm_queue_info q_info = qp->q_info; - int alg_num, i; - - if (q_info.hw_type == HISI_QM_API_VER2_BASE) { - WD_INFO("hisi sec init HIP08!\n"); - alg_num = ARRAY_SIZE(cipher_alg_driver); - for (i = 0; i < alg_num; i++) { - cipher_alg_driver[i].send = hisi_sec_cipher_send; - cipher_alg_driver[i].recv = hisi_sec_cipher_recv; - } - - alg_num = ARRAY_SIZE(digest_alg_driver); - for (i = 0; i < alg_num; i++) { - digest_alg_driver[i].send = hisi_sec_digest_send; - digest_alg_driver[i].recv = hisi_sec_digest_recv; - } - alg_num = ARRAY_SIZE(aead_alg_driver); - for (i = 0; i < alg_num; i++) { - aead_alg_driver[i].send = hisi_sec_aead_send; - aead_alg_driver[i].recv = hisi_sec_aead_recv; - } - } else { - WD_INFO("hisi sec init HIP09!\n"); - alg_num = ARRAY_SIZE(cipher_alg_driver); - for (i = 0; i < alg_num; i++) { - cipher_alg_driver[i].send = hisi_sec_cipher_send_v3; - cipher_alg_driver[i].recv = hisi_sec_cipher_recv_v3; - } - - alg_num = ARRAY_SIZE(digest_alg_driver); - for (i = 0; i < alg_num; i++) { - digest_alg_driver[i].send = hisi_sec_digest_send_v3; - digest_alg_driver[i].recv = hisi_sec_digest_recv_v3; - } - alg_num = ARRAY_SIZE(aead_alg_driver); - for (i = 0; i < alg_num; i++) { - aead_alg_driver[i].send = hisi_sec_aead_send_v3; - aead_alg_driver[i].recv = hisi_sec_aead_recv_v3; - } - } -} - static int hisi_sec_init(void *conf, void *priv) { struct wd_ctx_config_internal *config = conf; @@ -3068,7 +3107,6 @@ static int hisi_sec_init(void *conf, void *priv) config->ctxs[i].sqn = qm_priv.sqn; } memcpy(&sec_ctx->config, config, sizeof(struct wd_ctx_config_internal)); - hisi_sec_driver_adapter((struct hisi_qp *)h_qp); return 0; -- 2.33.0

1 year, 8 months

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[PATCH] uadk_tool: fix aead performance test issue

by Longfang Liu

in the current UADK code. Due to the new support for aead stream mode, a new msg_state state has been added. If the initial value is not assigned, an error will occur in the block mode check. As a result, the performance test cannot be executed. Signed-off-by: Longfang Liu <liulongfang(a)huawei.com> --- uadk_tool/benchmark/sec_uadk_benchmark.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c index f1ae18b..2954719 100644 --- a/uadk_tool/benchmark/sec_uadk_benchmark.c +++ b/uadk_tool/benchmark/sec_uadk_benchmark.c @@ -1165,6 +1165,7 @@ static void *sec_uadk_aead_async(void *arg) areq.mac_bytes = auth_size; areq.assoc_bytes = SEC_AEAD_LEN; areq.in_bytes = g_pktlen; + areq.msg_state = 0; if (pdata->is_union) areq.mac_bytes = 32; if (areq.op_type) // decrypto @@ -1396,6 +1397,7 @@ static void *sec_uadk_aead_sync(void *arg) areq.assoc_bytes = SEC_AEAD_LEN; areq.in_bytes = g_pktlen; areq.mac_bytes = g_maclen; + areq.msg_state = 0; if (areq.op_type) // decrypto areq.out_bytes = g_pktlen + 16; // aadsize = 16; else -- 2.33.0

1 year, 8 months

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[PATCH 0/6] some cleanup and bugfix of hpre

by Zhiqi Song

Some bugfix and cleanup. Zhiqi Song (6): uadk/v1: fix security view issues of hpre uadk: cleanup issues of hpre uadk/v1/hpre: add parameter check of setup uadk/ecc: fix the use of random k in sm2 sign uadk/v1: cleanup common part code style uadk/sec: add return value judgement drv/hisi_hpre.c | 103 +++++++++++++++++++++++----------------- drv/hisi_sec.c | 4 ++ v1/drv/hisi_hpre_udrv.c | 31 ++++++------ v1/drv/hisi_qm_udrv.c | 16 +++---- v1/wd_adapter.c | 18 +++---- v1/wd_bmm.c | 13 +++-- v1/wd_dh.c | 3 +- v1/wd_ecc.c | 17 +++++-- v1/wd_rsa.c | 6 ++- v1/wd_sgl.c | 27 +++++++++-- wd_dh.c | 16 +++---- wd_ecc.c | 34 ++++++++----- wd_rsa.c | 14 +++--- 13 files changed, 181 insertions(+), 121 deletions(-) -- 2.33.0

1 year, 8 months

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[PATCH] uadk_engine: fix env poll timeout in abnormal scenarios

by Zhiqi Song

In abnormal scenarios, if the alg cores of hardware device are closed, the hw async task may return busy and can not finish the task. There is be a max loop count to avoid infinite loop. But there is already a 'MAX_POLL_TIMES' (1000) in uadk default poll policy. If engine use 'ENGINE_RECV_MAX_CNT' to control the poll loop count, the actual count will be: MAX_POLL_TIMES * ENGINE_RECV_MAX_CNT which is too large. This will cause the process use a very long time to exit. So modify the env poll loop time count. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- README | 2 +- src/uadk.h | 1 + src/uadk_aead.c | 2 +- src/uadk_cipher.c | 2 +- src/uadk_dh.c | 2 +- src/uadk_digest.c | 2 +- src/uadk_pkey.c | 2 +- src/uadk_rsa.c | 2 +- 8 files changed, 8 insertions(+), 7 deletions(-) diff --git a/README b/README index cd27ccb..9586e60 100644 --- a/README +++ b/README @@ -180,7 +180,7 @@ Usage 1. Firstly, modify the openssl.cnf file, add the following settings at the beginning of this file: ``` -openssl_cnf=openssl_def +openssl_conf=openssl_def [openssl_def] engines=engine_section [engine_section] diff --git a/src/uadk.h b/src/uadk.h index ed7dbf1..d212033 100644 --- a/src/uadk.h +++ b/src/uadk.h @@ -22,6 +22,7 @@ #define ENV_STRING_LEN 256 #define ENGINE_SEND_MAX_CNT 90000000 #define ENGINE_RECV_MAX_CNT 60000000 +#define ENGINE_ENV_RECV_MAX_CNT 60000 #define UADK_UNINIT 0 #define UADK_INIT_SUCCESS 1 #define UADK_INIT_FAIL 2 diff --git a/src/uadk_aead.c b/src/uadk_aead.c index e127af8..619b50c 100644 --- a/src/uadk_aead.c +++ b/src/uadk_aead.c @@ -81,7 +81,7 @@ static int uadk_e_aead_env_poll(void *ctx) if (ret < 0 || recv == expt) return ret; rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 736a8af..deed97d 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -364,7 +364,7 @@ static int uadk_e_cipher_env_poll(void *ctx) if (ret < 0 || recv == expt) return ret; rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_dh.c b/src/uadk_dh.c index b451a5f..32874d1 100644 --- a/src/uadk_dh.c +++ b/src/uadk_dh.c @@ -297,7 +297,7 @@ static int uadk_e_dh_env_poll(void *ctx) return ret; } rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_digest.c b/src/uadk_digest.c index fc979bc..c5065a4 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -390,7 +390,7 @@ static int uadk_e_digest_env_poll(void *ctx) if (ret < 0 || recv == expt) return ret; rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_pkey.c b/src/uadk_pkey.c index 2cec16e..7c115fe 100644 --- a/src/uadk_pkey.c +++ b/src/uadk_pkey.c @@ -182,7 +182,7 @@ static int uadk_e_ecc_env_poll(void *ctx) return ret; } rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_rsa.c b/src/uadk_rsa.c index 09d34b4..1594b74 100644 --- a/src/uadk_rsa.c +++ b/src/uadk_rsa.c @@ -719,7 +719,7 @@ static int uadk_e_rsa_env_poll(void *ctx) return ret; } rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); -- 2.30.0

1 year, 8 months

1
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[PATCH 1/7] v1/hpre: fix key transfer error issue

by Weili Qian

Currently, the RSA algorithm calls qm_crypto_bin_to_hpre_bin() to transfer the key when sending request. However, the key needs to be transferred only once, repeated transfer may cause data inconsistency with original user's data, resulting in incorrect calculation results. Therefore, after the key is transferred, the 'dsize' is changed to the 'bsize', When 'disze' and 'bsize' are equal, no transfer is performed. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- v1/drv/hisi_hpre_udrv.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/v1/drv/hisi_hpre_udrv.c b/v1/drv/hisi_hpre_udrv.c index 193ba56..0d0c3b4 100644 --- a/v1/drv/hisi_hpre_udrv.c +++ b/v1/drv/hisi_hpre_udrv.c @@ -136,27 +136,32 @@ static int qm_fill_rsa_crt_prikey2(struct wcrypto_rsa_prikey *prikey, wd_dq->bsize, wd_dq->dsize, "rsa crt dq"); if (unlikely(ret)) return ret; + wd_dq->dsize = wd_dq->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_dp->data, (const char *)wd_dp->data, wd_dp->bsize, wd_dp->dsize, "rsa crt dp"); if (unlikely(ret)) return ret; + wd_dp->dsize = wd_dp->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_q->data, (const char *)wd_q->data, wd_q->bsize, wd_q->dsize, "rsa crt q"); if (unlikely(ret)) return ret; + wd_q->dsize = wd_q->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_p->data, (const char *)wd_p->data, wd_p->bsize, wd_p->dsize, "rsa crt p"); if (unlikely(ret)) return ret; + wd_p->dsize = wd_p->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_qinv->data, (const char *)wd_qinv->data, wd_qinv->bsize, wd_qinv->dsize, "rsa crt qinv"); if (unlikely(ret)) return ret; + wd_qinv->dsize = wd_qinv->bsize; *data = wd_dq->data; return (int)(wd_dq->bsize + wd_qinv->bsize + wd_p->bsize + @@ -179,11 +184,13 @@ static int qm_fill_rsa_prikey1(struct wcrypto_rsa_prikey *prikey, void **data) wd_d->bsize, wd_d->dsize, "rsa prikey1 d"); if (unlikely(ret)) return ret; + wd_d->dsize = wd_d->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_n->data, (const char *)wd_n->data, wd_n->bsize, wd_n->dsize, "rsa prikey1 n"); if (unlikely(ret)) return ret; + wd_n->dsize = wd_n->bsize; *data = wd_d->data; return (int)(wd_n->bsize + wd_d->bsize); @@ -200,11 +207,13 @@ static int qm_fill_rsa_pubkey(struct wcrypto_rsa_pubkey *pubkey, void **data) wd_e->bsize, wd_e->dsize, "rsa pubkey e"); if (unlikely(ret)) return ret; + wd_e->dsize = wd_e->dsize; ret = qm_crypto_bin_to_hpre_bin(wd_n->data, (const char *)wd_n->data, wd_n->bsize, wd_n->dsize, "rsa pubkey n"); if (unlikely(ret)) return ret; + wd_n->dsize = wd_n->dsize; *data = wd_e->data; return (int)(wd_n->bsize + wd_e->bsize); -- 2.33.0

1 year, 8 months

1
6
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[PATCH] uadk_cipher: fixup sm4 cfb flags

by Zhiqi Song

The flags of sm4 cfb should be EVP_CIPH_CFB_MODE, so fix it. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- src/uadk_cipher.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 9392e04..736a8af 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -931,7 +931,7 @@ EVP_CIPHER *uadk_create_cipher_meth(int nid) cipher = uadk_sm4_ofb128; break; case NID_sm4_cfb128: - UADK_CIPHER_DESCR(sm4_cfb128, 1, 16, 16, EVP_CIPH_OFB_MODE); + UADK_CIPHER_DESCR(sm4_cfb128, 1, 16, 16, EVP_CIPH_CFB_MODE); cipher = uadk_sm4_cfb128; break; case NID_sm4_ctr: -- 2.30.0

1 year, 8 months

1
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[PATCH 00/17] uadk_engine: some bugfix and cleanup

by Zhiqi Song

This patchset contains some bugfix and cleanup. Hao Fang (6): uadk_engine: cipher/digest: fixes for priv address check uadk_engine: ec: add BN_new memory check uadk_engine: rsa: fix mem leak for from_buf uadk_engine: uadk_rsa: fix to free from_buffer uadk_engine: uask_async: fix thread_attr res leak uadk_engine: async: fix add async send timeout Qi Tao (3): cipher: uadk_e_bind_ciphers function is optimized cipher: UADK_CIPHER_DESCR is optimized uadk_engine/v1: fix g_sec_ciphers_info[] error Weili Qian (2): uadk_engine: add device initialization status sm2: fixup switching soft sm2 decrypt problem Zhiqi Song (6): ecc: optimize sm2 sign check function digest: fix the address of async op uadk_engine: fixup resource management issues ecc: add check of siglen v1/pkey: add check of qlist v1/pkey: fix uninitialized variable src/uadk.h | 5 + src/uadk_aead.c | 39 ++++-- src/uadk_async.c | 14 +- src/uadk_async.h | 1 + src/uadk_cipher.c | 170 ++++++++---------------- src/uadk_cipher_adapter.c | 38 +++--- src/uadk_dh.c | 150 +++++++++++++-------- src/uadk_digest.c | 59 +++++++-- src/uadk_ec.c | 69 ++++++---- src/uadk_ecx.c | 8 +- src/uadk_pkey.c | 113 ++++++++++------ src/uadk_rsa.c | 218 +++++++++++++++++++------------ src/uadk_sm2.c | 42 +++--- src/v1/alg/ciphers/sec_ciphers.c | 2 +- src/v1/alg/pkey/hpre_rsa.c | 13 +- src/v1/alg/pkey/hpre_wd.c | 9 +- 16 files changed, 553 insertions(+), 397 deletions(-) -- 2.33.0

1 year, 9 months

2
18
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[PATCH 01/10] uadk/v1/drv: hisi_zip_udrv - fix unmap buffer for lz77_zstd stream mode

by Yang Shen

In uadk v1, the library will alloc a ctx_buffer used for storing stream information. On hisilicon platform, the hardware will output some data to this buffer. So the ctx_buffer should be map to PA/IOVA. But here the lz77_zstd forgot to unmap this buffer on error branch. What's more, if the user use the wd_bmm ops, the unmap is a void function. Signed-off-by: Yang Shen <shenyang39(a)huawei.com> --- v1/drv/hisi_zip_udrv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/v1/drv/hisi_zip_udrv.c b/v1/drv/hisi_zip_udrv.c index f820b7f..470acb9 100644 --- a/v1/drv/hisi_zip_udrv.c +++ b/v1/drv/hisi_zip_udrv.c @@ -512,6 +512,9 @@ static int fill_zip_addr_lz77_zstd(void *ssqe, unmap_phy_seq: drv_iova_unmap(q, zstd_out->literal, (void *)phy_lit, zstd_out->lit_sz); unmap_phy_lit: + if (msg->stream_mode == WCRYPTO_COMP_STATEFUL) + drv_iova_unmap(q, msg->ctx_buf, (void *)addr.ctxbuf_addr - CTX_BUFFER_OFFSET, + MAX_CTX_RSV_SIZE); drv_iova_unmap(q, msg->src, (void *)addr.source_addr, msg->in_size); return -WD_ENOMEM; } -- 2.33.0

1 year, 9 months

1
9
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