Hey, Andy
Here we use linaro-android-media-create to burn the sd card. Since I never use the burn steps as you mentioned, so I could not comment on it.
-jack
On 20 March 2012 06:56, Andrew Fraser afraser@andyfraser.co.uk wrote:
Okay, so I have tried both 12.02 for Android and 12.02 for Ubuntu Desktop both for the Origen board.****
I got the Android image from here: http://releases.linaro.org/12.02/android/leb-origen/origen-ics-gcc46-samsung... the Ubuntu from here: http://releases.linaro.org/12.02/oneiric/ubuntu-desktop/origen-ubuntu-deskto... .****
My commands to make the Ubuntu image were:****
SDCARD=/dev/sdb****
IMGFILE=origen-ubuntu-desktop.image****
gunzip ${IMGFILE}.gz****
dd bs=64k if=${IMGFILE} of=${SDCARD}****
I then powered up the Origen board and again, got no output on the LCD and only a small amount of boot information in terminal before the SD card power LED (LED4) went off.****
U-Boot 2011.12 (Feb 16 2012 - 21:52:47) for ORIGEN****
CPU: S5PC210@1000MHz****
Board: ORIGEN****
DRAM: 1 GiB****
WARNING: Caches not enabled****
MMC: SAMSUNG SD/MMC: 0****
In: serial****
Out: serial****
Err: serial****
Hit any key to stop autoboot: 0****
reading uImage****
4082320 bytes read****
reading uInitrd****
2175126 bytes read****
## Booting kernel from Legacy Image at 40007000 ...****
Image Name: Linux****
Image Type: ARM Linux Kernel Image (uncompressed)****
Data Size: 4082256 Bytes = 3.9 MiB****
Load Address: 40008000****
Entry Point: 40008000****
Verifying Checksum ... OK****
## Loading init Ramdisk from Legacy Image at 42000000 ...****
Image Name: initramfs****
Image Type: ARM Linux RAMDisk Image (uncompressed)****
Data Size: 2175062 Bytes = 2.1 MiB****
Load Address: 00000000****
Entry Point: 00000000****
Verifying Checksum ... OK****
Loading Kernel Image ... OK****
OK****
Starting kernel ...****
Uncompressing Linux... done, booting the kernel.****
For the Android image, I used the following commands:****
SDCARD=/dev/sdb****
IMGFILE=origen-ics-gcc46-samsunglt-stable-blob.img****
gunzip ${IMGFILE}.gz****
dd bs=64k if=${IMGFILE} of=${SDCARD}****
Exactly the same thing happened as I previously mentioned, got a bunch of boot text then LED4 goes off and nothing else happens.****
Any advice would be gratefully accepted.****
*Andy***
Hi, could you paste your command to flash SD card here?****
I have just purchased an Origen Board - Full Package. I flashed the SD card with igen-ics-gcc46-samsunglt-stable-blob.img and placed it into the SD card slot. I flicked the power switch and pressed SWITCH then POWER and saw the board booting in terminal. However, after a short period of time LED4 turns off and I do not see the LCD light or show the Android screen. The output in terminal is given below. Is my board faulty or have I not flashed the correct image to the SD card ?****
U-Boot 2011.06-01275-gd6186aa (Feb 17 2012 - 08:54:12) for ORIGEN****
CPU: S5PC210@1000MHz****
Board: ORIGEN DRAM: 1 GiB WARNING: Caches not enabled MMC: SAMSUNG SD/MMC: 0 *** Warning - bad CRC, using default environment****
In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 reading boot.scr****
397 bytes read Running bootscript from mmc0:2 ... ## Executing script at 42000000 reading uImage****
4049424 bytes read reading uInitrd****
166156 bytes read ## Booting kernel from Legacy Image at 40007000 ... Image Name: Linux-3.0.4+ Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 4049360 Bytes = 3.9 MiB Load Address: 40008000 Entry Point: 40008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 42000000 ... Image Name: Android Ramdisk Image Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 166092 Bytes = 162.2 KiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK****
Starting kernel ...****
Uncompressing Linux... done, booting the kernel. <5>Linux version 3.0.4+ (jenkins-build@ip-10-140-6-146) (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #1 SMP PREEMPT Fri Feb 17 09:34:26 UTC 2012 CPU: ARMv7 Processor [412fc091] revision 1 (ARMv7), cr=10c5387f CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache Machine: ORIGEN <4>Ignoring unrecognised tag 0x00000000 <4>Ignoring unrecognised tag 0x00000000 <4>Ignoring unrecognised tag 0x00000000 <4>Ignoring unrecognised tag 0x00000000 <5>Truncating RAM at 60000000-7fffffff to -6dffffff (vmalloc region overlap). <3>CMA reserve : jpeg, addr is 0x5e800000, size is 0x1800000 <3>CMA reserve : fimc0, addr is 0x5e300000, size is 0x500000 <3>CMA reserve : fimc1, addr is 0x5de00000, size is 0x500000 <3>CMA reserve : fimc2, addr is 0x5d900000, size is 0x500000 <3>CMA reserve : fimc3, addr is 0x5d400000, size is 0x500000 <3>CMA reserve : fimd, addr is 0x5bc00000, size is 0x1800000 <3>CMA reserve : common, addr is 0x57c00000, size is 0x4000000 <3>CMA reserve : (null), addr is 0x57c00000, size is 0x0 Memory policy: ECC disabled, Data cache writealloc CPU EXYNOS4210 (id 0x43210011) <7>exynos4_init_clocks: initializing clocks <6>S3C24XX Clocks, Copyright 2004 Simtec Electronics <3>s3c_register_clksrc: clock armclk has no registers set <3>mout_audss: bad source 0 <7>exynos4_setup_clocks: registering clocks <7>exynos4_setup_clocks: xtal is 24000000 <6>EXYNOS4: PLL settings, A=1000000000, M=800000000, E=96000000 V=108000000<6>EXYNOS4: ARMCLK=1000000000, DMC=400000000, ACLK200=200000000 ACLK100=100000000, ACLK160=160000000, ACLK133=133333333 <6>uclk1: source is mout_mpll (6), rate is 100000000 <6>uclk1: source is mout_mpll (6), rate is 100000000 <6>uclk1: source is mout_mpll (6), rate is 100000000 <6>uclk1: source is mout_mpll (6), rate is 100000000 <6>sclk_pwm: source is ext_xtal (0), rate is 24000000 <6>sclk_csis: source is xusbxti (1), rate is 0 <6>sclk_csis: source is xusbxti (1), rate is 0 <6>sclk_cam0: source is xusbxti (1), rate is 0 <6>sclk_cam1: source is xusbxti (1), rate is 0 <6>sclk_fimc: source is xusbxti (1), rate is 0 <6>sclk_fimc: source is xusbxti (1), rate is 0 <6>sclk_fimc: source is xusbxti (1), rate is 0 <6>sclk_fimc: source is xusbxti (1), rate is 0 <6>sclk_mixer: source is sclk_dac (0), rate is 24000000 <6>sclk_fimd0: source is xusbxti (1), rate is 0 <6>sclk_fimd1: source is xusbxti (1), rate is 0 <6>sclk_sata: source is mout_mpll (0), rate is 133333333 <6>sclk_spi: source is xusbxti (1), rate is 0 <6>sclk_spi: source is mout_mpll (6), rate is 80000000 <6>sclk_spi: source is xusbxti (1), rate is 0 <6>sclk_fimg2d: source is mout_g2d0 (0), rate is 100000000 <7>On node 0 totalpages: 188416 <7> Normal zone: 1472 pages used for memmap <7> Normal zone: 0 pages reserved <7> Normal zone: 186944 pages, LIFO batch:31 <6>PERCPU: Embedded 7 pages/cpu @c0f96000 s6528 r8192 d13952 u32768 <7>pcpu-alloc: s6528 r8192 d13952 u32768 alloc=8*4096 <7>pcpu-alloc: [0] 0 [0] 1 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 186944 <5>Kernel command line: console=tty0 console=ttySAC2,115200n8 rootwait ro init=/init androidboot.console=ttySAC2 console=ttySAC2 root=/dev/mmcblk0p2
<6>PID hash table entries: 4096 (order: 2, 16384 bytes) <6>Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) <6>Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) <6>Memory: 736MB = 736MB total <5>Memory: 601736k/601736k available, 151928k reserved, 0K highmem <5>Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) DMA : 0xfe800000 - 0xffe00000 ( 22 MB) vmalloc : 0xee800000 - 0xf6000000 ( 120 MB) lowmem : 0xc0000000 - 0xee000000 ( 736 MB) modules : 0xbf000000 - 0xc0000000 ( 16 MB) .text : 0xc0008000 - 0xc078fd14 (7712 kB) .init : 0xc0790000 - 0xc07d5980 ( 279 kB) .data : 0xc07d6000 - 0xc0835930 ( 383 kB) .bss : 0xc0835954 - 0xc098bca8 (1369 kB) <6>Preemptible hierarchical RCU implementation. <6>NR_IRQS:624 <6>sched_clock: 32 bits at 50MHz, resolution 20ns, wraps every 85899ms <6>Console: colour dummy device 80x30 <6>console [tty0] enabled Linux version 3.0.4+ (jenkins-build@ip-10-140-6-146) (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #1 SMP PREEMPT Fri Feb 17 09:34:26 UTC 2012 CPU: ARMv7 Processor [412fc091] revision 1 (ARMv7), cr=10c5387f CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache Machine: ORIGEN Ignoring unrecognised tag 0x00000000 Ignoring unrecognised tag 0x00000000 Ignoring unrecognised tag 0x00000000 Ignoring unrecognised tag 0x00000000 Truncating RAM at 60000000-7fffffff to -6dffffff (vmalloc region overlap). CMA reserve : jpeg, addr is 0x5e800000, size is 0x1800000 CMA reserve : fimc0, addr is 0x5e300000, size is 0x500000 CMA reserve : fimc1, addr is 0x5de00000, size is 0x500000 CMA reserve : fimc2, addr is 0x5d900000, size is 0x500000 CMA reserve : fimc3, addr is 0x5d400000, size is 0x500000 CMA reserve : fimd, addr is 0x5bc00000, size is 0x1800000 CMA reserve : common, addr is 0x57c00000, size is 0x4000000 CMA reserve : (null), addr is 0x57c00000, size is 0x0 Memory policy: ECC disabled, Data cache writealloc CPU EXYNOS4210 (id 0x43210011) S3C24XX Clocks, Copyright 2004 Simtec Electronics s3c_register_clksrc: clock armclk has no registers set mout_audss: bad source 0 EXYNOS4: PLL settings, A=1000000000, M=800000000, E=96000000 V=108000000 EXYNOS4: ARMCLK=1000000000, DMC=400000000, ACLK200=200000000 ACLK100=100000000, ACLK160=160000000, ACLK133=133333333 uclk1: source is mout_mpll (6), rate is 100000000 uclk1: source is mout_mpll (6), rate is 100000000 uclk1: source is mout_mpll (6), rate is 100000000 uclk1: source is mout_mpll (6), rate is 100000000 sclk_pwm: source is ext_xtal (0), rate is 24000000 sclk_csis: source is xusbxti (1), rate is 0 sclk_csis: source is xusbxti (1), rate is 0 sclk_cam0: source is xusbxti (1), rate is 0 sclk_cam1: source is xusbxti (1), rate is 0 sclk_fimc: source is xusbxti (1), rate is 0 sclk_fimc: source is xusbxti (1), rate is 0 sclk_fimc: source is xusbxti (1), rate is 0 sclk_fimc: source is xusbxti (1), rate is 0 sclk_mixer: source is sclk_dac (0), rate is 24000000 sclk_fimd0: source is xusbxti (1), rate is 0 sclk_fimd1: source is xusbxti (1), rate is 0 sclk_sata: source is mout_mpll (0), rate is 133333333 sclk_spi: source is xusbxti (1), rate is 0 sclk_spi: source is mout_mpll (6), rate is 80000000 sclk_spi: source is xusbxti (1), rate is 0 sclk_fimg2d: source is mout_g2d0 (0), rate is 100000000 PERCPU: Embedded 7 pages/cpu @c0f96000 s6528 r8192 d13952 u32768 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 186944 Kernel command line: console=tty0 console=ttySAC2,115200n8 rootwait ro init=/init androidboot.console=ttySAC2 console=ttySAC2 root=/dev/mmcblk0p2
PID hash table entries: 4096 (order: 2, 16384 bytes) Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Memory: 736MB = 736MB total Memory: 601736k/601736k available, 151928k reserved, 0K highmem Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) DMA : 0xfe800000 - 0xffe00000 ( 22 MB) vmalloc : 0xee800000 - 0xf6000000 ( 120 MB) lowmem : 0xc0000000 - 0xee000000 ( 736 MB) modules : 0xbf000000 - 0xc0000000 ( 16 MB) .text : 0xc0008000 - 0xc078fd14 (7712 kB) .init : 0xc0790000 - 0xc07d5980 ( 279 kB) .data : 0xc07d6000 - 0xc0835930 ( 383 kB) .bss : 0xc0835954 - 0xc098bca8 (1369 kB) Preemptible hierarchical RCU implementation. NR_IRQS:624 sched_clock: 32 bits at 50MHz, resolution 20ns, wraps every 85899ms Console: colour dummy device 80x30 console <tty0] enabled 6>console [ttySAC2] enabled console [tt<SAC2] enabled 6>Calibrating delay loop... Calibrating delay loop... <c>1992.29 BogoMIPS (lpj=4980736) 1992.29 BogoMIPS<(lpj=4980736) 6>pid_max: default: 32768 minimum: 301 pid_max: default: 32768 minimum: 301 <6>Mount-cache hash table entries: 512 Mount-cache hash table entries: 512 <6>CPU: Testing write buffer coherency: CPU: Testing write buffer coherency: ok ok <6>ftrace: allocating 19856 entries in 59 pages ftrace: allocating 19856 entries in 59 pages <6>CPU0: thread -1, cpu 0, socket 9, mpidr 80000900 CPU0: thread -1, cpu 0, socket 9, <pidr 80000900 6>Calibrating local timer... Calibrating local timer... 249.93MHz. 249.93MHz. <6>hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available <6>L310 cache controller enabled L310 cache cont<oller enabled 6>l2x0: 16 ways, CACHE_ID 0x4100c4c5, AUX_CTRL 0x7e470001, Cache size: 1048576 B l2x0: 16 ways, CACHE_ID 0x4100c4c5, AUX_CTRL 0x7e470001, Cache size: 1048576 B CPU1: Booted secondary processor <2>CPU1: Unknown IPI message 0x1****
linaro-android mailing list linaro-android@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-android****
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