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[PATCH 04/14] uadk: update acc user mode driver

by Longfang Liu

After adapting the new heterogeneous hybrid acceleration function. The initialization of the device driver requires adaptation updates. In addition, the instruction acceleration algorithm driver needs to fully adapt to the synchronous and asynchronous mode of the uadk framework. Signed-off-by: Longfang Liu <liulongfang(a)huawei.com> --- Makefile.am | 2 +- drv/hisi_comp.c | 3 +++ drv/hisi_dae.c | 3 +++ drv/hisi_hpre.c | 3 +++ drv/hisi_sec.c | 3 +++ drv/isa_ce_sm3.c | 18 ++++++++++++- drv/isa_ce_sm4.c | 22 ++++++++++++++-- include/wd_util.h | 4 +++ wd_util.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++ 9 files changed, 119 insertions(+), 4 deletions(-) diff --git a/Makefile.am b/Makefile.am index d671d09..cf50fec 100644 --- a/Makefile.am +++ b/Makefile.am @@ -93,7 +93,7 @@ libhisi_hpre_la_SOURCES=drv/hisi_hpre.c drv/hisi_qm_udrv.c \ hisi_qm_udrv.h libisa_ce_la_SOURCES=arm_arch_ce.h drv/isa_ce_sm3.c drv/isa_ce_sm3_armv8.S isa_ce_sm3.h \ - drv/isa_ce_sm4.c drv/isa_ce_sm4_armv8.S drv/isa_ce_sm4.h + drv/isa_ce_sm4.c drv/isa_ce_sm4_armv8.S drv/isa_ce_sm4.h wd_util.c wd_util.h libisa_sve_la_SOURCES=drv/hash_mb/hash_mb.c wd_digest_drv.h drv/hash_mb/hash_mb.h \ drv/hash_mb/sm3_sve_common.S drv/hash_mb/sm3_mb_asimd_x1.S \ diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c index 547e665..6099efb 100644 --- a/drv/hisi_comp.c +++ b/drv/hisi_comp.c @@ -807,6 +807,9 @@ static int hisi_zip_init(void *conf, void *priv) memcpy(&zip_ctx->config, config, sizeof(struct wd_ctx_config_internal)); /* allocate qp for each context */ for (i = 0; i < config->ctx_num; i++) { + if (config->ctxs[i].ctx_type != UADK_CTX_HW || + !config->ctxs[i].ctx) + continue; h_ctx = config->ctxs[i].ctx; qm_priv.sqe_size = sizeof(struct hisi_zip_sqe); qm_priv.op_type = config->ctxs[i].op_type; diff --git a/drv/hisi_dae.c b/drv/hisi_dae.c index 49d6b55..e8a75a4 100644 --- a/drv/hisi_dae.c +++ b/drv/hisi_dae.c @@ -1573,6 +1573,9 @@ static int dae_init(void *conf, void *priv) qm_priv.sqe_size = sizeof(struct dae_sqe); /* Allocate qp for each context */ for (i = 0; i < config->ctx_num; i++) { + if (config->ctxs[i].ctx_type != UADK_CTX_HW || + !config->ctxs[i].ctx) + continue; h_ctx = config->ctxs[i].ctx; qm_priv.qp_mode = config->ctxs[i].ctx_mode; /* Setting the epoll en to 0 for ASYNC ctx */ diff --git a/drv/hisi_hpre.c b/drv/hisi_hpre.c index f91d7a8..8ade9ed 100644 --- a/drv/hisi_hpre.c +++ b/drv/hisi_hpre.c @@ -501,6 +501,9 @@ static int hpre_init_qm_priv(struct wd_ctx_config_internal *config, qm_priv->sqe_size = sizeof(struct hisi_hpre_sqe); for (i = 0; i < config->ctx_num; i++) { + if (config->ctxs[i].ctx_type != UADK_CTX_HW || + !config->ctxs[i].ctx) + continue; h_ctx = config->ctxs[i].ctx; qm_priv->qp_mode = config->ctxs[i].ctx_mode; /* Setting the epoll en to 0 for ASYNC ctx */ diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 7635466..7f46e4b 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -3095,6 +3095,9 @@ static int hisi_sec_init(void *conf, void *priv) qm_priv.sqe_size = sizeof(struct hisi_sec_sqe); /* allocate qp for each context */ for (i = 0; i < config->ctx_num; i++) { + if (config->ctxs[i].ctx_type != UADK_CTX_HW || + !config->ctxs[i].ctx) + continue; h_ctx = config->ctxs[i].ctx; /* setting the type is 0 for sqc_type */ qm_priv.op_type = 0; diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c index c8812df..110eb4d 100644 --- a/drv/isa_ce_sm3.c +++ b/drv/isa_ce_sm3.c @@ -17,7 +17,6 @@ #include "drv/isa_ce_sm3.h" #include "drv/wd_digest_drv.h" #include "wd_digest.h" -#include "wd_util.h" typedef void (sm3_ce_block_fn)(__u32 word_reg[SM3_STATE_WORDS], const unsigned char *src, size_t blocks); @@ -340,6 +339,7 @@ static int do_hmac_sm3_ce(struct wd_digest_msg *msg, __u8 *out_hmac) static int sm3_ce_drv_send(handle_t ctx, void *digest_msg) { + struct wd_soft_ctx *sfctx = (struct wd_soft_ctx *)ctx; struct wd_digest_msg *msg = (struct wd_digest_msg *)digest_msg; __u8 digest[SM3_DIGEST_SIZE] = {0}; int ret; @@ -349,6 +349,10 @@ static int sm3_ce_drv_send(handle_t ctx, void *digest_msg) return -WD_EINVAL; } + ret = wd_queue_is_busy(sfctx); + if (ret) + return ret; + if (msg->data_fmt == WD_SGL_BUF) { WD_ERR("invalid: SM3 CE driver do not support sgl data format!\n"); return -WD_EINVAL; @@ -363,11 +367,23 @@ static int sm3_ce_drv_send(handle_t ctx, void *digest_msg) ret = -WD_EINVAL; } + ret = wd_get_sqe_from_queue(sfctx, msg->tag); + if (ret) + return ret; + return ret; } static int sm3_ce_drv_recv(handle_t ctx, void *digest_msg) { + struct wd_soft_ctx *sfctx = (struct wd_soft_ctx *)ctx; + struct wd_digest_msg *msg = (struct wd_digest_msg *)digest_msg; + int ret; + + ret = wd_put_sqe_to_queue(sfctx, &msg->tag, &msg->result); + if (ret) + return ret; + return WD_SUCCESS; } diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c index 4b2f9cf..d3cd217 100644 --- a/drv/isa_ce_sm4.c +++ b/drv/isa_ce_sm4.c @@ -11,9 +11,10 @@ * Copyright 2024 Huawei Technologies Co.,Ltd. All rights reserved. */ +#include "wd_alg.h" #include "drv/wd_cipher_drv.h" -#include "wd_cipher.h" #include "isa_ce_sm4.h" +#include "wd_cipher.h" #define SM4_ENCRYPT 1 #define SM4_DECRYPT 0 @@ -323,15 +324,20 @@ static int sm4_xts_decrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rkey static int isa_ce_cipher_send(handle_t ctx, void *wd_msg) { + struct wd_soft_ctx *sfctx = (struct wd_soft_ctx *)ctx; struct wd_cipher_msg *msg = wd_msg; struct SM4_KEY rkey; int ret = 0; - if (!msg) { + if (!msg || !ctx) { WD_ERR("invalid: input sm4 msg is NULL!\n"); return -WD_EINVAL; } + ret = wd_queue_is_busy(sfctx); + if (ret) + return ret; + if (msg->data_fmt == WD_SGL_BUF) { WD_ERR("invalid: SM4 CE driver do not support sgl data format!\n"); return -WD_EINVAL; @@ -384,11 +390,23 @@ static int isa_ce_cipher_send(handle_t ctx, void *wd_msg) return -WD_EINVAL; } + ret = wd_get_sqe_from_queue(sfctx, msg->tag); + if (ret) + return ret; + return ret; } static int isa_ce_cipher_recv(handle_t ctx, void *wd_msg) { + struct wd_soft_ctx *sfctx = (struct wd_soft_ctx *)ctx; + struct wd_cipher_msg *msg = wd_msg; + int ret; + + ret = wd_put_sqe_to_queue(sfctx, &msg->tag, &msg->result); + if (ret) + return ret; + return 0; } diff --git a/include/wd_util.h b/include/wd_util.h index bee7f29..ff9aa02 100644 --- a/include/wd_util.h +++ b/include/wd_util.h @@ -561,6 +561,10 @@ static inline void wd_ctx_spin_unlock(struct wd_ctx_internal *ctx, int type) pthread_spin_unlock(&ctx->lock); } +int wd_queue_is_busy(struct wd_soft_ctx *sctx); +int wd_get_sqe_from_queue(struct wd_soft_ctx *sctx, __u32 tag_id); +int wd_put_sqe_to_queue(struct wd_soft_ctx *sctx, __u32 *tag_id, __u8 *result); + #ifdef __cplusplus } #endif diff --git a/wd_util.c b/wd_util.c index 848ff15..bf6894b 100644 --- a/wd_util.c +++ b/wd_util.c @@ -3077,3 +3077,68 @@ void wd_alg_attrs_uninit(struct wd_init_attrs *attrs) free(ctx_config); wd_sched_rr_release(alg_sched); } + +int wd_queue_is_busy(struct wd_soft_ctx *sctx) +{ + /* The queue is not used */ + if (sctx->run_num >= MAX_SOFT_QUEUE_LENGTH - 1) + return -WD_EBUSY; + + return 0; +} + +int wd_get_sqe_from_queue(struct wd_soft_ctx *sctx, __u32 tag_id) +{ + struct wd_soft_sqe *sqe = NULL; + + pthread_spin_lock(&sctx->slock); + sqe = &sctx->qfifo[sctx->head]; + if (!sqe->used && !sqe->complete) { // find the next not used sqe + sctx->head++; + if (unlikely(sctx->head == MAX_SOFT_QUEUE_LENGTH)) + sctx->head = 0; + + sqe->used = 1; + sqe->complete = 1; + sqe->id = tag_id; + sqe->result = 0; + __atomic_fetch_add(&sctx->run_num, 0x1, __ATOMIC_ACQUIRE); + pthread_spin_unlock(&sctx->slock); + } else { + pthread_spin_unlock(&sctx->slock); + return -WD_EBUSY; + } + + return 0; +} + +int wd_put_sqe_to_queue(struct wd_soft_ctx *sctx, __u32 *tag_id, __u8 *result) +{ + struct wd_soft_sqe *sqe = NULL; + + /* The queue is not used */ + if (sctx->run_num < 1) + return -WD_EAGAIN; + + if (pthread_spin_trylock(&sctx->rlock)) + return -WD_EAGAIN; + sqe = &sctx->qfifo[sctx->tail]; + if (sqe->used && sqe->complete) { // find a used sqe + sctx->tail++; + if (unlikely(sctx->tail == MAX_SOFT_QUEUE_LENGTH)) + sctx->tail = 0; + + *tag_id = sqe->id; + *result = sqe->result; + sqe->used = 0x0; + sqe->complete = 0x0; + __atomic_fetch_sub(&sctx->run_num, 0x1, __ATOMIC_ACQUIRE); + pthread_spin_unlock(&sctx->rlock); + } else { + pthread_spin_unlock(&sctx->rlock); + return -WD_EAGAIN; + } + + return 0; +} + -- 2.24.0

4 months, 4 weeks

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[PATCH 00/14] uadk supports heterogeneous computing

by Longfang Liu

Function updates on the uadk framework. Support heterogeneous hybrid computing acceleration functions for all uadk algorithms Longfang Liu (14): Revert "drivers alloc and free resources by themself" uadk: add heterogeneous scheduling solutions uadk: update uadk scheduler uadk: update acc user mode driver uadk: aead adapts to heterogeneous scheduling mode uadk: update hash agg's code uadk: update cipher's function code uadk: comp adapt to heterogeneous scheduling mode uadk: DH adapt to heterogeneous scheduling mode uadk: digest adapt to heterogeneous scheduling mode uadk: ECC adapt to heterogeneous scheduling mode uadk: rsa adapt to heterogeneous scheduling mode uadk: update uadk's internal functions uadk_tool: update uadk test tool Makefile.am | 2 +- drv/hash_mb/hash_mb.c | 48 +- drv/hisi_comp.c | 32 +- drv/hisi_dae.c | 39 +- drv/hisi_hpre.c | 63 +- drv/hisi_sec.c | 120 ++- drv/isa_ce_sm3.c | 55 +- drv/isa_ce_sm4.c | 59 +- include/wd_alg.h | 58 +- include/wd_alg_common.h | 58 +- include/wd_sched.h | 7 + include/wd_util.h | 35 +- uadk_tool/benchmark/sec_uadk_benchmark.c | 71 +- wd_aead.c | 126 ++- wd_agg.c | 81 +- wd_alg.c | 63 +- wd_cipher.c | 103 ++- wd_comp.c | 92 ++- wd_dh.c | 95 ++- wd_digest.c | 125 ++- wd_ecc.c | 97 ++- wd_rsa.c | 95 ++- wd_sched.c | 974 +++++++++++++++++++++-- wd_util.c | 798 ++++++++++++------- 24 files changed, 2205 insertions(+), 1091 deletions(-) -- 2.24.0

4 months, 4 weeks

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[PATCH 00/14] uadk supports heterogeneous computing

by Longfang Liu

Function updates on the uadk framework. Support heterogeneous hybrid computing acceleration functions for all uadk algorithms Longfang Liu (14): Revert "drivers alloc and free resources by themself" uadk: add heterogeneous scheduling solutions uadk: update uadk scheduler uadk: update acc user mode driver uadk: aead adapts to heterogeneous scheduling mode uadk: update hash agg's code uadk: update cipher's function code uadk: comp adapt to heterogeneous scheduling mode uadk: DH adapt to heterogeneous scheduling mode uadk: digest adapt to heterogeneous scheduling mode uadk: ECC adapt to heterogeneous scheduling mode uadk: rsa adapt to heterogeneous scheduling mode uadk: update uadk's internal functions uadk_tool: update uadk test tool Makefile.am | 2 +- drv/hash_mb/hash_mb.c | 48 +- drv/hisi_comp.c | 32 +- drv/hisi_dae.c | 39 +- drv/hisi_hpre.c | 63 +- drv/hisi_sec.c | 120 ++- drv/isa_ce_sm3.c | 55 +- drv/isa_ce_sm4.c | 59 +- include/wd_alg.h | 58 +- include/wd_alg_common.h | 58 +- include/wd_sched.h | 7 + include/wd_util.h | 35 +- uadk_tool/benchmark/sec_uadk_benchmark.c | 71 +- wd_aead.c | 126 ++- wd_agg.c | 81 +- wd_alg.c | 63 +- wd_cipher.c | 103 ++- wd_comp.c | 92 ++- wd_dh.c | 95 ++- wd_digest.c | 125 ++- wd_ecc.c | 97 ++- wd_rsa.c | 95 ++- wd_sched.c | 974 +++++++++++++++++++++-- wd_util.c | 798 ++++++++++++------- 24 files changed, 2205 insertions(+), 1091 deletions(-) -- 2.24.0

4 months, 4 weeks

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[PATCH 00/14] uadk adds hybrid computing capabilities

by Longfang Liu

Function updates on the uadk framework. Support heterogeneous hybrid computing acceleration functions for all uadk algorithms Longfang Liu (14): Revert "drivers alloc and free resources by themself" uadk: add heterogeneous scheduling solutions uadk: update uadk scheduler uadk: update acc user mode driver uadk: aead adapts to heterogeneous scheduling mode uadk: update hash agg’s function code uadk: update cipher’s function code uadk: comp adapt to heterogeneous scheduling mode uadk: DH adapt to heterogeneous scheduling mode uadk: digest adapt to heterogeneous scheduling mode uadk: ECC adapt to heterogeneous scheduling mode uadk: rsa adapt to heterogeneous scheduling mode uadk: update uadk's internal functions uadk_tool: update uadk test tool Makefile.am | 2 +- drv/hash_mb/hash_mb.c | 48 +- drv/hisi_comp.c | 32 +- drv/hisi_dae.c | 39 +- drv/hisi_hpre.c | 63 +- drv/hisi_sec.c | 120 ++- drv/isa_ce_sm3.c | 55 +- drv/isa_ce_sm4.c | 59 +- include/wd_alg.h | 58 +- include/wd_alg_common.h | 58 +- include/wd_sched.h | 7 + include/wd_util.h | 35 +- uadk_tool/benchmark/sec_uadk_benchmark.c | 71 +- wd_aead.c | 126 ++- wd_agg.c | 81 +- wd_alg.c | 63 +- wd_cipher.c | 103 ++- wd_comp.c | 92 ++- wd_dh.c | 95 ++- wd_digest.c | 125 ++- wd_ecc.c | 97 ++- wd_rsa.c | 95 ++- wd_sched.c | 974 +++++++++++++++++++++-- wd_util.c | 798 ++++++++++++------- 24 files changed, 2205 insertions(+), 1091 deletions(-) -- 2.24.0

5 months

2
15
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[PATCH 00/14] uadk supports heterogeneous computing

by Longfang Liu

Function updates on the uadk framework. Support heterogeneous hybrid computing acceleration functions for all uadk algorithms Longfang Liu (14): Revert "drivers alloc and free resources by themself" uadk: add heterogeneous scheduling solutions uadk: update uadk scheduler uadk: update acc user mode driver uadk: aead adapts to heterogeneous scheduling mode uadk: update hash agg's code uadk: update cipher's function code uadk: comp adapt to heterogeneous scheduling mode uadk: DH adapt to heterogeneous scheduling mode uadk: digest adapt to heterogeneous scheduling mode uadk: ECC adapt to heterogeneous scheduling mode uadk: rsa adapt to heterogeneous scheduling mode uadk: update uadk's internal functions uadk_tool: update uadk test tool Makefile.am | 2 +- drv/hash_mb/hash_mb.c | 48 +- drv/hisi_comp.c | 32 +- drv/hisi_dae.c | 39 +- drv/hisi_hpre.c | 63 +- drv/hisi_sec.c | 120 ++- drv/isa_ce_sm3.c | 55 +- drv/isa_ce_sm4.c | 59 +- include/wd_alg.h | 58 +- include/wd_alg_common.h | 58 +- include/wd_sched.h | 7 + include/wd_util.h | 35 +- uadk_tool/benchmark/sec_uadk_benchmark.c | 71 +- wd_aead.c | 126 ++- wd_agg.c | 81 +- wd_alg.c | 63 +- wd_cipher.c | 103 ++- wd_comp.c | 92 ++- wd_dh.c | 95 ++- wd_digest.c | 125 ++- wd_ecc.c | 97 ++- wd_rsa.c | 95 ++- wd_sched.c | 974 +++++++++++++++++++++-- wd_util.c | 798 ++++++++++++------- 24 files changed, 2205 insertions(+), 1091 deletions(-) -- 2.24.0

5 months

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[PATCH] uadk_engine: Add release note for uadk_engine 1.5

by Zhiqi Song

Add new feature and fixes release note of uadk_engine 1.5. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- docs/ReleaseNotes.md | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/docs/ReleaseNotes.md b/docs/ReleaseNotes.md index 20163a2..94fc7bb 100644 --- a/docs/ReleaseNotes.md +++ b/docs/ReleaseNotes.md @@ -2,11 +2,23 @@ # UADK engine Release v1.5 Dec 2024 ## New Features +- Support SM2 asymmetric algorithm with openssl 3.0 provider mechanism. +- Support processing single diesgt block function with openssl 3.0 provider mechanism. +- Support AES CTS alg with openssl 3.0 provider mechanism. ## Fixes +- Reconstructing uadk_provider DH implementation with unified data structure and FFC \ + extended functions. +- Add different AES algorithm key bit width specifications in the uadk_provider. +- For digest algorithms, for both uadk_engine and uadk_provider, increasing the \ + amount of data delivered to the hardware at a time to reduce the number of interactions. +- Fixup bio fseek() suspending problem in uadk_provider. +- Fixup an async problem: wakup async_poll_process_func before free async_poll_task_free. +- Fixip cipher issue when input len is 0 in decrypto update. +- Fixip the key and IV verification methods for cipher init. +- Remove update iv for cipher, as the iv has been updated by the UADK. ## Working combination - - UADK v2.8 - OpenSSL 1.1.1f & OpenSSL 3.0+ -- 2.33.0

6 months

1
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[PATCH 09/24] uadk_provider: add aes alg for uadk_provider in openssl3.0

by Zhiqi Song

From: Chenghai Huang <huangchenghai2(a)huawei.com> The following 17 AES algorithms are added: AES-128-CBC AES-192-CBC AES-256-CBC AES-128-ECB AES-192-ECB AES-256-ECB AES-128-XTS AES-256-XTS AES-128-CTR AES-192-CTR AES-256-CTR AES-128-OFB AES-192-OFB AES-256-OFB AES-128-CFB AES-192-CFB AES-256-CFB Signed-off-by: Chenghai Huang <huangchenghai2(a)huawei.com> Signed-off-by: JiangShui Yang <yangjiangshui(a)h-partners.com> --- src/uadk_prov.h | 33 ++++++++++++++++++++++----------- src/uadk_prov_init.c | 26 +++++++++++++++++++++++++- 2 files changed, 47 insertions(+), 12 deletions(-) diff --git a/src/uadk_prov.h b/src/uadk_prov.h index 1b4816e..3655437 100644 --- a/src/uadk_prov.h +++ b/src/uadk_prov.h @@ -128,17 +128,28 @@ extern const OSSL_DISPATCH uadk_sha512_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sha512_224_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sha512_256_functions[FUNC_MAX_NUM]; - -extern const OSSL_DISPATCH uadk_aes_128_cbc_functions[]; -extern const OSSL_DISPATCH uadk_aes_192_cbc_functions[]; -extern const OSSL_DISPATCH uadk_aes_256_cbc_functions[]; -extern const OSSL_DISPATCH uadk_aes_128_ecb_functions[]; -extern const OSSL_DISPATCH uadk_aes_192_ecb_functions[]; -extern const OSSL_DISPATCH uadk_aes_256_ecb_functions[]; -extern const OSSL_DISPATCH uadk_aes_128_xts_functions[]; -extern const OSSL_DISPATCH uadk_aes_256_xts_functions[]; -extern const OSSL_DISPATCH uadk_sm4_cbc_functions[]; -extern const OSSL_DISPATCH uadk_sm4_ecb_functions[]; +extern const OSSL_DISPATCH uadk_aes_128_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_xts_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_xts_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_ctr_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_des_ede3_cbc_functions[]; extern const OSSL_DISPATCH uadk_des_ede3_ecb_functions[]; diff --git a/src/uadk_prov_init.c b/src/uadk_prov_init.c index 52a5da0..05a1b9f 100644 --- a/src/uadk_prov_init.c +++ b/src/uadk_prov_init.c @@ -89,10 +89,34 @@ const OSSL_ALGORITHM uadk_prov_ciphers[] = { uadk_aes_128_xts_functions, "uadk_provider aes-128-xts" }, { "AES-256-XTS", UADK_DEFAULT_PROPERTIES, uadk_aes_256_xts_functions, "uadk_provider aes-256-xts" }, - { "SM4-CBC:SM4", UADK_DEFAULT_PROPERTIES, + { "AES-128-CTR", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_ctr_functions, "uadk_provider aes-128-ctr" }, + { "AES-192-CTR", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_ctr_functions, "uadk_provider aes-192-ctr" }, + { "AES-256-CTR", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_ctr_functions, "uadk_provider aes-256-ctr" }, + { "AES-128-OFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_ofb128_functions, "uadk_provider aes-128-ofb" }, + { "AES-192-OFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_ofb128_functions, "uadk_provider aes-192-ofb" }, + { "AES-256-OFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_ofb128_functions, "uadk_provider aes-256-ofb" }, + { "AES-128-CFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_cfb128_functions, "uadk_provider aes-128-cfb" }, + { "AES-192-CFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_cfb128_functions, "uadk_provider aes-192-cfb" }, + { "AES-256-CFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_cfb128_functions, "uadk_provider aes-256-cfb" }, + { "SM4-CBC", UADK_DEFAULT_PROPERTIES, uadk_sm4_cbc_functions, "uadk_provider sm4-cbc" }, { "SM4-ECB", UADK_DEFAULT_PROPERTIES, uadk_sm4_ecb_functions, "uadk_provider sm4-ecb" }, + { "SM4-OFB", UADK_DEFAULT_PROPERTIES, + uadk_sm4_ofb128_functions, "uadk_provider sm4-ofb" }, + { "SM4-CFB", UADK_DEFAULT_PROPERTIES, + uadk_sm4_cfb128_functions, "uadk_provider sm4-cfb" }, + { "SM4-CTR", UADK_DEFAULT_PROPERTIES, + uadk_sm4_ctr_functions, "uadk_provider sm4-ctr" }, { "DES-EDE3-CBC", UADK_DEFAULT_PROPERTIES, uadk_des_ede3_cbc_functions, "uadk_provider des-ede3-cbc" }, { "DES-EDE3-ECB", UADK_DEFAULT_PROPERTIES, -- 2.33.0

7 months, 2 weeks

1
0
0 0

[PATCH 00/24] uadk_provider: some algorithm optimization and problem fixing

by Zhiqi Song

From: JiangShui Yang <yangjiangshui(a)h-partners.com> Chenghai Huang (15): uadk_provider: add input pointer length check for digest and cipher uadk_provider: code cleanup for provider bio uadk_provider: add length check for input pointer uadk_provider: add a timeout exit condition to the loop uadk_provider: code cleanup for uadk_provider and uadk_engine uadk_provider: add aes alg for uadk_provider in openssl3.0 uadk_engine: optimized engine update process uadk_provider: fix cipher issue when input len is 0 in decrypto update uadk_provider: fix the set ctx param function for ivlen and pad uadk_provider: fix the key and IV verification methods for cipher init uadk_provider: fix the switch condition issue of soft digest in engine uadk_provider: extract hardware initialization functions to separate functions uadk_provider: modify poll loop exit condition uadk_provider: add aes cts alg to uadk_provider in openssl3.0 uadk_provider: bugfix cipher decryption issue Qi Tao (2): uadk_prov: fix some cleancode issues and bugs for rsa uadk_prov: fix data type conversion errors Wenkai Lin (1): uadk_engine: remove update iv for cipher Zhiqi Song (6): uadk_provider: add openssl ffc library function uadk_provider: reconstructing dh implementation uadk_engine/ecx: merge some similar code logic uadk_engine: fixup pubkey size used in reverse operation uadk_provider/rsa: unify function definitions with macro uadk_provider/pkey: fixup functions with the same name src/Makefile.am | 3 +- src/uadk_async.c | 6 +- src/uadk_cipher.c | 114 +- src/uadk_digest.c | 41 +- src/uadk_ecx.c | 303 ++--- src/uadk_prov.h | 55 +- src/uadk_prov_bio.c | 19 +- src/uadk_prov_bio.h | 2 +- src/uadk_prov_cipher.c | 869 +++++++------ src/uadk_prov_dh.c | 2611 +++++++++++++++++++++------------------- src/uadk_prov_digest.c | 61 +- src/uadk_prov_ffc.c | 1888 +++++++++++++++++++++++++++++ src/uadk_prov_ffc.h | 330 +++++ src/uadk_prov_init.c | 46 +- src/uadk_prov_pkey.h | 114 +- src/uadk_prov_rsa.c | 1134 +++++++---------- src/uadk_prov_sm2.c | 94 +- 17 files changed, 5043 insertions(+), 2647 deletions(-) create mode 100644 src/uadk_prov_ffc.c create mode 100644 src/uadk_prov_ffc.h -- 2.33.0

7 months, 2 weeks

1
24
0 0

[PATCH RFC 0/8] add heterogeneous computing capabilities to UADK

by Longfang Liu

In the current UADK framework, the hardware acceleration function and the software acceleration function are merged to ensure that the software function of instruction acceleration and the hardware function of hardware offload can run at the same time, thus providing users with stronger performance Under the heterogeneous scheduling mode enabled in the current scheduler, the test performance data is as follows: Alg Mode(1KB) Performance(MB/s) CPU sync async sync async sm4-ecb init1(HW) 454 1322 100% 200.00% init2(HW+CE) 1445.1 1864 100% 195.00% increase 218.30% 41.00% 0.00% -2.50% sm3 init1(HW) 153.1 1481 99% 199.80% init2(HW+CE) 431.5 508 100% 199.80% increase 181.84% -65.70% 0.91% 0.00% ------------------------------------------------------------------------ Alg Mode(8KB) Performance(MB/s) CPU sync async sync async sm4-ecb init1(HW) 1407.5 9092 100% 198.00% init2(HW+CE) 3626.8 6021 100% 199.80% increase 157.68% -33.78% 0.00% 0.91% sm3 init1(HW) 960.4 5161.1 100% 183.80% init2(HW+CE) 549.6 530.1 100% 199.80% increase -42.77% -89.73% -0.40% 8.71% ----------------------------------------------------------------------- Without increasing the CPU usage, the performance improvement of the synchronous mode is very huge. In the asynchronous mode, the performance is reduced because the CPU is used for soft calculations, which can be solved by creating dedicated calculation threads later. Longfang Liu (8): uadk: synchronize internal development code uadk: synchronous interface layer code uadk_tools: synchronous test tool code uadk: new heterogeneous scheduling framework uadk: added heterogeneous computing scheduler uadk: added heterogeneous computing mode uadk: add heterogeneous computing capabilities to UADK driver uadk_tools: enable UADK Tools to support heterogeneous computing Makefile.am | 139 +--- drv/hash_mb/hash_mb.c | 91 ++- drv/hash_mb/hash_mb.h | 3 + drv/hisi_comp.c | 47 +- drv/hisi_dae.c | 32 +- drv/hisi_hpre.c | 358 ++++---- drv/hisi_qm_udrv.c | 93 +-- drv/hisi_qm_udrv.h | 11 +- drv/hisi_sec.c | 223 ++--- drv/isa_ce_sm3.c | 62 +- drv/isa_ce_sm3.h | 3 + drv/isa_ce_sm4.c | 69 +- drv/isa_ce_sm4.h | 5 +- include/drv/wd_comp_drv.h | 3 +- include/drv/wd_digest_drv.h | 3 +- include/wd.h | 21 +- include/wd_aead.h | 1 + include/wd_alg.h | 50 +- include/wd_alg_common.h | 67 +- include/wd_comp.h | 3 +- include/wd_dh.h | 8 +- include/wd_digest.h | 9 +- include/wd_ecc.h | 2 + include/wd_rsa.h | 5 + include/wd_sched.h | 4 + include/wd_util.h | 51 +- uadk_mk.sh | 9 + uadk_tool/Makefile.am | 18 +- uadk_tool/benchmark/hpre_protocol_data.h | 2 +- uadk_tool/benchmark/hpre_uadk_benchmark.c | 40 +- uadk_tool/benchmark/hpre_wd_benchmark.c | 11 +- uadk_tool/benchmark/sec_soft_benchmark.c | 4 - uadk_tool/benchmark/sec_uadk_benchmark.c | 360 +------- uadk_tool/benchmark/sec_wd_benchmark.c | 11 +- uadk_tool/benchmark/trng_wd_benchmark.c | 3 +- uadk_tool/benchmark/uadk_benchmark.c | 32 +- uadk_tool/benchmark/zip_uadk_benchmark.c | 37 +- uadk_tool/benchmark/zip_wd_benchmark.c | 3 +- uadk_tool/uadk_tool.c | 2 +- wd.c | 12 +- wd_aead.c | 38 +- wd_agg.c | 13 +- wd_alg.c | 2 +- wd_cipher.c | 168 ++-- wd_comp.c | 109 +-- wd_dh.c | 32 +- wd_digest.c | 160 ++-- wd_ecc.c | 35 +- wd_mempool.c | 11 +- wd_rsa.c | 88 +- wd_sched.c | 664 ++++++++++++++- wd_util.c | 954 ++++++++++++++++------ wd_zlibwrapper.c | 30 +- 53 files changed, 2470 insertions(+), 1741 deletions(-) create mode 100755 uadk_mk.sh -- 2.24.0

8 months

1
8
0 0

[PATCH v4 0/4] Support SM2 in uadk provider

by Zhiqi Song

Support SM2 in uadk provider and add sanity test for it. v4: Update sanity test, check whether SM2 is supported. v3: Fixup parameter error in sanity test. v2: Fixup compile warning and add sanity test. v1: Support SM2 in uadk provider. Zhiqi Song (4): uadk_provider: add der encode and packet for SM2 uadk_provider: support sm2 hardware acceleration uadk_provider: add sanity test command for SM2 uadk_engine/digest: cleanup pointer type src/Makefile.am | 4 +- src/uadk_digest.c | 2 +- src/uadk_prov.h | 15 +- src/uadk_prov_bio.c | 3 +- src/uadk_prov_der_writer.c | 236 +++ src/uadk_prov_der_writer.h | 129 ++ src/uadk_prov_init.c | 14 +- src/uadk_prov_packet.c | 514 ++++++ src/uadk_prov_packet.h | 959 +++++++++++ src/uadk_prov_pkey.c | 770 +++++++++ src/uadk_prov_pkey.h | 389 +++++ src/uadk_prov_sm2.c | 3127 ++++++++++++++++++++++++++++++++++ test/sanity_test_provider.sh | 32 + 13 files changed, 6186 insertions(+), 8 deletions(-) create mode 100644 src/uadk_prov_der_writer.c create mode 100644 src/uadk_prov_der_writer.h create mode 100644 src/uadk_prov_packet.c create mode 100644 src/uadk_prov_packet.h create mode 100644 src/uadk_prov_pkey.c create mode 100644 src/uadk_prov_pkey.h create mode 100644 src/uadk_prov_sm2.c -- 2.33.0

8 months, 2 weeks

1
4
0 0

2025

2024

2023

2022

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