From: Fu Wei <fu.wei(a)linaro.org>
This patchset:
(1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt
for FDT info of SBSA Generic Watchdog, and give two examples of
adding SBSA Generic Watchdog device node into the dts files:
foundation-v8.dts and amd-seattle-soc.dtsi.
(2)Introduce "pretimeout" into the watchdog framework, and update
Documentation/watchdog/watchdog-kernel-api.txt to introduce:
(1)the new elements in the watchdog_device and watchdog_ops struct;
(2)the new API "watchdog_init_timeouts".
(3)Introduce ARM SBSA watchdog driver:
a.Use linux kernel watchdog framework;
b.Work with FDT on ARM64;
c.Use "pretimeout" in watchdog framework;
d.Support getting timeout and pretimeout from parameter and FDT
at the driver init stage.
e.In the first timeout, do panic to save system context;
f.In the second stage, user can still feed the dog without
cleaning WS0. By this feature, we can avoid the panic infinite
loops, while backing up a large system context in a server.
g.In the second stage, can trigger WS1 by setting pretimeout = 0
if necessary.
(4)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c
Parse SBSA Generic Watchdog Structure in GTDT table of ACPI,
and create a platform device with that information.
This platform device can be used by This Watchdog driver.
drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support.
This patchset has been tested with watchdog daemon
(ACPI/FDT, module/build-in) on the following platforms:
(1)ARM Foundation v8 model
Changelog:
v6: Improve the dtb example files: reduce the register frame size to 4K.
Improve pretimeout support:
(1) improve watchdog_init_timeouts function
(2) rename watchdog_check_min_max_timeouts back to the original name
(1) improve watchdog_timeout_invalid/watchdog_pretimeout_invalid
Add the new features in the sbsa_gwdt driver:
(1) In the second stage, user can feed the dog without cleaning WS0.
(2) In the second stage, user can trigger WS1 by setting pretimeout = 0.
(3) expand the max value of pretimeout, in case 10 second is not enough
for a kdump kernel reboot in panic.
v5: Improve pretimeout support:
(1)fix typo in documentation and comments.
(2)fix the timeout limits validation bug.
Simplify sbsa_gwdt driver:
(1)integrate all the registers access functions into caller.
v4: Refactor GTDT support code: remove it from arch/arm64/kernel/acpi.c,
put it into drivers/acpi/gtdt.c file.
Integrate the GTDT code of drivers/clocksource/arm_arch_timer.c into
drivers/acpi/gtdt.c.
Improve pretimeout support, fix "pretimeout == 0" problem.
Simplify sbsa_gwdt driver:
(1)timeout/pretimeout limits setup;
(2)keepalive function;
(3)delete "clk == 0" check;
(4)delete WS0 status bit check in interrupt routine;
(5)sbsa_gwdt_set_wcv function.
v3: Delete "export arch_timer_get_rate" patch.
Driver back to use arch_timer_get_cntfrq.
Improve watchdog_init_timeouts function and update relevant documentation.
Improve watchdog_timeout_invalid and watchdog_pretimeout_invalid.
Improve foundation-v8.dts: delete the unnecessary tag of device node.
Remove "ARM64 || COMPILE_TEST" from Kconfig.
Add comments in arch/arm64/kernel/acpi.c
Fix typoes and incorrect comments.
v2: Improve watchdog-kernel-api.txt documentation for pretimeout support.
Export "arch_timer_get_rate" in arm_arch_timer.c.
Add watchdog_init_timeouts API for pretimeout support in framework.
Improve suspend and resume foundation in driver
Improve timeout/pretimeout values init code in driver.
Delete unnecessary items of the sbsa_gwdt struct and #define.
Delete all unnecessary debug info in driver.
Fix 64bit division bug.
Use the arch_timer interface to get watchdog clock rate.
Add MODULE_DEVICE_TABLE for platform device id.
Fix typoes.
v1: The first version upstream patchset to linux mailing list.
Fu Wei (8):
Documentation: add sbsa-gwdt.txt documentation
ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts
ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi
Watchdog: introdouce "pretimeout" into framework
Watchdog: introduce ARM SBSA watchdog driver
ACPI: add GTDT table parse driver into ACPI driver
Watchdog: enable ACPI GTDT support for ARM SBSA watchdog driver
clocksource: simplify ACPI code in arm_arch_timer.c
.../devicetree/bindings/watchdog/sbsa-gwdt.txt | 36 ++
Documentation/watchdog/watchdog-kernel-api.txt | 47 ++-
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 +
arch/arm64/boot/dts/arm/foundation-v8.dts | 10 +
arch/arm64/kernel/time.c | 4 +-
drivers/acpi/Kconfig | 9 +
drivers/acpi/Makefile | 1 +
drivers/acpi/gtdt.c | 180 ++++++++
drivers/clocksource/Kconfig | 1 +
drivers/clocksource/arm_arch_timer.c | 60 +--
drivers/watchdog/Kconfig | 15 +
drivers/watchdog/Makefile | 1 +
drivers/watchdog/sbsa_gwdt.c | 455 +++++++++++++++++++++
drivers/watchdog/watchdog_core.c | 98 +++--
drivers/watchdog/watchdog_dev.c | 53 +++
include/clocksource/arm_arch_timer.h | 8 +
include/linux/acpi.h | 5 +
include/linux/clocksource.h | 4 +-
include/linux/watchdog.h | 39 +-
19 files changed, 947 insertions(+), 90 deletions(-)
create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt
create mode 100644 drivers/acpi/gtdt.c
create mode 100644 drivers/watchdog/sbsa_gwdt.c
--
1.9.1
Hi Al,
Please take these as bug reports to Redhat maintained patches. I am unsure of
the correct fixes in these cases.
I have pushed these to the mustang topic branch and will push the SPCR one
to the other topics as well.
Thanks
Graeme
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This patch set introduce self-probe infrastructure to init IRQ
controllers and stacked irqdomain support for ACPI based GICv2/3
init.
The self-probe infrastructure for ACPI GIC init is similar as
IRQCHIP_DECLARE() and based on the GIC version support in ACPI
MADT table. we match the GIC version and GIC driver and load
it.
We introduce acpi_irq_domain for GICv2/3 core domain to support
stacked irqdomain, and pass the gsi (global system interrupt) as
the agument (void *arg) for gic_irq_domain_alloc(), then we can
alloc virqs via acpi_register_gsi() with stacked irqdomain.
The stacked irq domain will be:
acpi_irq_domain == gicv2 or gicv3 core domain
^
| (parent)
|
ITS domain or GIv2m domain
^
|
|
MSI chip irq domain
Since there is one GICD supported for now, so there will be only
one irqdomain created when GICv2/3 initialized, for all the wired
hardware irqs for PPI, SGI and SPI, they will have unique hardware
irq number (GSI), so we can match the device to the acpi_irq_domain
with unique GSI and it will work. If there will be multi GICD in the
future, this will still works to follow the solution for x86 of ACPI
(mutil IOAPICs).
Note: patch 1~2 already merged in ACPICA core, I just send them out
for helping of better understanding later 7 patches.
Any comments are warmly welcomed.
update from RFC version:
- Consolidate all the GIC init code into drivers/irqchip/irq-gic-acpi.c
v1->v2:
- Remove the gicv2/v3 related driver code in drivers/irqchip/irq-gic-acpi.c
which I was trying to consolidate them in one file, then arm-gic.h and
arm-gic-v3.h will be used separately within parent driver only
- Drop the gsi_mutex patch
- Use the GIC version to match the GIC driver, then no need to test
for the version in each driver
- Move acpi_irq_init() to drivers/irqchip/irq-gic-acpi.c instead of
in drivers/acpi/irq.c. maybe we need to rename acpi_irq_init() as
acpi_gic_init() but I keep that name to accommodate of_irq_init(),
any objections please let me know.
Bob Moore (1):
ACPICA: ACPI 6.0: Add changes for MADT table.
Hanjun Guo (6):
ACPICA: ACPI 6.0: Add values for MADT GIC version field.
irqchip / GIC: Add GIC version support in ACPI MADT
ACPI / irqchip: Add self-probe infrastructure to initialize IRQ
controller
irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init
code
irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init
irqchip / GICv3: Add stacked irqdomain support for ACPI based init
Tomasz Nowicki (2):
irqchip / GICv3: Refactor gic_of_init() for GICv3 driver
irqchip / GICv3: Add ACPI support for GICv3+ initialization
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/acpi.h | 1 -
arch/arm64/include/asm/irq.h | 13 --
arch/arm64/kernel/acpi.c | 25 ----
drivers/acpi/gsi.c | 28 ++--
drivers/irqchip/Kconfig | 3 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-gic-acpi.c | 141 +++++++++++++++++++
drivers/irqchip/irq-gic-v3.c | 264 ++++++++++++++++++++++++++++-------
drivers/irqchip/irq-gic.c | 35 ++---
drivers/irqchip/irqchip.h | 12 ++
include/acpi/actbl1.h | 33 ++++-
include/asm-generic/vmlinux.lds.h | 13 ++
include/linux/acpi.h | 16 +++
include/linux/acpi_irq.h | 4 +-
include/linux/irqchip/arm-gic-acpi.h | 10 +-
include/linux/mod_devicetable.h | 8 ++
17 files changed, 473 insertions(+), 135 deletions(-)
create mode 100644 drivers/irqchip/irq-gic-acpi.c
--
1.9.1
CPPC:
====
CPPC (Collaborative Processor Performance Control) is a new way to control CPU
performance using an abstract continous scale as against a discretized P-state scale
which is tied to CPU frequency only. It is defined in the ACPI 5.0+ spec. In brief,
the basic operation involves:
- OS makes a CPU performance request. (Can provide min and max tolerable bounds)
- Platform (such as BMC) is free to optimize request within requested bounds depending
on power/thermal budgets etc.
- Platform conveys its decision back to OS
The communication between OS and platform occurs through another medium called (PCC)
Platform communication Channel. This is a generic mailbox like mechanism which includes
doorbell semantics to indicate register updates. See drivers/mailbox/pcc.c
This patchset introduces a CPPC based CPUFreq driver that works with existing governors
such as ondemand. The CPPC table parsing and the CPPC communication semantics are
abstracted into separate files to allow future CPPC based drivers to implement their
own governors if required.
Initial patchsets included an adaptation of the PID governor from intel_pstate.c. However
recent experiments led to extensive modifications of the algorithm to calculate CPU
busyness. Until it is verified that these changes are worthwhile, the existing governors
should provide for a good enough starting point for ARM64 servers.
Finer details about the PCC and CPPC spec are available in the latest ACPI 5.1
specification.[2]
Testing:
=======
This was tested on an SBSA compatible ARMv8 server with CPPCv2
firmware running on a remote processor. I verified that each CPUs
performance limits were detected and that new performance requests
were made by the on-demand governor proportional to the load on each
CPU. I also verified that using the acpi_processor driver correctly
maps the physical CPU ids to logical CPU ids, which helps in picking
up the proper _CPC details from a processor object, in the case where
CPU physical ids may not be contiguous.
Changes since V5:
- Checkpatch cleanups.
- Change pss_init to pss_perf_init. Rec by Srinivas Pandruvada.
- Explicit comment explaining why postcore_initcall to pcc mailbox.
- Fold acpi_processor_syscore_init/exit into CONFIG_ACPI_CST.
- Added patch with dummy functions used by ACPI_HOTPLUG_CPU.
Changes since V4:
- Misc cleanups. Addressed feedback from Rafael.
- Made acpi_processor.c independent of C-states, P-states and others.
- Per CPU scanning for _CPC is now made from acpi_processor.c
- Added new Kconfig options for legacy C states and P states to enable future
support for newer alternatives as defined in the ACPI spec 6.0.
Changes since V3:
- Split CPPC backend methods into separate files.
- Add frontend driver which plugs into existing CPUfreq governors.
- Simplify PCC driver by moving communication space mapping and read/write
into client drivers.
Changes since V2:
- Select driver if !X86, since intel_pstate will use HWP extensions instead.
- Added more comments.
- Added Freq domain awareness and PSD parsing.
Changes since V1:
- Create a new driver based on Dirks suggestion.
- Fold in CPPC backend hooks into main driver.
Changes since V0: [1]
- Split intel_pstate.c into a generic PID governor and platform specific backend.
- Add CPPC accessors as PID backend.
[1] - http://lwn.net/Articles/608715/
[2] - http://www.uefi.org/sites/default/files/resources/ACPI_5_1release.pdf
[3] - https://patches.linaro.org/40705/
Ashwin Chaugule (7):
PCC: Initialize PCC Mailbox earlier at boot
ACPI: Make ACPI processor driver more extensible
ACPI: Introduce CPU performance controls using CPPC
CPPC: Add a CPUFreq driver for use with CPPC
CPPC: Probe for CPPC tables for each ACPI Processor object
PCC: Enable PCC only when needed
ACPI: Add weak routines for ACPI CPU Hotplug
drivers/acpi/Kconfig | 48 ++-
drivers/acpi/Makefile | 8 +-
drivers/acpi/acpi_processor.c | 18 +
drivers/acpi/cppc_acpi.c | 812 ++++++++++++++++++++++++++++++++++++++++
drivers/acpi/processor_driver.c | 90 +++--
drivers/cpufreq/Kconfig | 2 +-
drivers/cpufreq/Kconfig.arm | 16 +
drivers/cpufreq/Kconfig.x86 | 2 +
drivers/cpufreq/Makefile | 2 +
drivers/cpufreq/cppc_cpufreq.c | 197 ++++++++++
drivers/mailbox/Kconfig | 2 +-
drivers/mailbox/pcc.c | 8 +-
include/acpi/cppc_acpi.h | 137 +++++++
include/acpi/processor.h | 129 +++++--
14 files changed, 1397 insertions(+), 74 deletions(-)
create mode 100644 drivers/acpi/cppc_acpi.c
create mode 100644 drivers/cpufreq/cppc_cpufreq.c
create mode 100644 include/acpi/cppc_acpi.h
--
1.9.1
Howdy.
I've updated the acpi-topic-mustang branch so that it now works properly
again (mostly because I needed it to run some experiments and tests).
It's basically our acpi.git master plus ports of patches scavenged mostly
from the Fedora kernel, some of which may or may not end up in mainline in
their present form. Use these patches wisely. They should not be considered
final since they have not been accepted upstream.
Pretty much everything on the box works.
--
ciao,
al
-----------------------------------
Al Stone
Software Engineer
Linaro Enterprise Group
al.stone(a)linaro.org
-----------------------------------