Linaro-acpi

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[linaro-acpi 0/4] acpi-asl: DBG2 table support

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> The DBG2 table support in iASL compiler is completed which will be available in next release of acpica https://github.com/acpica/acpica/commit/278cbb119f090d3aad0480381126c1ae8e5… the following set of patches support the DBG2 table in acpi-asl tool. Naresh Bhat (4): ACPI / ASL: Add DBG2 table across platforms DBG2: Update platforms manifest DBG2: Update xsdt entries across platforms DBG2: Support DBG2 table compilation platforms/exynos5250-arndale.acpi/dbg2.asl | 106 ++++++++++++++++++++ .../exynos5250-arndale.manifest | 1 + platforms/exynos5250-arndale.acpi/xsdt.asl | 1 + platforms/foundation-v8.acpi/dbg2.asl | 106 ++++++++++++++++++++ .../foundation-v8.acpi/foundation-v8.manifest | 1 + platforms/foundation-v8.acpi/xsdt.asl | 1 + platforms/rtsm_ve-aemv8a.acpi/dbg2.asl | 106 ++++++++++++++++++++ .../rtsm_ve-aemv8a.acpi/rtsm_ve-aemv8a.manifest | 1 + platforms/rtsm_ve-aemv8a.acpi/xsdt.asl | 1 + tools/common/build_aml.c | 1 + tools/common/check_aml.c | 1 + tools/common/include/check_aml.h | 1 + 12 files changed, 327 insertions(+) create mode 100644 platforms/exynos5250-arndale.acpi/dbg2.asl create mode 100644 platforms/foundation-v8.acpi/dbg2.asl create mode 100644 platforms/rtsm_ve-aemv8a.acpi/dbg2.asl -- 1.7.9.5

11 years, 5 months

[PATCH] acpi, mtd: Add support for flash device in physical memory map based on ACPI description

by Tomasz Nowicki

This provides a 'mapping' driver which allows the NOR Flash and ROM driver code to communicate with chips which are mapped physically into the CPU's memory. The mapping description here is taken from DSDT ACPI table. This code was "inspired" by physmap_of.c Signed-off-by: Tomasz Nowicki <tomasz.nowicki(a)linaro.org> --- drivers/acpi/acpi_platform.c | 4 + drivers/mtd/maps/Kconfig | 9 + drivers/mtd/maps/Makefile | 1 + drivers/mtd/maps/physmap_acpi.c | 437 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 451 insertions(+) create mode 100644 drivers/mtd/maps/physmap_acpi.c diff --git a/drivers/acpi/acpi_platform.c b/drivers/acpi/acpi_platform.c index 1359eda..4afc430 100644 --- a/drivers/acpi/acpi_platform.c +++ b/drivers/acpi/acpi_platform.c @@ -36,6 +36,10 @@ static const struct acpi_device_id acpi_platform_device_ids[] = { { "LNRO0007" }, /* armv8 pmu */ { "LNRO0009" }, /* vexpress-sysreg */ { "LNRO000A" }, /* uart-pl011 */ + { "LNRO000B" }, /* flash cfi_probe */ + { "LNRO000C" }, /* flash jedec_probe */ + { "LNRO000D" }, /* flash map_ram */ + { "LNRO000E" }, /* flash direct-mapped */ { } }; diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index 310dc7c..07d26e0 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig @@ -74,6 +74,15 @@ config MTD_PHYSMAP_OF physically into the CPU's memory. The mapping description here is taken from OF device tree. +config MTD_PHYSMAP_ACPI + tristate "Flash device in physical memory map based on ACPI description" + depends on ACPI && (MTD_CFI || MTD_JEDECPROBE || MTD_ROM) + help + This provides a 'mapping' driver which allows the NOR Flash and + ROM driver code to communicate with chips which are mapped + physically into the CPU's memory. The mapping description here is + taken from DSDT ACPI table. + config MTD_PMC_MSP_EVM tristate "CFI Flash device mapped on PMC-Sierra MSP" depends on PMC_MSP && MTD_CFI diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index 141c91a..379cfff 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o obj-$(CONFIG_MTD_PXA2XX) += pxa2xx-flash.o obj-$(CONFIG_MTD_PHYSMAP) += physmap.o obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o +obj-$(CONFIG_MTD_PHYSMAP_ACPI) += physmap_acpi.o obj-$(CONFIG_MTD_PISMO) += pismo.o obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o diff --git a/drivers/mtd/maps/physmap_acpi.c b/drivers/mtd/maps/physmap_acpi.c new file mode 100644 index 0000000..0973e00 --- /dev/null +++ b/drivers/mtd/maps/physmap_acpi.c @@ -0,0 +1,437 @@ +/* + * Flash mappings described by the ACPI + * + * Copyright (C) 2006 MontaVista Software Inc. + * Author: Vitaly Wool <vwool(a)ru.mvista.com> + * Copyright (C) 2007 David Gibson, IBM Corporation. + * + * Revised to handle ACPI style flash binding by: + * Copyright (C) 2013 Tomasz Nowicki <tomasz.nowicki(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/map.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/concat.h> +#include <linux/acpi.h> +#include <linux/slab.h> +#include <linux/platform_device.h> + +struct acpi_flash_list { + struct mtd_info *mtd; + struct map_info map; + struct resource *res; +}; + +struct acpi_flash { + struct mtd_info *cmtd; + int list_size; /* number of elements in acpi_flash_list */ + struct acpi_flash_list list[0]; +}; + +/* UUID: ce511ba0-52bf-11e3-8f96-0800200c9a66 (randomly generated) */ +static const char device_label_dsm_uuid[] = { + 0xA0, 0x1B, 0x51, 0xCE, + 0xBF, 0x52, + 0xE3, 0x11, + 0x8F, 0x96, + 0x08, 0x00, 0x20, 0xC, 0x9A, 0x66 +}; + +static inline void acpi_flash_assign_params(union acpi_object params[4]) +{ + params[0].type = ACPI_TYPE_BUFFER; /* UUID */ + params[0].buffer.length = sizeof(device_label_dsm_uuid); + params[0].buffer.pointer = (char *)device_label_dsm_uuid; + params[1].type = ACPI_TYPE_INTEGER; /* Revision */ + params[1].integer.value = 1; + params[2].type = ACPI_TYPE_INTEGER; /* Function # */ + params[2].integer.value = 1; + params[3].type = ACPI_TYPE_PACKAGE; /* Arguments */ + params[3].package.count = 0; + params[3].package.elements = NULL; +} + +static int acpi_flash_call_dsm(acpi_handle handler, const char *key, + const void *value, + acpi_object_type return_type) +{ + union acpi_object *obj, *element; + struct acpi_object_list input; + union acpi_object params[4]; + acpi_status status; + char **char_ptr; + char *string; + u64 *int_ptr; + int len, i; + struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; + + input.count = 4; + acpi_flash_assign_params(params); + input.pointer = params; + status = acpi_evaluate_object_typed(handler, "_DSM", &input, &output, + ACPI_TYPE_PACKAGE); + if (ACPI_FAILURE(status)) { + pr_err("Failed to get _DSM package for this device\n"); + return -ENXIO; + } + + obj = (union acpi_object *)output.pointer; + + /* Parse 2 objects per entry */ + for (i = 0; i < obj->package.count; i += 2) { + element = &obj->package.elements[i]; + + /* Key must be a string */ + len = element->string.length; + if ((element->type != ACPI_TYPE_STRING) || + (element->string.length <= 0)) + continue; + + /* Check to see if this is requested key */ + if (strncmp(key, element->string.pointer, + len) != 0) + continue; + + /* If value type is correct, this is the one */ + element++; + if (element->type != return_type) + continue; + + switch (return_type) { + case (ACPI_TYPE_INTEGER): + int_ptr = (u64 *)value; + *int_ptr = element->integer.value; + goto found; + case (ACPI_TYPE_STRING): + len = element->string.length; + if (len <= 0) + continue; + + string = kmalloc(len + 1, GFP_KERNEL); + strncpy(string, element->string.pointer, len); + string[len] = '\0'; + + char_ptr = (char **)value; + *char_ptr = string; + goto found; + } + } + status = -ENXIO; + +found: + kfree(output.pointer); + return status; +} + +static const char * const rom_probe_types[] = { + "cfi_probe", "jedec_probe", "map_rom" }; + +/* Helper function to handle probing of the obsolete "direct-mapped" + * compatible binding, which has an extra "probe-type" property + * describing the type of flash probe necessary. */ +static struct mtd_info *obsolete_probe(struct platform_device *dev, + struct map_info *map) +{ + acpi_handle handler; + const char *acpi_probe; + struct mtd_info *mtd; + int i, err; + + handler = ACPI_HANDLE(&dev->dev); + dev_warn(&dev->dev, "ACPI uses obsolete \"direct-mapped\" flash " + "binding\n"); + + err = acpi_flash_call_dsm(handler, "probe-type", &acpi_probe, + ACPI_TYPE_STRING); + if (err || acpi_probe == NULL) { + for (i = 0; i < ARRAY_SIZE(rom_probe_types); i++) { + mtd = do_map_probe(rom_probe_types[i], map); + if (mtd) + return mtd; + } + return NULL; + } else if (strcmp(acpi_probe, "CFI") == 0) { + return do_map_probe("cfi_probe", map); + } else if (strcmp(acpi_probe, "JEDEC") == 0) { + return do_map_probe("jedec_probe", map); + } else { + if (strcmp(acpi_probe, "ROM") != 0) + dev_warn(&dev->dev, "obsolete_probe: don't know probe " + "type '%s', mapping as rom\n", acpi_probe); + return do_map_probe("mtd_rom", map); + } +} + +/* When partitions are set we look for a linux,part-probe property which + specifies the list of partition probers to use. If none is given then the + default is use. These take precedence over other device tree + information. */ +static const char * const part_probe_types_def[] = { + "cmdlinepart", "RedBoot", NULL }; + +static const char * const *acpi_get_part_probes(acpi_handle handler) +{ + char *cp = NULL; + unsigned int count = 0, i; + const char **res; + int cplen, err; + + /* Get space separated strings */ + err = acpi_flash_call_dsm(handler, "linux,part-probe", &cp, + ACPI_TYPE_STRING); + if (err || cp == NULL) + return part_probe_types_def; + + cplen = strlen(cp); + for (i = 0; i != cplen; i++) + if (cp[i] == ' ') + count++; + + /* Create the table with references to strings */ + res = kzalloc((count + 1) * sizeof(char *), GFP_KERNEL); + for (i = 0; i < count + 1; i++) { + res[i] = cp; + cp = strnchr(cp, cplen, ' '); + if (cp == NULL) + break; + + *cp++ = '\0'; + cplen = strlen(cp); + } + return res; +} + +static void acpi_free_probes(const char * const *probes) +{ + if (probes != part_probe_types_def) + kfree(probes); +} + +static const struct acpi_device_id acpi_flash_match[]; +static int acpi_flash_remove(struct platform_device *dev); + +static int acpi_flash_probe(struct platform_device *dev) +{ + const char * const *part_probe_types; + const struct acpi_device_id *id; + resource_size_t res_size; + struct acpi_flash *info; + const char *probe_type; + struct resource *res; + acpi_handle handler; + int err, i; + const u64 bank_width = 0, map_indirect = 0; + struct mtd_info **mtd_list = NULL; + const char *mtd_name = NULL; + int count = 0; + + handler = ACPI_HANDLE(&dev->dev); + + id = acpi_match_device(acpi_flash_match, &dev->dev); + if (!id) + return -ENODEV; + + probe_type = (const char *)id->driver_data; + + acpi_flash_call_dsm(handler, "linux,mtd-name", &mtd_name, + ACPI_TYPE_STRING); + acpi_flash_call_dsm(handler, "no-unaligned-direct-access", + &map_indirect, ACPI_TYPE_INTEGER); + + while (platform_get_resource(dev, IORESOURCE_MEM, count)) + count++; + + if (!count) { + dev_err(&dev->dev, "No resources found for %s device\n", + dev_name(&dev->dev)); + err = -ENXIO; + goto err_flash_remove; + } + + info = devm_kzalloc(&dev->dev, + sizeof(struct acpi_flash) + + sizeof(struct acpi_flash_list) * count, GFP_KERNEL); + if (!info) { + err = -ENOMEM; + goto err_flash_remove; + } + + dev_set_drvdata(&dev->dev, info); + + mtd_list = kzalloc(sizeof(*mtd_list) * count, GFP_KERNEL); + if (!mtd_list) + goto err_flash_remove; + + for (i = 0; i < count; i++) { + res = platform_get_resource(dev, IORESOURCE_MEM, i); + dev_dbg(&dev->dev, "resource[%d]: address 0x%lx size 0x%lx\n", + i, (long)res->start, (long)resource_size(res)); + + res_size = resource_size(res); + info->list[i].res = request_mem_region(res->start, res_size, + dev_name(&dev->dev)); + if (!info->list[i].res) { + err = -EBUSY; + goto err_out; + } + + /* Mandatory property */ + err = acpi_flash_call_dsm(handler, "bank-width", &bank_width, + ACPI_TYPE_INTEGER); + if (err || !bank_width) { + dev_err(&dev->dev, "Can't get bank width from DSDT\n"); + goto err_out; + } + + info->list[i].map.name = mtd_name ?: dev_name(&dev->dev); + info->list[i].map.phys = res->start; + info->list[i].map.size = res_size; + info->list[i].map.bankwidth = bank_width; + info->list[i].map.virt = ioremap(info->list[i].map.phys, + info->list[i].map.size); + if (!info->list[i].map.virt) { + dev_err(&dev->dev, "Failed to ioremap() flash region\n"); + err = -ENOMEM; + goto err_out; + } + + simple_map_init(&info->list[i].map); + + /* + * On some platforms (e.g. MPC5200) a direct 1:1 mapping + * may cause problems with JFFS2 usage, as the local bus (LPB) + * doesn't support unaligned accesses as implemented in the + * JFFS2 code via memcpy(). By setting NO_XIP, the + * flash will not be exposed directly to the MTD users + * (e.g. JFFS2) any more. + */ + if (map_indirect) + info->list[i].map.phys = NO_XIP; + + if (probe_type) { + info->list[i].mtd = do_map_probe(probe_type, + &info->list[i].map); + } else { + info->list[i].mtd = obsolete_probe(dev, + &info->list[i].map); + } + + if (!info->list[i].mtd) { + dev_err(&dev->dev, "do_map_probe() failed\n"); + err = -ENXIO; + goto err_out; + } else + info->list_size++; + + info->list[i].mtd->owner = THIS_MODULE; + info->list[i].mtd->dev.parent = &dev->dev; + mtd_list[i] = info->list[i].mtd; + } + + info->cmtd = NULL; + if (info->list_size == 1) { + info->cmtd = info->list[0].mtd; + } else if (info->list_size > 1) { + /* + * We detected multiple devices. Concatenate them together. + */ + info->cmtd = mtd_concat_create(mtd_list, info->list_size, + dev_name(&dev->dev)); + } + if (info->cmtd == NULL) { + err = -ENXIO; + goto err_out; + } + + part_probe_types = acpi_get_part_probes(handler); + mtd_device_parse_register(info->cmtd, part_probe_types, NULL, + NULL, 0); + acpi_free_probes(part_probe_types); + + kfree(mtd_list); + + return 0; + +err_out: + kfree(mtd_list); +err_flash_remove: + acpi_flash_remove(dev); + + return err; +} + +static int acpi_flash_remove(struct platform_device *dev) +{ + struct acpi_flash *info; + int i; + + info = dev_get_drvdata(&dev->dev); + if (!info) + return 0; + dev_set_drvdata(&dev->dev, NULL); + + if (info->cmtd != info->list[0].mtd) { + mtd_device_unregister(info->cmtd); + mtd_concat_destroy(info->cmtd); + } + + if (info->cmtd) + mtd_device_unregister(info->cmtd); + + for (i = 0; i < info->list_size; i++) { + if (info->list[i].mtd) + map_destroy(info->list[i].mtd); + + if (info->list[i].map.virt) + iounmap(info->list[i].map.virt); + + if (info->list[i].res) { + release_resource(info->list[i].res); + kfree(info->list[i].res); + } + } + + return 0; +} + +static const struct acpi_device_id acpi_flash_match[] = { + { "LNRO000B", (unsigned long)"cfi_probe"}, + { "LNRO000C", (unsigned long)"jedec_probe"}, + { "LNRO000D", (unsigned long)"map_ram"}, + { "LNRO000E", (unsigned long)"direct-mapped"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, acpi_flash_match); + +static struct platform_driver acpi_flash_driver = { + .driver = { + .name = "acpi-flash", + .owner = THIS_MODULE, + .acpi_match_table = ACPI_PTR(acpi_flash_match), + }, + .probe = acpi_flash_probe, + .remove = acpi_flash_remove, +}; + +module_platform_driver(acpi_flash_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Tomasz Nowicki <tomasz.nowicki(a)linaro.org>"); +MODULE_DESCRIPTION("ACPI based MTD map driver"); -- 1.7.9.5

11 years, 5 months

[PATCH v2 0/6] Hardware Reduced Mode cleanup for ACPI

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> This series of patches starts with Hanjun's patch to create a kernel config item for CONFIG_ACPI_REDUCED_HARDWARE [0]. Building on that, I then reviewed all of the code that touched any of several fields in the FADT that the OSPM is supposed to ignore when ACPI is in Hardware Reduced mode [1]. Any time there was a use of one of the fields to be ignored, I evaluated whether or not the code was implementing Hardware Reduced mode correctly. Similarly, for each the flags in the FADT flags field that are to be ignored in Hardware Reduced mode, the kernel code was again scanned for proper usage. The remainder of the patches are to fix all of the situations I could find where the kernel would not behave correctly in this ACPI mode. These seem to work just fine on the RTSM model for ARMv7, both with and without ACPI enabled, and with and without ACPI_REDUCED_HARDWARE enabled; similarly for the FVP model for ARMv8. The patches for ACPI on ARM hardware will be coming later but they presume that reduced HW mode is functioning correctly. In the meantime, there's no way I can think of to test all possible scenarios so feedback would be greatly appreciated. [0] List at https://wiki.linaro.org/LEG/Engineering/Kernel/ACPI/AcpiReducedHw#Section_5… [1] Please see the ACPI Specification v5.0 for details on Hardware Reduced mode. Changes for v2: -- Remove patch that was outside of reduced HW mode changes -- Simplify CONFIG_ACPI_REDUCED_HARDWARE in Kconfig -- Simplify use of CONFIG_ACPI_REDUCED_HARDWARE in #ifdefs -- Ensure changelogs are present -- Combine and simplify previous patches 8 & 10 Al Stone (6): ACPI: introduce CONFIG_ACPI_REDUCED_HARDWARE to enable this ACPI mode ACPI: bus master reload not supported in reduced HW mode ACPI: HW reduced mode does not allow use of the FADT sci_interrupt field ACPI: ARM: exclude DMI calls ACPI: do not reserve memory regions for some FADT entries in HW reduced mode ACPI: in HW reduced mode, using FADT PM information is not allowed. drivers/acpi/Kconfig | 8 ++++++++ drivers/acpi/bus.c | 3 ++- drivers/acpi/osl.c | 24 ++++++++++++------------ drivers/acpi/pci_link.c | 2 ++ drivers/acpi/processor_idle.c | 16 ++++++++++++++-- include/acpi/platform/aclinux.h | 4 ++++ include/linux/dmi.h | 2 +- 7 files changed, 43 insertions(+), 16 deletions(-) -- 1.8.3.1

11 years, 5 months

[RFC part2 PATCH 0/9] Using ACPI MADT table to initialise SMP and GIC

by Hanjun Guo

This patch set is based on part1 "Make ACPI core running on ARM64" patch set. After we can get the ACPI tables from UEFI, we can use these tables to initialise the system now. GIC (means GIC cpu interface) structure and GIC distributor structure in MADT table contains the information of GIC cpu interface base address and GIC distributor base address, which can be used to initialise GIC. Further more, parked address in GIC structure can be used as cpu release address for spin table SMP initialisation. This patch set use these information to init SMP and GIC. Please refer to chapter 5.2.12.14/15 of ACPI 5.0 spec for GIC and GIC distributor structure information. Amit Daniel Kachhap (1): irqdomain: Add a new API irq_create_acpi_mapping() Hanjun Guo (8): ARM64 / ACPI: Implement core functions for parsing MADT table ARM64 / ACPI: Prefill cpu possible/present maps and map logical cpu id to APIC id ARM64 / ACPI: Introduce map_gic_id() to get apic id from MADT or _MAT method ARM64 / ACPI: Use Parked Address in GIC structure for spin table SMP initialisation ACPI: Define ACPI_IRQ_MODEL_GIC needed for arm Irqchip / gic: Set as default domain so we can access from ACPI ACPI / ARM64: Update acpi_register_gsi to register with the core IRQ subsystem ACPI / GIC: Initialize GIC using the information in MADT arch/arm64/include/asm/acpi.h | 16 +- arch/arm64/kernel/irq.c | 5 + arch/arm64/kernel/setup.c | 2 + arch/arm64/kernel/smp.c | 2 + arch/arm64/kernel/smp_spin_table.c | 16 +- drivers/acpi/bus.c | 3 + drivers/acpi/plat/arm-core.c | 397 +++++++++++++++++++++++++++++++++++- drivers/acpi/processor_core.c | 26 +++ drivers/acpi/tables.c | 21 ++ drivers/irqchip/irq-gic.c | 7 + include/linux/acpi.h | 9 + kernel/irq/irqdomain.c | 27 +++ 12 files changed, 521 insertions(+), 10 deletions(-) -- 1.7.9.5

11 years, 5 months

[PATCH] rtsm_ve-aemv8a: Add ASL for bus device enumeration

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Add ASL for AMBA bus and devices on rtsm_ve-aemv8a platform. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- platforms/rtsm_ve-aemv8a.acpi/dsdt.asl | 416 +++++++++++++++++++++++++++++++- 1 file changed, 413 insertions(+), 3 deletions(-) diff --git a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl index 76ddfa3..8cea035 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl @@ -266,6 +266,74 @@ DefinitionBlock ( } } + Device (PMU0) { + Name (_HID, "LNRO0007") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + }) + Return (RBUF) + } + } + + Device (SMB) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x08000000, // Address Range Minimum (base address in FDT) + 0x0BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x14000000, // Address Range Minimum (base address in FDT) + 0x17FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x18000000, // Address Range Minimum (base address in FDT) + 0x1BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1FFFFFFF, // Address Range Maximum (base + (len -1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x0C000000, // Address Range Minimum (base address in FDT) + 0x0FFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x10000000, // Address Range Minimum (base address in FDT) + 0x13FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + }) + Device (NET0) { Name (_HID, "LNRO0003") Name (_UID, 0) @@ -279,16 +347,358 @@ DefinitionBlock ( } } - Device (PMU0) { - Name (_HID, "LNRO0007") + Device (CLK0) { + Name (_HID, "LNRO0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LNRO0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LNRO0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + + Device (FPGA) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1C1FFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x00200000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + }) + + Device (VIRT) { + Name (_HID, "LNRO0005") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c130000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x4A} + }) + Return (RBUF) + } + } + } // End of FPGA + } // End SMB + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) { + If (LEqual (Arg2, 0x00)) { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + + Device (SCT0) { + Name (_HID, "LNRO000C") + Name (_UID, 0) + Name (_ADR, 0x1c020000) /* SYSCTL */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.SMB.CLK2", + "clock-name", "timclk \\_SB.SMB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (AAC0) { + Name (_HID, "LNRO000D") + Name (_UID, 0) + Name (_ADR, 0x1c040000) /* AACI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c040000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {43} + }) + Return (RBUF) + } + } + + Device (MMC0) { + Name (_HID, "LNRO000E") Name (_UID, 0) + Name (_ADR, 0x1c050000) /* MMCI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c050000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {41, 42} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "MCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + Return (Local0) + } + } + + Device (KMI0) { + Name (_HID, "LNRO000F") + Name (_UID, 0) + Name (_ADR, 0x1c060000) Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + Memory32Fixed (ReadWrite, 0x1c060000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {44} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI1) { + Name (_HID, "LNRO000F") + Name (_UID, 1) + Name (_ADR, 0x1c070000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c070000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {45} + }) + Return (RBUF) + } + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c090000) + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c090000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x25} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0a0000) + Name (_UID, 1) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x26} + }) + Return (RBUF) + } + } + + Device (SER2) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0b0000) + Name (_UID, 2) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x27} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0c0000) + Name (_UID, 3) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x28} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_HID, "LNRO0011") + Name (_UID, 0) + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} }) Return (RBUF) } } + + Device (TIM0) { + Name (_HID, "LNRO0012") + Name (_UID, 0) + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} + }) + Return (RBUF) + } + } + + Device (TIM2) { + Name (_HID, "LNRO0012") + Name (_UID, 1) + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_HID, "LNRO0013") + Name (_UID, 0) + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + + Device (CLCD) { + Name (_HID, "LNRO0014") + Name (_UID, 0) + Name (_ADR, 0x1c1f0000) /* CLCD */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c1f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {46} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "CCLDCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + } // End of AMBA } } -- 1.7.9.5

11 years, 5 months

[PATCH] arm64: dts: remove simplebus and panel from fvp-base-gicv2-psci-acpi

by Graeme Gregory

We can boot to a usable userspace without these hunks so remove them. This leaves only timer and gic to be removed and we are booting completely from ACPI Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts | 84 ------------------------ 1 file changed, 84 deletions(-) diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts index 09a4061..04a6200 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts @@ -148,88 +148,4 @@ reg = <0x0 0x2a820000 0x0 0x10000>; }; }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard-acpi.dtsi" - }; - - panels { - panel@0 { - compatible = "panel"; - mode = "XVGA"; - refresh = <60>; - xres = <1024>; - yres = <768>; - pixclock = <15748>; - left_margin = <152>; - right_margin = <48>; - upper_margin = <23>; - lower_margin = <3>; - hsync_len = <104>; - vsync_len = <4>; - sync = <0>; - vmode = "FB_VMODE_NONINTERLACED"; - tim2 = "TIM2_BCD", "TIM2_IPC"; - cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; - caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; - bpp = <16>; - }; - }; }; -- 1.8.4.2

11 years, 5 months

[RFC part3 PATCH 0/2] Using ACPI GTDT table to initialize arch timer

by Hanjun Guo

This is the last part of patch set for core of ARM64 ACPI, and is based on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC". ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only, and contains the information for arch timer initialisation. This patch trys to convert the arch timer to ACPI using GTDT. After this patch set was posted, we already finished the SMP, GIC and arch timer initialisation, which all are essential for ARM64 core system running, then we will focus on converting the device drivers to ACPI. Here is the GTDT ASL code I used: --- platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl index 18c821a..714d61c 100644 --- a/platforms/foundation-v8.acpi/gtdt.asl +++ b/platforms/foundation-v8.acpi/gtdt.asl @@ -1,5 +1,6 @@ /* * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * Hanjun Guo <hanjun.guo(a)linaro.org> * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -21,22 +22,32 @@ [0004] Flags (decoded below) : 00000001 Memory Present : 1 -[0004] Secure PL1 Interrupt : 00000000 -[0004] SPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +/* In Foundation model's dts file, the last cell of interrupts + * is 0xff01, it means its cpu mask is FF, and trigger type + * and flag is 1 = low-to-high edge triggered. + * + * so in ACPI the Trigger Mode is 1 - Edge triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * using direct mapping for hwirqs, it means that we using + * ID [16, 31] for PPI, not [0, 15] used in FDT. + */ +[0004] Secure PL1 Interrupt : 0000001d +[0004] SPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL1 Interrupt : 00000000 -[0004] NSPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL1 Interrupt : 0000001e +[0004] NSPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Virtual Timer Interrupt : 00000000 -[0004] VT Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Virtual Timer Interrupt : 0000001b +[0004] VT Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL2 Interrupt : 00000000 -[0004] NSPL2 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL2 Interrupt : 0000001a +[0004] NSPL2 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 Hanjun Guo (2): clocksource / arch_timer: Use ACPI GTDT table to initialize arch timer ARM64 / clocksource: Use arch_timer_acpi_init() arch/arm64/kernel/time.c | 4 ++ drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 3 files changed, 124 insertions(+), 16 deletions(-) -- 1.7.9.5

11 years, 5 months

[PATCH] fvp: Remove device binding from fvp base gicv2 FDT

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> The AMBA device binding has now been moved to DSDT, delete from fvp-base-gicv2-psci FDT Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- arch/arm64/boot/dts/fvp-base-gicv2-psci.dts | 15 --- arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 152 -------------------------- 2 files changed, 167 deletions(-) diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts index 646afb7..ae6072f 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts @@ -44,13 +44,6 @@ chosen { }; - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - psci { compatible = "arm,psci"; method = "smc"; @@ -154,14 +147,6 @@ }; }; - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0 60 4>, - <0 61 4>, - <0 62 4>, - <0 63 4>; - }; - smb { compatible = "simple-bus"; diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi index 3f429da..a1080744b 100644 --- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi +++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi @@ -48,33 +48,6 @@ reg = <2 0x00000000 0x00800000>; }; - ethernet@2,02000000 { - compatible = "smsc,lan91c111"; - reg = <2 0x02000000 0x10000>; - interrupts = <15>; - }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - v2m_refclk1mhz: refclk1mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; - clock-output-names = "v2m:refclk1mhz"; - }; - - v2m_refclk32khz: refclk32khz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "v2m:refclk32khz"; - }; - iofpga@3,00000000 { compatible = "arm,amba-bus", "simple-bus"; #address-cells = <1>; @@ -88,131 +61,6 @@ #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { - compatible = "arm,sp810", "arm,primecell"; - reg = <0x020000 0x1000>; - clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; - clock-names = "refclk", "timclk", "apb_pclk"; - #clock-cells = <1>; - clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; - }; - - aaci@040000 { - compatible = "arm,pl041", "arm,primecell"; - reg = <0x040000 0x1000>; - interrupts = <11>; - clocks = <&v2m_clk24mhz>; - clock-names = "apb_pclk"; - }; - - mmci@050000 { - compatible = "arm,pl180", "arm,primecell"; - reg = <0x050000 0x1000>; - interrupts = <9 10>; - cd-gpios = <&v2m_sysreg 0 0>; - wp-gpios = <&v2m_sysreg 1 0>; - max-frequency = <12000000>; - vmmc-supply = <&v2m_fixed_3v3>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "mclk", "apb_pclk"; - }; - - kmi@060000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x060000 0x1000>; - interrupts = <12>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - kmi@070000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x070000 0x1000>; - interrupts = <13>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - v2m_serial0: uart@090000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x090000 0x1000>; - interrupts = <5>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial1: uart@0a0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0a0000 0x1000>; - interrupts = <6>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial2: uart@0b0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0b0000 0x1000>; - interrupts = <7>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial3: uart@0c0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0c0000 0x1000>; - interrupts = <8>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - wdt@0f0000 { - compatible = "arm,sp805", "arm,primecell"; - reg = <0x0f0000 0x1000>; - interrupts = <0>; - clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; - clock-names = "wdogclk", "apb_pclk"; - }; - - v2m_timer01: timer@110000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x110000 0x1000>; - interrupts = <2>; - clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - v2m_timer23: timer@120000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x120000 0x1000>; - interrupts = <3>; - clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - rtc@170000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0x170000 0x1000>; - interrupts = <4>; - clocks = <&v2m_clk24mhz>; - clock-names = "apb_pclk"; - }; - - clcd@1f0000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f0000 0x1000>; - interrupts = <14>; - clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; - clock-names = "clcdclk", "apb_pclk"; - mode = "XVGA"; - use_dma = <0>; - framebuffer = <0x18000000 0x00180000>; - }; - - virtio_block@0130000 { - compatible = "virtio,mmio"; - reg = <0x130000 0x1000>; - interrupts = <0x2a>; - }; }; v2m_fixed_3v3: fixedregulator@0 { -- 1.7.9.5

11 years, 5 months

[PATCH] FVP: Add ASL for bus and devices enumeration

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Add ASL methods for SMB, FPGA, NET, CLK, SYSCTL, WDT, TIMER01, TIMER23, RTC and SER. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- .../AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl | 308 +++++++++++++++++++- 1 file changed, 304 insertions(+), 4 deletions(-) diff --git a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl index 76ddfa3..9af6fe7 100644 --- a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl @@ -266,6 +266,74 @@ DefinitionBlock ( } } + Device (PMU0) { + Name (_HID, "LNRO0007") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + }) + Return (RBUF) + } + } + + Device (SMB) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x08000000, // Address Range Minimum (base address in FDT) + 0x0BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x14000000, // Address Range Minimum (base address in FDT) + 0x17FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x18000000, // Address Range Minimum (base address in FDT) + 0x1BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1FFFFFFF, // Address Range Maximum (base + (len -1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x0C000000, // Address Range Minimum (base address in FDT) + 0x0FFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x10000000, // Address Range Minimum (base address in FDT) + 0x13FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + }) + Device (NET0) { Name (_HID, "LNRO0003") Name (_UID, 0) @@ -279,16 +347,248 @@ DefinitionBlock ( } } - Device (PMU0) { - Name (_HID, "LNRO0007") - Name (_UID, 0) + Device (CLK0) { + Name (_HID, "LNRO0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LNRO0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LNRO0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + + Device (FPGA) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1C1FFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x00200000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + }) + + Device (VIRT) { + Name (_HID, "LNRO0005") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c130000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x4A} + }) + Return (RBUF) + } + } + } // End of FPGA + } // End SMB + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) { + If (LEqual (Arg2, 0x00)) { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + Device (SCT0) { + Name (_HID, "LNRO000C") + Name (_UID, 0) + Name (_ADR, 0x1c020000) /* SYSCTL */ Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.SMB.CLK2", + "clock-name", "timclk \\_SB.SMB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c090000) + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c090000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x25} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0a0000) + Name (_UID, 1) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x26} + }) + Return (RBUF) + } + } + + Device (SER2) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0b0000) + Name (_UID, 2) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x27} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0c0000) + Name (_UID, 3) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x28} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_HID, "LNRO000D") + Name (_UID, 0) + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} + }) + Return (RBUF) + } + } + + Device (TIM0) { + Name (_HID, "LNRO000E") + Name (_UID, 0) + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} }) Return (RBUF) } } + + Device (TIM2) { + Name (_HID, "LNRO000F") + Name (_UID, 0) + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_HID, "LNRO0010") + Name (_UID, 0) + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + + } // End of AMBA } } -- 1.7.9.5

11 years, 5 months

some help in booting V8 foundation model.

by Amit Kachhap

Hi Hanjun/ACPI team, I am trying to boot V8 foundation model. I am using boot wrapper code from git://git.linaro.org/arm/models/boot-wrapper-aarch64.git Kernel is booting fine but I cannot load ACPI blob as there are no hooks in it to pass to kernel. However in the git://git.linaro.org/arm/models/boot-wrapper.git there are some ACPI hooks but it is for armv7 and does not compile for arm64 linaro toolchain. Any pointer where i am going wrong? Thanks, Amit Daniel

11 years, 5 months

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