- Linaro-acpi - lists.linaro.org

[PATCH v5 1/6] PCC: Initialize PCC Mailbox earlier at boot

by Ashwin Chaugule

This change initializes the PCC Mailbox earlier than the ACPI processor driver. This enables drivers introduced in follow up patches (e.g. CPPC) to be probed via the ACPI processor driver interface. The CPPC probe requires the PCC channel to be initialized for it to query each CPUs performance capabilites. Signed-off-by: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> --- drivers/mailbox/pcc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c index 7e91d68..8809587 100644 --- a/drivers/mailbox/pcc.c +++ b/drivers/mailbox/pcc.c @@ -352,4 +352,4 @@ static int __init pcc_init(void) return 0; } -device_initcall(pcc_init); +postcore_initcall(pcc_init); -- 1.9.1

10 years, 2 months

2
2
0 0

[PATCH v5 0/6] CPUFreq driver using CPPC methods

by Ashwin Chaugule

CPPC: ==== CPPC (Collaborative Processor Performance Control) is a new way to control CPU performance using an abstract continous scale as against a discretized P-state scale which is tied to CPU frequency only. It is defined in the ACPI 5.0+ spec. In brief, the basic operation involves: - OS makes a CPU performance request. (Can provide min and max tolerable bounds) - Platform (such as BMC) is free to optimize request within requested bounds depending on power/thermal budgets etc. - Platform conveys its decision back to OS The communication between OS and platform occurs through another medium called (PCC) Platform communication Channel. This is a generic mailbox like mechanism which includes doorbell semantics to indicate register updates. See drivers/mailbox/pcc.c This patchset introduces a CPPC based CPUFreq driver that works with existing governors such as ondemand. The CPPC table parsing and the CPPC communication semantics are abstracted into separate files to allow future CPPC based drivers to implement their own governors if required. Initial patchsets included an adaptation of the PID governor from intel_pstate.c. However recent experiments led to extensive modifications of the algorithm to calculate CPU busyness. Until it is verified that these changes are worthwhile, the existing governors should provide for a good enough starting point for ARM64 servers. Finer details about the PCC and CPPC spec are available in the latest ACPI 5.1 specification.[2] Changes since V4: - Misc cleanups. Addressed feedback from Rafael. - Made acpi_processor.c independent of C-states, P-states and others. - Per CPU scanning for _CPC is now made from acpi_processor.c - Added new Kconfig options for legacy C states and P states to enable future support for newer alternatives as defined in the ACPI spec 6.0. Changes since V3: - Split CPPC backend methods into separate files. - Add frontend driver which plugs into existing CPUfreq governors. - Simplify PCC driver by moving communication space mapping and read/write into client drivers. Changes since V2: - Select driver if !X86, since intel_pstate will use HWP extensions instead. - Added more comments. - Added Freq domain awareness and PSD parsing. Changes since V1: - Create a new driver based on Dirks suggestion. - Fold in CPPC backend hooks into main driver. Changes since V0: [1] - Split intel_pstate.c into a generic PID governor and platform specific backend. - Add CPPC accessors as PID backend. [1] - http://lwn.net/Articles/608715/ [2] - http://www.uefi.org/sites/default/files/resources/ACPI_5_1release.pdf [3] - https://patches.linaro.org/40705/ Ashwin Chaugule (6): PCC: Initialize PCC Mailbox earlier at boot ACPI: Make ACPI processor driver more extensible ACPI: Introduce CPU performance controls using CPPC CPPC: Add a CPUFreq driver for use with CPPC CPPC: Probe for CPPC tables for each ACPI Processor object PCC: Enable PCC only when needed drivers/acpi/Kconfig | 58 ++- drivers/acpi/Makefile | 8 +- drivers/acpi/cppc_acpi.c | 808 ++++++++++++++++++++++++++++++++++++++++ drivers/acpi/processor_driver.c | 89 +++-- drivers/cpufreq/Kconfig | 2 +- drivers/cpufreq/Kconfig.arm | 16 + drivers/cpufreq/Kconfig.x86 | 2 + drivers/cpufreq/Makefile | 2 + drivers/cpufreq/cppc_cpufreq.c | 197 ++++++++++ drivers/mailbox/Kconfig | 2 +- drivers/mailbox/pcc.c | 2 +- include/acpi/cppc_acpi.h | 137 +++++++ include/acpi/processor.h | 118 +++++- 13 files changed, 1380 insertions(+), 61 deletions(-) create mode 100644 drivers/acpi/cppc_acpi.c create mode 100644 drivers/cpufreq/cppc_cpufreq.c create mode 100644 include/acpi/cppc_acpi.h -- 1.9.1

10 years, 2 months

3
6
0 0

[PATCH v5 5/6] CPPC: Probe for CPPC tables for each ACPI Processor object

by Ashwin Chaugule

For each detected ACPI Processor object (ACPI0007), search its device handle for CPPC specific tables (i.e. _CPC) and extract CPU specific performance capabilites. Signed-off-by: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> --- drivers/acpi/processor_driver.c | 4 ++++ include/acpi/processor.h | 9 +++++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/acpi/processor_driver.c b/drivers/acpi/processor_driver.c index f61c09b..8554496 100644 --- a/drivers/acpi/processor_driver.c +++ b/drivers/acpi/processor_driver.c @@ -245,6 +245,10 @@ static int __acpi_processor_start(struct acpi_device *device) if (pr->flags.need_hotplug_init) return 0; + result = acpi_cppc_processor_probe(pr); + if (result) + return -ENODEV; + if (!cpuidle_get_driver() || cpuidle_get_driver() == &acpi_idle_driver) acpi_processor_power_init(pr); diff --git a/include/acpi/processor.h b/include/acpi/processor.h index 659edd6..0b51117 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -339,6 +339,15 @@ phys_cpuid_t acpi_get_phys_id(acpi_handle, int type, u32 acpi_id); int acpi_map_cpuid(phys_cpuid_t phys_id, u32 acpi_id); int acpi_get_cpuid(acpi_handle, int type, u32 acpi_id); +#ifdef CONFIG_ACPI_CPPC +extern int acpi_cppc_processor_probe(struct acpi_processor *pr); +#else +static inline int acpi_cppc_processor_probe(struct acpi_processor *pr) +{ + return 0; +} +#endif /* CONFIG_ACPI_CPPC */ + /* in processor_pdc.c */ void acpi_processor_set_pdc(acpi_handle handle); -- 1.9.1

10 years, 2 months

1
0
0 0

[PATCH v5 4/6] CPPC: Add a CPUFreq driver for use with CPPC

by Ashwin Chaugule

This driver utilizes the methods introduced in the previous patch - "ACPI: Introduce CPU performance controls using CPPC" and enables usage with existing CPUFreq governors. Signed-off-by: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> --- drivers/cpufreq/Kconfig.arm | 16 ++++ drivers/cpufreq/Makefile | 2 + drivers/cpufreq/cppc_cpufreq.c | 197 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 215 insertions(+) create mode 100644 drivers/cpufreq/cppc_cpufreq.c diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 4f3dbc8..d57ab1c 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -272,3 +272,19 @@ config ARM_PXA2xx_CPUFREQ This add the CPUFreq driver support for Intel PXA2xx SOCs. If in doubt, say N. + +config ACPI_CPPC_CPUFREQ + tristate "CPUFreq driver based on the ACPI CPPC spec" + depends on ACPI_CPPC + default n + help + This adds a CPUFreq driver which uses CPPC methods + as described in the ACPIv5.1 spec. CPPC stands for + Collaborative Processor Performance Controls. It + is based on an abstract continuous scale of CPU + performance values which allows the remote power + processor to flexibly optimize for power and + performance. CPPC relies on power management firmware + for its operation. + + If in doubt, say N. diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index cdce92a..ef3779b 100644 --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile @@ -79,6 +79,8 @@ obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o obj-$(CONFIG_ARM_TEGRA_CPUFREQ) += tegra-cpufreq.o obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o +obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o + ################################################################################## # PowerPC platform drivers diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c new file mode 100644 index 0000000..b5af4c8 --- /dev/null +++ b/drivers/cpufreq/cppc_cpufreq.c @@ -0,0 +1,197 @@ +/* + * CPPC (Collaborative Processor Performance Control) driver for + * interfacing with the CPUfreq layer and governors. See + * cppc_acpi.c for CPPC specific methods. + * + * (C) Copyright 2014 Linaro Ltd. + * Author: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 + * of the License. + */ + +#define pr_fmt(fmt) "CPPC Cpufreq:" fmt + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/cpu.h> +#include <linux/cpufreq.h> +#include <linux/vmalloc.h> + +#include <acpi/cppc_acpi.h> + +static struct cpudata **all_cpu_data; + +static int cppc_cpufreq_set_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + struct cpudata *cpu; + struct cpufreq_freqs freqs; + int ret; + + cpu = all_cpu_data[policy->cpu]; + + cpu->perf_ctrls.desired_perf = target_freq; + freqs.old = policy->cur; + freqs.new = target_freq; + + cpufreq_freq_transition_begin(policy, &freqs); + ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls); + cpufreq_freq_transition_end(policy, &freqs, ret != 0); + + if (ret) { + pr_debug("Failed to set target on CPU:%d. ret:%d\n", + cpu->cpu, ret); + return -EINVAL; + } + + return 0; +} + +static unsigned int cppc_cpufreq_get_perf(unsigned int cpu_num) +{ + struct cpudata *cpu; + int32_t delivered_perf = 1; + int ret; + + cpu = all_cpu_data[cpu_num]; + if (!cpu) + return 0; + + ret = cppc_get_perf_ctrs(cpu_num, &cpu->perf_fb_ctrs); + + if (ret) { + pr_err("Err reading CPU%d, perf counters. ret:%d\n", + cpu->cpu, ret); + return -ENODEV; + } + delivered_perf = cpu->perf_caps.reference_perf * + cpu->perf_fb_ctrs.delivered; + delivered_perf /= cpu->perf_fb_ctrs.reference; + pr_debug("delivered_perf: %d\n", delivered_perf); + pr_debug("reference_perf: %d\n", + cpu->perf_caps.reference_perf); + pr_debug("delivered, reference deltas: %lld, %lld\n", + cpu->perf_fb_ctrs.delivered, + cpu->perf_fb_ctrs.reference); + + return delivered_perf; +} + +static int cppc_verify_policy(struct cpufreq_policy *policy) +{ + cpufreq_verify_within_cpu_limits(policy); + return 0; +} + +static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy) +{ + int cpu_num = policy->cpu; + struct cpudata *cpu = all_cpu_data[cpu_num]; + int ret; + + pr_info("CPU %d exiting\n", cpu_num); + + cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf; + + ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls); + if (ret) + pr_err("Err setting perf value:%d on CPU:%d. ret:%d\n", + cpu->perf_caps.lowest_perf, cpu_num, ret); +} + +static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) +{ + struct cpudata *cpu; + int ret; + + cpu = all_cpu_data[policy->cpu]; + + cpu->cpu = policy->cpu; + ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps); + + if (ret) { + pr_err("Err reading CPU%d, perf capabilities. ret:%d\n", + cpu->cpu, ret); + return -ENODEV; + } + + policy->min = cpu->perf_caps.lowest_perf; + policy->max = cpu->perf_caps.highest_perf; + /* cpuinfo and default policy values */ + policy->cpuinfo.min_freq = cpu->perf_caps.lowest_perf; + policy->cpuinfo.max_freq = cpu->perf_caps.highest_perf; + + if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || + policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) + cpumask_copy(policy->cpus, cpu->shared_cpu_map); + + cpumask_set_cpu(policy->cpu, policy->cpus); + cpu->cur_policy = policy; + + pr_info("Initialized on cpu:%d\n", cpu->cpu); + return 0; +} + +static struct cpufreq_driver cppc_cpufreq_driver = { + .flags = CPUFREQ_CONST_LOOPS, + .verify = cppc_verify_policy, + .target = cppc_cpufreq_set_target, + .get = cppc_cpufreq_get_perf, + .init = cppc_cpufreq_cpu_init, + .stop_cpu = cppc_cpufreq_stop_cpu, + .name = "cppc_cpufreq", +}; + +static int __init cppc_cpufreq_init(void) +{ + int i, rc = 0; + struct cpudata *cpu; + + if (acpi_disabled) + return -ENODEV; + + all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); + if (!all_cpu_data) + return -ENOMEM; + + for_each_possible_cpu(i) { + all_cpu_data[i] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); + if (!all_cpu_data[i]) + goto out; + + cpu = all_cpu_data[i]; + if (!zalloc_cpumask_var(&cpu->shared_cpu_map, + GFP_KERNEL)) { + pr_debug("No memory for shared_cpus cpumask\n"); + goto out; + } + } + + rc = acpi_get_psd_map(all_cpu_data); + if (rc) { + pr_err("Error parsing PSD data\n"); + goto out; + } + + rc = cpufreq_register_driver(&cppc_cpufreq_driver); + if (rc) + goto out; + + pr_info("Registration completed\n"); + return rc; + +out: + for_each_possible_cpu(i) + if (all_cpu_data[i]) + kfree(all_cpu_data[i]); + + vfree(all_cpu_data); + return -ENODEV; +} + +late_initcall(cppc_cpufreq_init); -- 1.9.1

10 years, 2 months

1
0
0 0

[PATCH v5 3/6] ACPI: Introduce CPU performance controls using CPPC

by Ashwin Chaugule

CPPC stands for Collaborative Processor Performance Controls and is defined in the ACPI v5.0+ spec. It describes CPU performance controls on an abstract and continuous scale allowing the platform (e.g. remote power processor) to flexibly optimize CPU performance with its knowledge of power budgets and other architecture specific knowledge. This patch adds a shim which exports commonly used functions to get and set CPPC specific controls for each CPU. This enables CPUFreq drivers to gather per CPU performance data and use with exisiting governors or even allows for customized governors which are implemented inside CPUFreq drivers. Signed-off-by: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> --- drivers/acpi/Kconfig | 17 + drivers/acpi/Makefile | 1 + drivers/acpi/cppc_acpi.c | 808 +++++++++++++++++++++++++++++++++++++++++++++++ include/acpi/cppc_acpi.h | 137 ++++++++ 4 files changed, 963 insertions(+) create mode 100644 drivers/acpi/cppc_acpi.c create mode 100644 include/acpi/cppc_acpi.h diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index d98d304..0848848 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -188,6 +188,23 @@ config ACPI_PSS monitoring. It is required by several flavors of cpufreq performance-state drivers. +config ACPI_CPPC + bool "Common ACPI CPPC routines for CPU performance" + depends on ARM64 && ACPI_PROCESSOR + depends on !ACPI_PSS + select MAILBOX + select PCC + default n + help + This file implements common functionality to parse + CPPC tables as described in the ACPI 5.1+ spec. The + routines implemented are meant to be used by other + drivers to control CPU performance using CPPC semantics. + If your platform does not support CPPC in firmware, + leave this option disabled. + + If in doubt, say N. + config ACPI_PROCESSOR tristate "Processor" depends on X86 || IA64 || ARM64 diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 30b2bfc..93ff805 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -80,6 +80,7 @@ obj-$(CONFIG_ACPI_HED) += hed.o obj-$(CONFIG_ACPI_EC_DEBUGFS) += ec_sys.o obj-$(CONFIG_ACPI_CUSTOM_METHOD)+= custom_method.o obj-$(CONFIG_ACPI_BGRT) += bgrt.o +obj-$(CONFIG_ACPI_CPPC) += cppc_acpi.o # processor has its own "processor." module_param namespace processor-y := processor_driver.o diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c new file mode 100644 index 0000000..f7da82c --- /dev/null +++ b/drivers/acpi/cppc_acpi.c @@ -0,0 +1,808 @@ +/* + * CPPC (Collaborative Processor Performance Control) methods used + * by CPUfreq drivers. + * + * (C) Copyright 2014 Linaro Ltd. + * Author: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 + * of the License. + * + * CPPC describes a few methods for controlling CPU performance using + * information from a per CPU table called CPC. This table is described in + * the ACPI v5.0+ specification. The table consists of a list of + * registers which may be memory mapped or hardware registers and also may + * include some static integer values. + * + * CPU performance is on an abstract continuous scale as against a discretized + * P-state scale which is tied to CPU frequency only. In brief, the basic + * operation involves: + * + * - OS makes a CPU performance request. (Can provide min and max bounds) + * + * - Platform (such as BMC) is free to optimize request within requested bounds + * depending on power/thermal budgets etc. + * + * - Platform conveys its decision back to OS + * + * The communication between OS and platform occurs through another medium + * called (PCC) Platform Communication Channel. This is a generic mailbox like + * mechanism which includes doorbell semantics to indicate register updates. + * See drivers/mailbox/pcc.c for details on PCC. + * + * Finer details about the PCC and CPPC spec are available in the latest + * ACPI 5.1 specification. + */ + +#define pr_fmt(fmt) "ACPI CPPC: " fmt + +#include <linux/cpufreq.h> +#include <linux/delay.h> + +#include <acpi/cppc_acpi.h> +/* + * Lock to provide mutually exclusive access to the PCC + * channel. e.g. When the remote updates the shared region + * with new data, the reader needs to be protected from + * other CPUs activity on the same channel. + */ +static DEFINE_SPINLOCK(pcc_lock); + +static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr); + +/* This layer handles all the PCC specifics for CPPC. */ +static struct mbox_chan *pcc_channel; +static void __iomem *pcc_comm_addr; +static u64 comm_base_addr; +static int pcc_subspace_idx = -1; +static u16 pcc_cmd_delay; +static int pcc_channel_acquired; + +#define NUM_RETRIES 500 + +static int send_pcc_cmd(u16 cmd) +{ + int err, result = 0; + int retries = NUM_RETRIES; + struct acpi_pcct_hw_reduced *pcct_ss = pcc_channel->con_priv; + struct acpi_pcct_shared_memory *generic_comm_base = + (struct acpi_pcct_shared_memory *) pcc_comm_addr; + u32 cmd_latency = pcct_ss->latency; + + /* Write to the shared comm region. */ + writew(cmd, &generic_comm_base->command); + + /* Flip CMD COMPLETE bit */ + writew(0, &generic_comm_base->status); + + err = mbox_send_message(pcc_channel, &cmd); + if (err < 0) { + pr_err("Err sending PCC mbox message. cmd:%d, ret:%d\n", + cmd, err); + return err; + } + + /* Wait for a nominal time to let platform processes command. */ + udelay(cmd_latency); + + /* Retry in case the remote processor was too slow to catch up. */ + while (retries--) { + result = readw_relaxed(&generic_comm_base->status) + & PCC_CMD_COMPLETE ? 0 : -EIO; + if (!result) { + /* Success. */ + retries = NUM_RETRIES; + break; + } + } + + mbox_client_txdone(pcc_channel, result); + return result; +} + +static void cppc_chan_tx_done(struct mbox_client *cl, void *mssg, int ret) +{ + if (ret) + pr_debug("TX did not complete: CMD sent:%x, ret:%d\n", + *(u16 *)mssg, ret); + else + pr_debug("TX completed. CMD sent:%x, ret:%d\n", + *(u16 *)mssg, ret); +} + +struct mbox_client cppc_mbox_cl = { + .tx_done = cppc_chan_tx_done, + .knows_txdone = true, +}; + +static int acpi_get_psd(struct cpc_desc *cpc_ptr, acpi_handle handle) +{ + int result = 0; + acpi_status status = AE_OK; + struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; + struct acpi_buffer format = {sizeof("NNNNN"), "NNNNN"}; + struct acpi_buffer state = {0, NULL}; + union acpi_object *psd = NULL; + struct acpi_psd_package *pdomain; + + status = acpi_evaluate_object(handle, "_PSD", NULL, &buffer); + if (ACPI_FAILURE(status)) + return -ENODEV; + + psd = buffer.pointer; + if (!psd || (psd->type != ACPI_TYPE_PACKAGE)) { + pr_err("Invalid _PSD data\n"); + result = -ENODATA; + goto end; + } + + if (psd->package.count != 1) { + pr_err("Invalid _PSD data\n"); + result = -ENODATA; + goto end; + } + + pdomain = &(cpc_ptr->domain_info); + + state.length = sizeof(struct acpi_psd_package); + state.pointer = pdomain; + + status = acpi_extract_package(&(psd->package.elements[0]), + &format, &state); + if (ACPI_FAILURE(status)) { + pr_err("Invalid _PSD data\n"); + result = -ENODATA; + goto end; + } + + if (pdomain->num_entries != ACPI_PSD_REV0_ENTRIES) { + pr_err("Unknown _PSD:num_entries\n"); + result = -ENODATA; + goto end; + } + + if (pdomain->revision != ACPI_PSD_REV0_REVISION) { + pr_err("Unknown _PSD:revision\n"); + result = -ENODATA; + goto end; + } + + if (pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ALL && + pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ANY && + pdomain->coord_type != DOMAIN_COORD_TYPE_HW_ALL) { + pr_err("Invalid _PSD:coord_type\n"); + result = -ENODATA; + goto end; + } +end: + kfree(buffer.pointer); + return result; +} + +int acpi_get_psd_map(struct cpudata **all_cpu_data) +{ + int count_target; + int retval = 0; + unsigned int i, j; + cpumask_var_t covered_cpus; + struct cpudata *pr, *match_pr; + struct acpi_psd_package *pdomain; + struct acpi_psd_package *match_pdomain; + struct cpc_desc *cpc_ptr, *match_cpc_ptr; + + if (!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL)) + return -ENOMEM; + + /* + * Now that we have _PSD data from all CPUs, lets setup P-state + * domain info. + */ + for_each_possible_cpu(i) { + pr = all_cpu_data[i]; + if (!pr) + continue; + + if (cpumask_test_cpu(i, covered_cpus)) + continue; + + cpc_ptr = per_cpu(cpc_desc_ptr, i); + if (!cpc_ptr) + continue; + + pdomain = &(cpc_ptr->domain_info); + cpumask_set_cpu(i, pr->shared_cpu_map); + cpumask_set_cpu(i, covered_cpus); + if (pdomain->num_processors <= 1) + continue; + + /* Validate the Domain info */ + count_target = pdomain->num_processors; + if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ALL) + pr->shared_type = CPUFREQ_SHARED_TYPE_ALL; + else if (pdomain->coord_type == DOMAIN_COORD_TYPE_HW_ALL) + pr->shared_type = CPUFREQ_SHARED_TYPE_HW; + else if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ANY) + pr->shared_type = CPUFREQ_SHARED_TYPE_ANY; + + for_each_possible_cpu(j) { + if (i == j) + continue; + + match_cpc_ptr = per_cpu(cpc_desc_ptr, j); + if (!match_cpc_ptr) + continue; + + match_pdomain = &(match_cpc_ptr->domain_info); + if (match_pdomain->domain != pdomain->domain) + continue; + + /* Here i and j are in the same domain */ + + if (match_pdomain->num_processors != count_target) { + retval = -EINVAL; + goto err_ret; + } + + if (pdomain->coord_type != match_pdomain->coord_type) { + retval = -EINVAL; + goto err_ret; + } + + cpumask_set_cpu(j, covered_cpus); + cpumask_set_cpu(j, pr->shared_cpu_map); + } + + for_each_possible_cpu(j) { + if (i == j) + continue; + + match_pr = all_cpu_data[j]; + if (!match_pr) + continue; + + match_cpc_ptr = per_cpu(cpc_desc_ptr, j); + if (!match_cpc_ptr) + continue; + + match_pdomain = &(match_cpc_ptr->domain_info); + if (match_pdomain->domain != pdomain->domain) + continue; + + match_pr->shared_type = pr->shared_type; + cpumask_copy(match_pr->shared_cpu_map, + pr->shared_cpu_map); + } + } + +err_ret: + for_each_possible_cpu(i) { + pr = all_cpu_data[i]; + if (!pr) + continue; + + /* Assume no coordination on any error parsing domain info */ + if (retval) { + cpumask_clear(pr->shared_cpu_map); + cpumask_set_cpu(i, pr->shared_cpu_map); + pr->shared_type = CPUFREQ_SHARED_TYPE_ALL; + } + } + + free_cpumask_var(covered_cpus); + return retval; +} +EXPORT_SYMBOL_GPL(acpi_get_psd_map); + +static int register_pcc_channel(unsigned pcc_subspace_idx) +{ + struct acpi_pcct_subspace *cppc_ss; + unsigned int len; + + if (pcc_subspace_idx >= 0) { + pcc_channel = pcc_mbox_request_channel(&cppc_mbox_cl, + pcc_subspace_idx); + + if (IS_ERR(pcc_channel)) { + pr_err("No PCC communication channel found\n"); + return -ENODEV; + } + + /* + * The PCC mailbox controller driver should + * have parsed the PCCT (global table of all + * PCC channels) and stored pointers to the + * subspace communication region in con_priv. + */ + cppc_ss = pcc_channel->con_priv; + + if (!cppc_ss) { + pr_err("No PCC subspace found for CPPC\n"); + return -ENODEV; + } + + /* + * This is the shared communication region + * for the OS and Platform to communicate over. + */ + comm_base_addr = cppc_ss->base_address; + len = cppc_ss->length; + pcc_cmd_delay = cppc_ss->min_turnaround_time; + + pcc_comm_addr = ioremap(comm_base_addr, len); + if (!pcc_comm_addr) { + pr_err("Failed to ioremap PCC comm region mem\n"); + return -ENOMEM; + } + + /* Set flag so that we dont come here for each CPU. */ + pcc_channel_acquired = 1; + + } else + /* For the case where registers are not defined as PCC regs. */ + pr_debug("No PCC subspace detected in any CPC entries. Assuming" + "all registers are FFH/SystemIO.\n"); + + return 0; +} + +/** + * acpi_cppc_processor_probe - The _CPC table is a per CPU table + * which a bunch of entries which may be registers or integers. + * An example table looks like the following. + * + * Name(_CPC, Package() + * { + * 17, + * NumEntries + * 1, + * // Revision + * ResourceTemplate(){Register(PCC, 32, 0, 0x120, 2)}, + * // Highest Performance + * ResourceTemplate(){Register(PCC, 32, 0, 0x124, 2)}, + * // Nominal Performance + * ResourceTemplate(){Register(PCC, 32, 0, 0x128, 2)}, + * // Lowest Nonlinear Performance + * ResourceTemplate(){Register(PCC, 32, 0, 0x12C, 2)}, + * // Lowest Performance + * ResourceTemplate(){Register(PCC, 32, 0, 0x130, 2)}, + * // Guaranteed Performance Register + * ResourceTemplate(){Register(PCC, 32, 0, 0x110, 2)}, + * // Desired Performance Register + * ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, + * .. + * .. + * .. + * + * } + * Each Register() encodes how to access that specific register. + * e.g. a sample PCC entry has the following encoding: + * + * Register ( + * PCC, + * AddressSpaceKeyword + * 8, + * //RegisterBitWidth + * 8, + * //RegisterBitOffset + * 0x30, + * //RegisterAddress + * 9 + * //AccessSize (subspace ID) + * 0 + * ) + * } + * + * This function walks through all the per CPU _CPC entries and extracts + * the Register details. + * + * Return: 0 for success or negative value for err. + */ +int acpi_cppc_processor_probe(struct acpi_processor *pr) +{ + struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL}; + union acpi_object *out_obj, *cpc_obj; + struct cpc_desc *cpc_ptr; + struct cpc_reg *gas_t; + acpi_handle handle = pr->handle; + unsigned int num_ent, i, cpc_rev, ret = 0; + acpi_status status; + + /* Parse the ACPI _CPC table for this cpu. */ + if (!acpi_has_method(handle, "_CPC")) { + pr_debug("_CPC table not found\n"); + ret = -ENODEV; + goto out_buf_free; + } + + status = acpi_evaluate_object(handle, "_CPC", NULL, &output); + if (ACPI_FAILURE(status)) { + ret = -ENODEV; + goto out_buf_free; + } + + out_obj = (union acpi_object *) output.pointer; + if (out_obj->type != ACPI_TYPE_PACKAGE) { + ret = -ENODEV; + goto out_buf_free; + } + + cpc_ptr = kzalloc(sizeof(struct cpc_desc), GFP_KERNEL); + if (!cpc_ptr) + return -ENOMEM; + + /* First entry is NumEntries. */ + cpc_obj = &out_obj->package.elements[0]; + if (cpc_obj->type == ACPI_TYPE_INTEGER) { + num_ent = cpc_obj->integer.value; + } else { + pr_debug("Unexpected entry type(%d) for NumEntries\n", + cpc_obj->type); + goto out_free; + } + + /* Only support CPPCv2. Bail otherwise. */ + if (num_ent != CPPC_NUM_ENT) { + pr_err("Firmware exports %d entries. Expected: %d\n", + num_ent, CPPC_NUM_ENT); + ret = -EINVAL; + goto out_free; + } + + /* Second entry should be revision. */ + cpc_obj = &out_obj->package.elements[1]; + if (cpc_obj->type == ACPI_TYPE_INTEGER) { + cpc_rev = cpc_obj->integer.value; + } else { + pr_debug("Unexpected entry type(%d) for Revision\n", + cpc_obj->type); + goto out_free; + } + + if (cpc_rev != CPPC_REV) { + pr_err("Firmware exports revision:%d. Expected:%d\n", + cpc_rev, CPPC_REV); + goto out_free; + } + + /* Iterate through remaining entries in _CPC */ + for (i = 2; i < num_ent; i++) { + cpc_obj = &out_obj->package.elements[i]; + + if (cpc_obj->type == ACPI_TYPE_INTEGER) { + cpc_ptr->cpc_regs[i-2].type = + ACPI_TYPE_INTEGER; + cpc_ptr->cpc_regs[i-2].cpc_entry.int_value = + cpc_obj->integer.value; + } else if (cpc_obj->type == ACPI_TYPE_BUFFER) { + gas_t = (struct cpc_reg *) + cpc_obj->buffer.pointer; + + /* + * The PCC Subspace index is encoded inside + * the CPC table entries. The same PCC index + * will be used for all the PCC entries, + * so extract it only once. + */ + if (gas_t->space_id == + ACPI_ADR_SPACE_PLATFORM_COMM) { + if (pcc_subspace_idx < 0) + pcc_subspace_idx = + gas_t->access_width; + else if (pcc_subspace_idx != gas_t->access_width) { + pr_debug("CPU: %d, entry: %d. Mismatched PCC index." + "Expecting PCC subspace id: %d. Got: %d\n", + pr->id, i, pcc_subspace_idx, gas_t->access_width); + goto out_free; + } + } + + cpc_ptr->cpc_regs[i-2].type = + ACPI_TYPE_BUFFER; + cpc_ptr->cpc_regs[i-2].cpc_entry.reg = + (struct cpc_reg) { + .space_id = gas_t->space_id, + .length = gas_t->length, + .bit_width = gas_t->bit_width, + .bit_offset = gas_t->bit_offset, + .address = gas_t->address, + .access_width = + gas_t->access_width, + }; + } else { + pr_debug("Error in entry:%d in CPC table.\n", i); + ret = -EINVAL; + goto out_free; + } + } + + /* Plug it into this CPUs CPC descriptor. */ + per_cpu(cpc_desc_ptr, pr->id) = cpc_ptr; + + /* Parse PSD data for this CPU */ + ret = acpi_get_psd(cpc_ptr, handle); + if (ret) + goto out_free; + + /* Register PCC channel once for all CPUs. */ + if (!pcc_channel_acquired) { + ret = register_pcc_channel(pcc_subspace_idx); + if (ret) + goto out_free; + } + + /* Everything looks okay */ + pr_info("Successfully parsed CPC struct for CPU: %d\n", pr->id); + + kfree(output.pointer); + return 0; + +out_free: + cpc_ptr = per_cpu(cpc_desc_ptr, pr->id); + kfree(cpc_ptr); + +out_buf_free: + kfree(output.pointer); + return -ENODEV; +} +EXPORT_SYMBOL_GPL(acpi_cppc_processor_probe); + +static u64 cpc_trans(struct cpc_register_resource *reg, int cmd, u64 write_val, + bool is_pcc) +{ + u64 addr; + u64 read_val = 0; + + /* PCC communication addr space begins at byte offset 0x8. */ + addr = is_pcc ? (u64)pcc_comm_addr + 0x8 + reg->cpc_entry.reg.address : + reg->cpc_entry.reg.address; + + if (reg->type == ACPI_TYPE_BUFFER) { + switch (reg->cpc_entry.reg.bit_width) { + case 8: + if (cmd == CMD_READ) + read_val = readb((void *) (addr)); + else if (cmd == CMD_WRITE) + writeb(write_val, (void *)(addr)); + else + pr_debug("Unsupported cmd type: %d\n", cmd); + break; + case 16: + if (cmd == CMD_READ) + read_val = readw((void *) (addr)); + else if (cmd == CMD_WRITE) + writew(write_val, (void *)(addr)); + else + pr_debug("Unsupported cmd type: %d\n", cmd); + break; + case 32: + if (cmd == CMD_READ) + read_val = readl((void *) (addr)); + else if (cmd == CMD_WRITE) + writel(write_val, (void *)(addr)); + else + pr_debug("Unsupported cmd type: %d\n", cmd); + break; + case 64: + if (cmd == CMD_READ) + read_val = readq((void *) (addr)); + else if (cmd == CMD_WRITE) + writeq(write_val, (void *)(addr)); + else + pr_debug("Unsupported cmd type: %d\n", cmd); + break; + default: + pr_debug("Unsupported bit width for CPC cmd:%d\n", + cmd); + break; + } + } else if (reg->type == ACPI_TYPE_INTEGER) { + if (cmd == CMD_READ) + read_val = reg->cpc_entry.int_value; + else if (cmd == CMD_WRITE) + reg->cpc_entry.int_value = write_val; + else + pr_debug("Unsupported cmd type: %d\n", cmd); + } else + pr_debug("Unsupported CPC entry type:%d\n", reg->type); + + return read_val; +} + +/** + * cppc_get_perf_caps - Get a CPUs performance capabilities. + * @cpunum: CPU from which to get capabilities info. + * @perf_caps: ptr to cppc_perf_caps. See cppc_acpi.h + * + * Return - 0 for success with perf_caps populated else + * -ERRNO. + */ +int cppc_get_perf_caps(int cpunum, struct cppc_perf_caps *perf_caps) +{ + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum); + struct cpc_register_resource *highest_reg, *lowest_reg, *ref_perf, + *nom_perf; + u64 min, max, ref, nom; + bool is_pcc = false; + int ret; + + if (!cpc_desc) { + pr_debug("No CPC descriptor for CPU:%d\n", cpunum); + return -ENODEV; + } + + highest_reg = &cpc_desc->cpc_regs[HIGHEST_PERF]; + lowest_reg = &cpc_desc->cpc_regs[LOWEST_PERF]; + ref_perf = &cpc_desc->cpc_regs[REFERENCE_PERF]; + nom_perf = &cpc_desc->cpc_regs[NOMINAL_PERF]; + + spin_lock(&pcc_lock); + + /* Are any of the regs PCC ?*/ + if ((highest_reg->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM) || + (lowest_reg->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM) || + (ref_perf->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM) || + (nom_perf->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM)) + is_pcc = true; + + if (is_pcc) { + /* + * Min time OS should wait before sending + * next command. + */ + udelay(pcc_cmd_delay); + /* Ring doorbell */ + ret = send_pcc_cmd(CMD_READ); + if (ret) { + spin_unlock(&pcc_lock); + return -EIO; + } + } + + max = cpc_trans(highest_reg, CMD_READ, 0, is_pcc); + perf_caps->highest_perf = max; + + min = cpc_trans(lowest_reg, CMD_READ, 0, is_pcc); + perf_caps->lowest_perf = min; + + ref = cpc_trans(ref_perf, CMD_READ, 0, is_pcc); + perf_caps->reference_perf = ref; + + nom = cpc_trans(nom_perf, CMD_READ, 0, is_pcc); + perf_caps->nominal_perf = nom; + + if (!ref) + perf_caps->reference_perf = perf_caps->nominal_perf; + + spin_unlock(&pcc_lock); + + if (!perf_caps->highest_perf || + !perf_caps->lowest_perf || + !perf_caps->reference_perf || + !perf_caps->nominal_perf) { + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cppc_get_perf_caps); + +/** + * cppc_get_perf_ctrs - Read a CPUs performance feedback counters. + * @cpunum: CPU from which to read counters. + * @perf_fb_ctrs: ptr to cppc_perf_fb_ctrs. See cppc_acpi.h + * + * Return - 0 for success with perf_fb_ctrs populated else + * -ERRNO. + */ +int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs) +{ + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum); + struct cpc_register_resource *delivered_reg, *reference_reg; + u64 delivered, reference; + bool is_pcc = false; + int ret; + + if (!cpc_desc) { + pr_debug("No CPC descriptor for CPU:%d\n", cpunum); + return -ENODEV; + } + + delivered_reg = &cpc_desc->cpc_regs[DELIVERED_CTR]; + reference_reg = &cpc_desc->cpc_regs[REFERENCE_CTR]; + + spin_lock(&pcc_lock); + + /* Are any of the regs PCC ?*/ + if ((delivered_reg->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM) || + (reference_reg->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM)) + is_pcc = true; + + if (is_pcc) { + /* + * Min time OS should wait before sending + * next command. + */ + udelay(pcc_cmd_delay); + /* Ring doorbell */ + ret = send_pcc_cmd(CMD_READ); + if (ret) { + spin_unlock(&pcc_lock); + return -EIO; + } + } + + delivered = cpc_trans(delivered_reg, CMD_READ, 0, is_pcc); + reference = cpc_trans(reference_reg, CMD_READ, 0, is_pcc); + + spin_unlock(&pcc_lock); + + if (!delivered || !reference) + return -EINVAL; + + perf_fb_ctrs->delivered = delivered; + perf_fb_ctrs->reference = reference; + + perf_fb_ctrs->delivered -= perf_fb_ctrs->prev_delivered; + perf_fb_ctrs->reference -= perf_fb_ctrs->prev_reference; + + perf_fb_ctrs->prev_delivered = delivered; + perf_fb_ctrs->prev_reference = reference; + + return 0; +} +EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs); + +/** + * cppc_set_perf - Set a CPUs performance controls. + * @cpu: CPU for which to set performance controls. + * @perf_ctrls: ptr to cppc_perf_ctrls. See cppc_acpi.h + * + * Return: 0 for success, -ERRNO otherwise. + */ +int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls) +{ + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu); + struct cpc_register_resource *desired_reg; + int ret = 0; + bool is_pcc = false; + + if (!cpc_desc) { + pr_debug("No CPC descriptor for CPU:%d\n", cpu); + return -ENODEV; + } + + desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF]; + + spin_lock(&pcc_lock); + + /* Is this a PCC reg ?*/ + if (desired_reg->cpc_entry.reg.space_id == + ACPI_ADR_SPACE_PLATFORM_COMM) + is_pcc = true; + + cpc_trans(desired_reg, CMD_WRITE, + perf_ctrls->desired_perf, is_pcc); + + if (is_pcc) { + /* + * Min time OS should wait before sending + * next command. + */ + udelay(pcc_cmd_delay); + /* Ring doorbell */ + ret = send_pcc_cmd(CMD_READ); + } + + spin_unlock(&pcc_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(cppc_set_perf); diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h new file mode 100644 index 0000000..440f8a0 --- /dev/null +++ b/include/acpi/cppc_acpi.h @@ -0,0 +1,137 @@ +/* + * CPPC (Collaborative Processor Performance Control) methods used + * by CPUfreq drivers. + * + * (C) Copyright 2014 Linaro Ltd. + * Author: Ashwin Chaugule <ashwin.chaugule(a)linaro.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 + * of the License. + */ + +#ifndef _CPPC_ACPI_H +#define _CPPC_ACPI_H + +#include <linux/acpi.h> +#include <linux/mailbox_controller.h> +#include <linux/mailbox_client.h> +#include <linux/types.h> + +#include <acpi/processor.h> + +/* Only support CPPCv2 for now. */ +#define CPPC_NUM_ENT 21 +#define CPPC_REV 2 + +#define PCC_CMD_COMPLETE 1 +#define MAX_CPC_REG_ENT 19 + +/* CPPC specific PCC commands. */ +#define CMD_READ 0 +#define CMD_WRITE 1 + +/* Each register has the folowing format. */ +struct cpc_reg { + u8 descriptor; + u16 length; + u8 space_id; + u8 bit_width; + u8 bit_offset; + u8 access_width; + u64 __iomem address; +} __packed; + +/* + * Each entry in the CPC table is either + * of type ACPI_TYPE_BUFFER or + * ACPI_TYPE_INTEGER. + */ +struct cpc_register_resource { + acpi_object_type type; + union { + struct cpc_reg reg; + u64 int_value; + } cpc_entry; +}; + +/* Container to hold the CPC details for each CPU */ +struct cpc_desc { + int num_entries; + int version; + struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT]; + struct acpi_psd_package domain_info; +}; + +/* These are indexes into the per-cpu cpc_regs[]. Order is important. */ +enum cppc_regs { + HIGHEST_PERF, + NOMINAL_PERF, + LOW_NON_LINEAR_PERF, + LOWEST_PERF, + GUARANTEED_PERF, + DESIRED_PERF, + MIN_PERF, + MAX_PERF, + PERF_REDUC_TOLERANCE, + TIME_WINDOW, + CTR_WRAP_TIME, + REFERENCE_CTR, + DELIVERED_CTR, + PERF_LIMITED, + ENABLE, + AUTO_SEL_ENABLE, + AUTO_ACT_WINDOW, + ENERGY_PERF, + REFERENCE_PERF, +}; + +/* + * Categorization of registers as described + * in the ACPI v.5.1 spec. + * XXX: Only filling up ones which are used by governors + * today. + */ +struct cppc_perf_caps { + u32 highest_perf; + u32 nominal_perf; + u32 reference_perf; + u32 lowest_perf; +}; + +struct cppc_perf_ctrls { + u32 max_perf; + u32 min_perf; + u32 desired_perf; +}; + +struct cppc_perf_fb_ctrs { + u64 reference; + u64 prev_reference; + u64 delivered; + u64 prev_delivered; +}; + +/* Per CPU container for runtime CPPC management. */ +struct cpudata { + int cpu; + struct cppc_perf_caps perf_caps; + struct cppc_perf_ctrls perf_ctrls; + struct cppc_perf_fb_ctrs perf_fb_ctrs; + struct cpufreq_policy *cur_policy; + unsigned int shared_type; + cpumask_var_t shared_cpu_map; +}; + +extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs); +extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls); +extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps); +extern int acpi_get_psd_map(struct cpudata **); + +/* Methods to interact with the PCC mailbox controller. */ +extern struct mbox_chan * + pcc_mbox_request_channel(struct mbox_client *, unsigned int); +extern int mbox_send_message(struct mbox_chan *chan, void *mssg); + +#endif /* _CPPC_ACPI_H*/ -- 1.9.1

10 years, 2 months

1
0
0 0

[PATCH] ACPICA: Add MADT generic distributor version values for ACPI 6.0

by Hanjun Guo

ACPI 6.0 specified MADT generic distributor version values, but the detail definition is missing, add its support in this patch. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- Hi Bob, Lv, As discussed with Lv on linux-acpi maillist, I prepared this patch for review. Please treat this patch as a fix for next ACPICA version and linux kernel 4.2 material, because we still can not use the newest ACPICA for linux when this enum is missing, any comments are welcomed. Thanks Hanjun source/include/actbl1.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/source/include/actbl1.h b/source/include/actbl1.h index 1c508a0..0235543 100644 --- a/source/include/actbl1.h +++ b/source/include/actbl1.h @@ -1050,6 +1050,18 @@ typedef struct acpi_madt_generic_distributor } ACPI_MADT_GENERIC_DISTRIBUTOR; +/* Values for Version in Generic Distributor (ACPI 6.0) */ + +enum AcpiMadtGicVersionType +{ + ACPI_MADT_GIC_VER_UNKNOWN = 0, + ACPI_MADT_GIC_VER_V1 = 1, + ACPI_MADT_GIC_VER_V2 = 2, + ACPI_MADT_GIC_VER_V3 = 3, + ACPI_MADT_GIC_VER_V4 = 4, + ACPI_MADT_GIC_VER_RESERVED = 5 /* 5 and greater are reserved */ +}; + /* 13: Generic MSI Frame (ACPI 5.1) */ -- 1.9.1

10 years, 2 months

1
1
0 0

[PATCH v2 0/7] Watchdog: introduce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset: (1)Export "arch_timer_get_rate" in arm_arch_timer.c for the other drivers, like SBSA watchdog driver (2)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi. (3)Introduce "pretimeout" into the watchdog framework, and update Documentation/watchdog/watchdog-kernel-api.txt to introduce: (1)the new elements in the watchdog_device and watchdog_ops struct; (2)the new API "watchdog_init_timeouts". (4)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.Use "pretimeout" in watchdog framework; d.In first timeout(WS0), do panic to save system context; e.Support geting timeout and pretimeout from parameter and FDT at the driver init stage. (5)Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model (2)AMD Seattle B0 Changelog: v2: Improve watchdog-kernel-api.txt documentation for pretimeout support. Export "arch_timer_get_rate" in arm_arch_timer.c. Add watchdog_init_timeouts API for pretimeout support in framework. Improve suspend and resume foundation in driver Improve timeout/pretimeout values init code in driver. Delete unnecessary items of the sbsa_gwdt struct and #define. Delete all unnecessary debug info in driver. Fix 64bit division bug. Use the arch_timer interface to get watchdog clock rate. Add MODULE_DEVICE_TABLE for platform device id. Fix typoes. v1: The first version upstream patchset to linux mailing list Fu Wei (7): clocksource: export "arch_timer_get_rate" for the other drivers Documentation: add sbsa-gwdt.txt documentation ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introduce "pretimeout" into framework Watchdog: introduce ARM SBSA watchdog driver ACPI: import watchdog info of GTDT into platform device .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 36 ++ Documentation/watchdog/watchdog-kernel-api.txt | 62 ++- arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 10 + arch/arm64/kernel/acpi.c | 136 ++++++ drivers/clocksource/arm_arch_timer.c | 1 + drivers/watchdog/Kconfig | 12 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 476 +++++++++++++++++++++ drivers/watchdog/watchdog_core.c | 103 +++-- drivers/watchdog/watchdog_dev.c | 48 +++ include/linux/watchdog.h | 30 +- 12 files changed, 891 insertions(+), 35 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/watchdog/sbsa_gwdt.c -- 1.9.1

10 years, 2 months

8
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[PATCH 0/3] Misc Fix-up for AMD Seattle

by Suravee Suthikulpanit

Hi Hanjun / Mark / Tomasz, I have tried the following branch on AMD Seattle. http://git.linaro.org/leg/acpi/acpi.git devel Last commit: f6b94809b273023f675d3504922457c9ffde7e81 I ran info a couple issues. Here are two patches (1 and 2), which should resolve the issues. Please see if they make sense. Also, patch 3 is needed for parsing _CCA information as a follow up of the CCA patch series here (https://lkml.org/lkml/2015/5/20/1033). Thanks, Suravee Suravee Suthikulpanit (3): ARM64 / PCI / ACPI: Do not return error when a MMCONFIG entry already exist ACPI / PCI: Also look for _PRT in the PCI host bridge device PCI: Generic function for setting up PCI device DMA coherency arch/arm64/kernel/pci.c | 9 +++++++-- drivers/acpi/pci_irq.c | 46 +++++++++++++++++++++++++++++++++------------- drivers/of/of_pci.c | 20 -------------------- drivers/pci/probe.c | 35 +++++++++++++++++++++++++++++++++-- include/linux/of_pci.h | 3 --- 5 files changed, 73 insertions(+), 40 deletions(-) -- 2.1.0

10 years, 2 months

8
22
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[V4 PATCH 0/6] ACPI: Introduce support for _CCA object

by Suravee Suthikulpanit

This patch series introduce support for _CCA object, which is currently used mainly by ARM64 platform to specify DMA coherency attribute for devices when booting with ACPI. A copy of ACPIv6 can be found here: http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf This patch also introduces 2 new APIS: 1. acpi_dma_is_coherent() as part of ACPI API. 2. device_dma_is_coherent() as part of unified device property API. This simplifies the logic in device drivers to determine device coherency attribute regardless of booting with DT vs ACPI. This has been tested on AMD-Seattle platform, which implements _CCA object as described in the AMD Opteron A1100 Series Processor ACPI Porting Guide: http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2012/10/Seattle_ACPI… Changes from V3 (https://lkml.org/lkml/2015/5/7/1004): * Remove ARCH64_SUPPORT_ACPI_CCA_ZERO and just use CONFIG_ARM64. (per Catalin and Rafael) * Do not need to call arch_setup_dma_ops() for acpi_device->dev. (per Rafael) * [3/6] (New) We also need to call arch_setup_dma_ops() for pci devices and check the CCA of the host bridge. Similar logic exists for OF. So, I refactor of_pci_dma_configure() to the more generic version pci_dma_configure(), and add support for ACPI. Changes from V2 (https://lkml.org/lkml/2015/5/5/510): * Reword ACPI_MUST_HAVE_CCA to ACPI_CCA_REQUIRED (per Rafael) * Reword ACPI_SUPPORT_CCA_ZERO to ARCH64_SUPPORT_ACPI_CCA_ZERO (per Rafael and Arnd) * Misc code styling clean up (per Rafael) * Only print missing _CCA warning message in debug mode. * Refactor logic in acpi_setup_device_dma() into if acpi_dma_is_supported() then call arch_setup_dma_ops(). * Do not allocate device dma_mask if !acpi_dma_is_supported() (per Arnd). * Re-use the dummy functions with the same signature. Changes from V1 (https://lkml.org/lkml/2015/4/29/290): * Remove supports for 32-bit ARM since doesn't currently supporting ACPI (Per Catalin suggestions.) * Do not call arch_setup_dma_ops() and when _CCA is missing. (per Arnd suggestion) * Add CONFIG_ACPI_SUPPORT_CCA_ZERO kernel config flag to allow architectures to specify the behavior when _CCA=0. * Add dummy_dma_ops for ARM64 (per Catalin suggestions). * Fixed build error when ACPI is not configured by defining acpi_dma_is_coherent() for when CONFIG_ACPI is not set. * Introduce device_dma_is_coherent(). * Use device_dma_is_coherent in crypto/ccp and amd-xgbe driver. Changes from RFC: (https://lkml.org/lkml/2015/4/1/389) * New logic for deriving and propagating coherent attribute from parent devices. (by Mark) * Introducing acpi_dma_is_coherent() API (Per Tom suggestion) * Introducing CONFIG_ACPI_MUST_HAVE_CCA kernel configuration. * Rebased to linux-4.1-rc1 Suravee Suthikulpanit (6): ACPI / scan: Parse _CCA and setup device coherency arm64 : Introduce support for ACPI _CCA object pci: Generic function for setting up PCI device DMA coherency device property: Introduces device_dma_is_coherent() crypto: ccp - Unify coherency checking logic with device_dma_is_coherent() amd-xgbe: Unify coherency checking logic with device_dma_is_coherent() arch/arm64/Kconfig | 1 + arch/arm64/include/asm/dma-mapping.h | 18 +++++- arch/arm64/mm/dma-mapping.c | 92 +++++++++++++++++++++++++++++++ drivers/acpi/Kconfig | 3 + drivers/acpi/acpi_platform.c | 10 +++- drivers/acpi/scan.c | 40 ++++++++++++++ drivers/base/property.c | 12 ++++ drivers/crypto/ccp/ccp-platform.c | 60 +------------------- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 27 +-------- drivers/of/of_pci.c | 20 ------- drivers/pci/probe.c | 35 +++++++++++- include/acpi/acpi_bus.h | 32 ++++++++++- include/linux/acpi.h | 10 ++++ include/linux/of_pci.h | 3 - include/linux/property.h | 2 + 15 files changed, 249 insertions(+), 116 deletions(-) -- 2.1.0

10 years, 2 months

10
31
0 0

[PATCH] [v3] watchdog: introduce the ARM64 SBSA watchdog driver

by Timur Tabi

The ARM Server Base System Architecture is a specification for ARM-based server systems. Among other things, it defines the behavior and register interface for a watchdog timer. Signed-off-by: Timur Tabi <timur(a)codeaurora.org> --- [v3] removed cpu_to_le32 used __maybe_unused instead of #ifdef drivers/watchdog/Kconfig | 9 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/arm_sbsa_wdt.c | 296 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 306 insertions(+) create mode 100644 drivers/watchdog/arm_sbsa_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index e5e7c55..b6e1cb4 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -514,6 +514,15 @@ config MEDIATEK_WATCHDOG To compile this driver as a module, choose M here: the module will be called mtk_wdt. +config ARM_SBSA_WDT + tristate "ARM Server Base System Architecture watchdog" + depends on ARM64 || COMPILE_TEST + depends on ARM_ARCH_TIMER + select WATCHDOG_CORE + help + Say Y here to include watchdog timer support for ARM Server Base + System Architecture (SBSA) systems. + # AVR32 Architecture config AT32AP700X_WDT diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 5c19294..063ab8c 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -64,6 +64,7 @@ obj-$(CONFIG_BCM_KONA_WDT) += bcm_kona_wdt.o obj-$(CONFIG_TEGRA_WATCHDOG) += tegra_wdt.o obj-$(CONFIG_MESON_WATCHDOG) += meson_wdt.o obj-$(CONFIG_MEDIATEK_WATCHDOG) += mtk_wdt.o +obj-$(CONFIG_ARM_SBSA_WDT) += arm_sbsa_wdt.o # AVR32 Architecture obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o diff --git a/drivers/watchdog/arm_sbsa_wdt.c b/drivers/watchdog/arm_sbsa_wdt.c new file mode 100644 index 0000000..0b35598 --- /dev/null +++ b/drivers/watchdog/arm_sbsa_wdt.c @@ -0,0 +1,296 @@ +/* + * Watchdog driver for SBSA-compliant watchdog timers + * + * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * ARM Server Base System Architecture watchdog driver. + * + * Register descriptions are taken from the ARM Server Base System + * Architecture document (ARM-DEN-0029) + */ + +#define pr_fmt(fmt) "sbsa-gwdt: " fmt + +#include <linux/module.h> +#include <linux/watchdog.h> +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/device.h> +#include <linux/io.h> + +#include <linux/irqdomain.h> +#include <linux/interrupt.h> +#include <linux/reboot.h> + +#include <asm/arch_timer.h> +#include <linux/acpi.h> + +/* Watchdog Interface Identification Registers */ +struct arm_sbsa_watchdog_ident { + __le32 w_iidr; /* Watchdog Interface Identification Register */ + uint8_t res2[0xFE8 - 0xFD0]; + __le32 w_pidr2; /* Peripheral ID2 Register */ +}; + +/* Watchdog Refresh Frame */ +struct arm_sbsa_watchdog_refresh { + __le32 wrr; /* Watchdog Refresh Register */ + uint8_t res1[0xFCC - 0x004]; + struct arm_sbsa_watchdog_ident ident; +}; + +/* Watchdog Control Frame */ +struct arm_sbsa_watchdog_control { + __le32 wcs; + __le32 res1; + __le32 wor; + __le32 res2; + __le64 wcv; + uint8_t res3[0xFCC - 0x018]; + struct arm_sbsa_watchdog_ident ident; +}; + +struct arm_sbsa_watchdog_data { + struct watchdog_device wdev; + unsigned int pm_status; + struct arm_sbsa_watchdog_refresh __iomem *refresh; + struct arm_sbsa_watchdog_control __iomem *control; +}; + +static int arm_sbsa_wdt_start(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + /* Writing to the control register will also reset the counter */ + writel(1, &data->control->wcs); + + return 0; +} + +static int arm_sbsa_wdt_stop(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + writel(0, &data->control->wcs); + + return 0; +} + +static int arm_sbsa_wdt_set_timeout(struct watchdog_device *wdev, + unsigned int timeout) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + wdev->timeout = timeout; + writel(arch_timer_get_cntfrq() * wdev->timeout, &data->control->wor); + + return 0; +} + +static int arm_sbsa_wdt_ping(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + writel(1, &data->refresh->wrr); + + return 0; +} + +static unsigned int arm_sbsa_wdt_status(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + return (readl(&data->control->wcs) & 1) << WDOG_ACTIVE; +} + +static unsigned int arm_sbsa_wdt_timeleft(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + uint64_t diff = readq(&data->control->wcv) - arch_counter_get_cntvct(); + + return diff / arch_timer_get_cntfrq(); +} + +static irqreturn_t arm_sbsa_wdt_interrupt(int irq, void *p) +{ + /* + * The WS0 interrupt occurs after the first timeout, so we attempt + * a manual reboot. If this doesn't work, the WS1 timeout will + * cause a hardware reset. + */ + pr_crit("Initiating system reboot\n"); + emergency_restart(); + + return IRQ_HANDLED; +} + +/* + * Disable watchdog if it is active during suspend + */ +static int __maybe_unused arm_sbsa_wdt_suspend(struct device *dev) +{ + struct arm_sbsa_watchdog_data *data = dev_get_drvdata(dev); + + data->pm_status = readl(&data->control->wcs) & 1; + + if (data->pm_status) + writel(0, &data->control->wcs); + + return 0; +} + +/* + * Enable watchdog and configure it if necessary + */ +static int __maybe_unused arm_sbsa_wdt_resume(struct device *dev) +{ + struct arm_sbsa_watchdog_data *data = dev_get_drvdata(dev); + + if (data->pm_status) + writel(1, &data->control->wcs); + + return 0; +} + +static const struct dev_pm_ops arm_sbsa_wdt_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(arm_sbsa_wdt_suspend, arm_sbsa_wdt_resume) +}; + +static struct watchdog_info arm_sbsa_wdt_info = { + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, + .identity = "ARM SBSA watchdog", +}; + +static struct watchdog_ops arm_sbsa_wdt_ops = { + .owner = THIS_MODULE, + .start = arm_sbsa_wdt_start, + .stop = arm_sbsa_wdt_stop, + .ping = arm_sbsa_wdt_ping, + .set_timeout = arm_sbsa_wdt_set_timeout, + .status = arm_sbsa_wdt_status, + .get_timeleft = arm_sbsa_wdt_timeleft, +}; + +static int __init arm_sbsa_wdt_probe(struct platform_device *pdev) +{ + struct arm_sbsa_watchdog_data *data; + struct resource *res; + uint32_t iidr; + int irq, ret; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control"); + data->control = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->control)) + return PTR_ERR(data->control); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "refresh"); + data->refresh = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->refresh)) + return PTR_ERR(data->refresh); + + /* We only support architecture version 0 */ + iidr = readl(&data->control->ident.w_iidr); + if (((iidr >> 16) & 0xf) != 0) { + dev_info(&pdev->dev, + "only architecture version 0 is supported\n"); + return -ENODEV; + } + + irq = platform_get_irq_byname(pdev, "ws0"); + if (irq < 0) { + dev_err(&pdev->dev, "could not get interrupt\n"); + return irq; + } + + ret = devm_request_irq(&pdev->dev, irq, arm_sbsa_wdt_interrupt, + 0, pdev->name, NULL); + if (ret < 0) { + dev_err(&pdev->dev, "could not request irq %i (ret=%i)\n", + irq, ret); + return ret; + } + + data->wdev.info = &arm_sbsa_wdt_info; + data->wdev.ops = &arm_sbsa_wdt_ops; + data->wdev.min_timeout = 1; + data->wdev.status = WATCHDOG_NOWAYOUT_INIT_STATUS; + + /* Calculate the maximum timeout in seconds that we can support */ + data->wdev.max_timeout = U32_MAX / arch_timer_get_cntfrq(); + + watchdog_set_drvdata(&data->wdev, data); + + /* + * Bits [15:12] are an implementation-defined revision number + * for the component. + */ + arm_sbsa_wdt_info.firmware_version = (iidr >> 12) & 0xf; + + ret = watchdog_register_device(&data->wdev); + if (ret < 0) { + dev_err(&pdev->dev, + "could not register watchdog device (ret=%i)\n", ret); + return ret; + } + + dev_dbg(&pdev->dev, "implementer code is %03x\n", + (iidr & 0xf00) >> 1 | (iidr & 0x7f)); + dev_info(&pdev->dev, "maximum timeout is %u seconds\n", + data->wdev.max_timeout); + + platform_set_drvdata(pdev, data); + + return 0; +} + +static int __exit arm_sbsa_wdt_remove(struct platform_device *pdev) +{ + struct arm_sbsa_watchdog_data *data = platform_get_drvdata(pdev); + + watchdog_unregister_device(&data->wdev); + + return 0; +} + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id arm_sbsa_wdt_of_match[] = { + { .compatible = "arm,sbsa-gwdt" }, + {}, +}; +MODULE_DEVICE_TABLE(of, arm_sbsa_wdt_of_match); +#endif + +static struct platform_driver arm_sbsa_wdt_driver = { + .driver = { + .name = "sbsa-gwdt", + .owner = THIS_MODULE, + .pm = &arm_sbsa_wdt_pm_ops, + .of_match_table = of_match_ptr(arm_sbsa_wdt_of_match), + }, + .probe = arm_sbsa_wdt_probe, + .remove = __exit_p(arm_sbsa_wdt_remove), +}; + +module_platform_driver(arm_sbsa_wdt_driver); + +MODULE_DESCRIPTION("ARM Server Base System Architecture Watchdog Driver"); +MODULE_LICENSE("GPL v2"); -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

10 years, 2 months

2
2
0 0

leg-kernel tag leg-20150519.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150519.0 This is based on mainline kernel v4.1-rc4 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/6fad3ac6a73d6ec7f1c664… Notes :- 1) Contains first draft of exporting RSDP, RSDT, XSDT tables patch for the no /dev/mem project 2) Contains V4 of the SBSA Watchdog driver patches. 3) Kludge/fix for Redhat OS login issues. 4) Support for booting on qemu virt machine type.

10 years, 2 months

1
0
0 0

[PATCH 4/6] Watchdog: introdouce "pretimeout" into framework

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Reasons: (1)kernel already has two watchdog drivers are using "pretimeout": drivers/char/ipmi/ipmi_watchdog.c drivers/watchdog/kempld_wdt.c(but the definition is different) (2)some other dirvers are going to use this: ARM SBSA Generic Watchdog Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- drivers/watchdog/watchdog_core.c | 66 ++++++++++++++++++++++++++++++++++++++++ drivers/watchdog/watchdog_dev.c | 48 +++++++++++++++++++++++++++++ include/linux/watchdog.h | 19 ++++++++++++ 3 files changed, 133 insertions(+) diff --git a/drivers/watchdog/watchdog_core.c b/drivers/watchdog/watchdog_core.c index cec9b55..6ca9578 100644 --- a/drivers/watchdog/watchdog_core.c +++ b/drivers/watchdog/watchdog_core.c @@ -54,6 +54,14 @@ static void watchdog_check_min_max_timeout(struct watchdog_device *wdd) wdd->min_timeout = 0; wdd->max_timeout = 0; } + if (wdd->min_pretimeout && wdd->min_timeout < wdd->min_pretimeout) { + pr_info("Invalid min timeout, resetting to min pretimeout!\n"); + wdd->min_timeout = wdd->min_pretimeout; + } + if (wdd->max_pretimeout && wdd->max_timeout < wdd->max_pretimeout) { + pr_info("Invalid max timeout, resetting to max pretimeout!\n"); + wdd->max_timeout = wdd->max_pretimeout; + } } /** @@ -98,6 +106,63 @@ int watchdog_init_timeout(struct watchdog_device *wdd, } EXPORT_SYMBOL_GPL(watchdog_init_timeout); +static void watchdog_check_min_max_pretimeout(struct watchdog_device *wdd) +{ + /* + * Check that we have valid min and max pretimeout values, if + * not reset them both to 0 (=not used or unknown) + */ + if (wdd->min_pretimeout > wdd->max_pretimeout) { + pr_info("Invalid min and max pretimeout, resetting to 0!\n"); + wdd->min_pretimeout = 0; + wdd->max_pretimeout = 0; + } +} + +/** + * watchdog_init_pretimeout() - initialize the pretimeout field + * @pretimeout_parm: pretimeout module parameter + * @dev: Device that stores the timeout-sec property + * + * Initialize the pretimeout field of the watchdog_device struct with either + * the pretimeout module parameter (if it is valid value) or the timeout-sec + * property (only if it is a valid value and the timeout_parm is out of bounds). + * If none of them are valid then we keep the old value (which should normally + * be the default pretimeout value. + * + * A zero is returned on success and -EINVAL for failure. + */ +int watchdog_init_pretimeout(struct watchdog_device *wdd, + unsigned int pretimeout_parm, struct device *dev) +{ + int ret = 0; + u32 timeouts[2]; + + watchdog_check_min_max_pretimeout(wdd); + + /* try to get the timeout module parameter first */ + if (!watchdog_pretimeout_invalid(wdd, pretimeout_parm) && + pretimeout_parm) { + wdd->pretimeout = pretimeout_parm; + return ret; + } + if (pretimeout_parm) + ret = -EINVAL; + + /* try to get the timeout_sec property */ + if (!dev || !dev->of_node) + return ret; + ret = of_property_read_u32_array(dev->of_node, + "timeout-sec", timeouts, 2); + if (!watchdog_pretimeout_invalid(wdd, timeouts[1]) && timeouts[1]) + wdd->pretimeout = timeouts[1]; + else + ret = -EINVAL; + + return ret; +} +EXPORT_SYMBOL_GPL(watchdog_init_pretimeout); + /** * watchdog_register_device() - register a watchdog device * @wdd: watchdog device @@ -119,6 +184,7 @@ int watchdog_register_device(struct watchdog_device *wdd) if (wdd->ops->start == NULL || wdd->ops->stop == NULL) return -EINVAL; + watchdog_check_min_max_pretimeout(wdd); watchdog_check_min_max_timeout(wdd); /* diff --git a/drivers/watchdog/watchdog_dev.c b/drivers/watchdog/watchdog_dev.c index 6aaefba..b519257 100644 --- a/drivers/watchdog/watchdog_dev.c +++ b/drivers/watchdog/watchdog_dev.c @@ -218,6 +218,38 @@ out_timeout: } /* + * watchdog_set_pretimeout: set the watchdog timer pretimeout + * @wddev: the watchdog device to set the timeout for + * @pretimeout: pretimeout to set in seconds + */ + +static int watchdog_set_pretimeout(struct watchdog_device *wddev, + unsigned int pretimeout) +{ + int err; + + if (!wddev->ops->set_pretimeout || + !(wddev->info->options & WDIOF_PRETIMEOUT)) + return -EOPNOTSUPP; + + if (watchdog_pretimeout_invalid(wddev, pretimeout)) + return -EINVAL; + + mutex_lock(&wddev->lock); + + if (test_bit(WDOG_UNREGISTERED, &wddev->status)) { + err = -ENODEV; + goto out_pretimeout; + } + + err = wddev->ops->set_pretimeout(wddev, pretimeout); + +out_pretimeout: + mutex_unlock(&wddev->lock); + return err; +} + +/* * watchdog_get_timeleft: wrapper to get the time left before a reboot * @wddev: the watchdog device to get the remaining time from * @timeleft: the time that's left @@ -388,6 +420,22 @@ static long watchdog_ioctl(struct file *file, unsigned int cmd, if (wdd->timeout == 0) return -EOPNOTSUPP; return put_user(wdd->timeout, p); + case WDIOC_SETPRETIMEOUT: + if (get_user(val, p)) + return -EFAULT; + err = watchdog_set_pretimeout(wdd, val); + if (err < 0) + return err; + /* If the watchdog is active then we send a keepalive ping + * to make sure that the watchdog keep's running (and if + * possible that it takes the new timeout) */ + watchdog_ping(wdd); + /* Fall */ + case WDIOC_GETPRETIMEOUT: + /* timeout == 0 means that we don't use the pretimeout */ + if (wdd->pretimeout == 0) + return -EOPNOTSUPP; + return put_user(wdd->pretimeout, p); case WDIOC_GETTIMELEFT: err = watchdog_get_timeleft(wdd, &val); if (err) diff --git a/include/linux/watchdog.h b/include/linux/watchdog.h index a746bf5..f0a3c5b 100644 --- a/include/linux/watchdog.h +++ b/include/linux/watchdog.h @@ -25,6 +25,7 @@ struct watchdog_device; * @ping: The routine that sends a keepalive ping to the watchdog device. * @status: The routine that shows the status of the watchdog device. * @set_timeout:The routine for setting the watchdog devices timeout value. + * @set_pretimeout:The routine for setting the watchdog devices pretimeout value * @get_timeleft:The routine that get's the time that's left before a reset. * @ref: The ref operation for dyn. allocated watchdog_device structs * @unref: The unref operation for dyn. allocated watchdog_device structs @@ -44,6 +45,7 @@ struct watchdog_ops { int (*ping)(struct watchdog_device *); unsigned int (*status)(struct watchdog_device *); int (*set_timeout)(struct watchdog_device *, unsigned int); + int (*set_pretimeout)(struct watchdog_device *, unsigned int); unsigned int (*get_timeleft)(struct watchdog_device *); void (*ref)(struct watchdog_device *); void (*unref)(struct watchdog_device *); @@ -62,6 +64,9 @@ struct watchdog_ops { * @timeout: The watchdog devices timeout value. * @min_timeout:The watchdog devices minimum timeout value. * @max_timeout:The watchdog devices maximum timeout value. + * @pretimeout: The watchdog devices pretimeout value. + * @min_pretimeout:The watchdog devices minimum pretimeout value. + * @max_pretimeout:The watchdog devices maximum pretimeout value. * @driver-data:Pointer to the drivers private data. * @lock: Lock for watchdog core internal use only. * @status: Field that contains the devices internal status bits. @@ -86,6 +91,9 @@ struct watchdog_device { unsigned int timeout; unsigned int min_timeout; unsigned int max_timeout; + unsigned int pretimeout; + unsigned int min_pretimeout; + unsigned int max_pretimeout; void *driver_data; struct mutex lock; unsigned long status; @@ -120,6 +128,14 @@ static inline bool watchdog_timeout_invalid(struct watchdog_device *wdd, unsigne (t < wdd->min_timeout || t > wdd->max_timeout)); } +/* Use the following function to check if a pretimeout value is invalid */ +static inline bool watchdog_pretimeout_invalid(struct watchdog_device *wdd, + unsigned int t) +{ + return ((wdd->max_pretimeout != 0) && + (t < wdd->min_pretimeout || t > wdd->max_pretimeout)); +} + /* Use the following functions to manipulate watchdog driver specific data */ static inline void watchdog_set_drvdata(struct watchdog_device *wdd, void *data) { @@ -134,6 +150,9 @@ static inline void *watchdog_get_drvdata(struct watchdog_device *wdd) /* drivers/watchdog/watchdog_core.c */ extern int watchdog_init_timeout(struct watchdog_device *wdd, unsigned int timeout_parm, struct device *dev); +extern int watchdog_init_pretimeout(struct watchdog_device *wdd, + unsigned int pretimeout_parm, + struct device *dev); extern int watchdog_register_device(struct watchdog_device *); extern void watchdog_unregister_device(struct watchdog_device *); -- 1.9.1

10 years, 2 months

5
20
0 0

Re: [Linaro-acpi] SBSA watchdog driver auto-insmod problem

by Fu Wei

Hi Graeme, Are you saying : static struct platform_driver sbsa_gwdt_driver = { .driver = { .name = "sbsa-gwdt", .pm = &sbsa_gwdt_pm_ops, .of_match_table = sbsa_gwdt_of_match, }, .probe = sbsa_gwdt_probe, .remove = sbsa_gwdt_remove, .shutdown = sbsa_gwdt_shutdown, }; .name = "sbsa-gwdt", ??? I am not sure if that can do the auto-insmod part, maybe I miss some knowledge of platform_driver , But AFAIK, the platform mechanism uses that name to match the driver and device, ONCE the driver or device is registered into system. that means when the driver is insmod'ed , then the "name" will take effect. But MODULE_DEVICE_TABLE creates an alias string in the .ok so depmod can find device table. please correct me , If I misunderstand this part . On 18 May 2015 at 17:11, Hanjun Guo <hanjun.guo(a)linaro.org> wrote: > On 2015年05月18日 17:05, G Gregory wrote: >> >> Shouldn't the standard platform_device matching kick in? >> >> It should match the driver to the name! > > > Hmm, I missed this part, I'm not familiar with > the mechanism, Fuwei, could you please try this > direction? > > >> >> Graeme >> >> On 18 May 2015 at 10:04, Hanjun Guo <hanjun.guo(a)linaro.org> wrote: >>> >>> On 2015年05月18日 16:48, Fu Wei wrote: >>>> >>>> >>>> Hi Suravee, >>>> >>>> Hanjun and me have figured out the problem of auto-insmod SBSA >>>> watchdog module, when boot with ACPI: >>>> >>>> For now , we can not insmod SBSA watchdog driver automatically, because >>>> : >>>> >>>> For booting with dtb , in the driver module, we already have : >>>> --------------------- >>>> static const struct of_device_id sbsa_gwdt_of_match[] = { >>>> { .compatible = "arm,sbsa-gwdt", }, >>>> {}, >>>> }; >>>> MODULE_DEVICE_TABLE(of, sbsa_gwdt_of_match); >>>> --------------------- >>>> >>>> For booting with acpi , we should have sometime like : >>>> --------------------- >>>> static const struct acpi_device_id sbsa_gwdt_ids[] __used = { >>>> {ACPI_GTDT_SBSA_GWDT_HID, 0}, >>>> {"", 0} >>>> }; >>>> MODULE_DEVICE_TABLE(acpi, sbsa_gwdt_ids); >>>> --------------------- >>>> >>>> Unfortunately, for now , in ACPI spec, it seems we don't have >>>> ACPI_GTDT_SBSA_GWDT_HID, and in Linux kernel, there is not a >>>> mechanism to register the Wakeup-timer and Watchdog in GTDT with >>>> ACPI_GTDT_*_HID. >>>> >>>> Maybe, ACPI team of LEG can discuss about that and rise a request of >>>> adding ACPI_GTDT_*_HID to ACPI spec for GTDT table >>>> >>>> @Hanjun, Al >>>> Please correct me if I misunderstand something :-) >>>> Great thanks! >>> >>> >>> >>> You are right, more specifically, there is no mechanism to auto >>> match/register modules for ACPI static tables (MADT/gtdt..), I think >>> we can post a question on ACPI maillist to see if any good inputs. >>> >>> Thanks >>> Hanjun -- Best regards, Fu Wei Software Engineer Red Hat Software (Beijing) Co.,Ltd.Shanghai Branch Ph: +86 21 61221326(direct) Ph: +86 186 2020 4684 (mobile) Room 1512, Regus One Corporate Avenue,Level 15, One Corporate Avenue,222 Hubin Road,Huangpu District, Shanghai,China 200021

10 years, 3 months

3
8
0 0

[PATCH 0/6] Watchdog: introdouce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset: (1)Introdouces Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi (2)Introdouce "pretimeout" into the watchdog framework (3)Introdouces ARM SBSA watchdog driver a.Use linux kernel watchdog framework b.Work with FDT on ARM64 c.Use "pretimeout" in watchdog framework d.In first timeout(WS0), do panic to save system context e.Support geting timeout and pretimeout from parameter and FDT at the driver init stage (4)Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information This platform device can be used by This Watchdog driver This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model (2)AMD Seattle B0 Fu Wei (6): Documentation: add sbsa-gwdt.txt documentation ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introdouce "pretimeout" into framework Watchdog: introdouce ARM SBSA watchdog driver ACPI: import watchdog info of GTDT into platform device .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 36 ++ arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 10 + arch/arm64/kernel/acpi.c | 136 +++++ drivers/watchdog/Kconfig | 10 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 553 +++++++++++++++++++++ drivers/watchdog/watchdog_core.c | 66 +++ drivers/watchdog/watchdog_dev.c | 48 ++ include/linux/watchdog.h | 19 + 10 files changed, 890 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/watchdog/sbsa_gwdt.c -- 1.9.1

10 years, 3 months

3
8
0 0

[PATCH] [v2] watchdog: introduce the ARM64 SBSA watchdog driver

by Timur Tabi

The ARM Server Base System Architecture is a specification for ARM-based server systems. Among other things, it defines the behavior and register interface for a watchdog timer. Signed-off-by: Timur Tabi <timur(a)codeaurora.org> --- [v2] added PM support now depends on Fu Wei's "ACPI: import watchdog info of GTDT into platform device" patch (GTDT platform code removed) driver compiles as a module replaced ARM-specific timer references hardware registers now marked as little-endian add OF support drivers/watchdog/Kconfig | 9 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/arm_sbsa_wdt.c | 303 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 313 insertions(+) create mode 100644 drivers/watchdog/arm_sbsa_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index e5e7c55..b97919f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -514,6 +514,15 @@ config MEDIATEK_WATCHDOG To compile this driver as a module, choose M here: the module will be called mtk_wdt. +config ARM_SBSA_WDT + tristate "ARM Server Base System Architecture watchdog" + depends on ARM64 || COMPILE_TEST + depends on ARCH_TIMER + select WATCHDOG_CORE + help + Say Y here to include watchdog timer support for ARM Server Base + System Architecture (SBSA) systems. + # AVR32 Architecture config AT32AP700X_WDT diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 5c19294..063ab8c 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -64,6 +64,7 @@ obj-$(CONFIG_BCM_KONA_WDT) += bcm_kona_wdt.o obj-$(CONFIG_TEGRA_WATCHDOG) += tegra_wdt.o obj-$(CONFIG_MESON_WATCHDOG) += meson_wdt.o obj-$(CONFIG_MEDIATEK_WATCHDOG) += mtk_wdt.o +obj-$(CONFIG_ARM_SBSA_WDT) += arm_sbsa_wdt.o # AVR32 Architecture obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o diff --git a/drivers/watchdog/arm_sbsa_wdt.c b/drivers/watchdog/arm_sbsa_wdt.c new file mode 100644 index 0000000..5af35bf --- /dev/null +++ b/drivers/watchdog/arm_sbsa_wdt.c @@ -0,0 +1,303 @@ +/* + * Watchdog driver for SBSA-compliant watchdog timers + * + * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * ARM Server Base System Architecture watchdog driver. + * + * Register descriptions are taken from the ARM Server Base System + * Architecture document (ARM-DEN-0029) + */ + +#define pr_fmt(fmt) "sbsa-gwdt: " fmt + +#include <linux/module.h> +#include <linux/watchdog.h> +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/device.h> +#include <linux/io.h> + +#include <linux/irqdomain.h> +#include <linux/interrupt.h> +#include <linux/reboot.h> + +#include <asm/arch_timer.h> +#include <linux/acpi.h> + +/* Watchdog Interface Identification Registers */ +struct arm_sbsa_watchdog_ident { + __le32 w_iidr; /* Watchdog Interface Identification Register */ + uint8_t res2[0xFE8 - 0xFD0]; + __le32 w_pidr2; /* Peripheral ID2 Register */ +}; + +/* Watchdog Refresh Frame */ +struct arm_sbsa_watchdog_refresh { + __le32 wrr; /* Watchdog Refresh Register */ + uint8_t res1[0xFCC - 0x004]; + struct arm_sbsa_watchdog_ident ident; +}; + +/* Watchdog Control Frame */ +struct arm_sbsa_watchdog_control { + __le32 wcs; + __le32 res1; + __le32 wor; + __le32 res2; + __le64 wcv; + uint8_t res3[0xFCC - 0x018]; + struct arm_sbsa_watchdog_ident ident; +}; + +struct arm_sbsa_watchdog_data { + struct watchdog_device wdev; + unsigned int pm_status; + struct arm_sbsa_watchdog_refresh __iomem *refresh; + struct arm_sbsa_watchdog_control __iomem *control; +}; + +static int arm_sbsa_wdt_start(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + /* Writing to the control register will also reset the counter */ + writel(cpu_to_le32(1), &data->control->wcs); + + return 0; +} + +static int arm_sbsa_wdt_stop(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + writel(cpu_to_le32(0), &data->control->wcs); + + return 0; +} + +static int arm_sbsa_wdt_set_timeout(struct watchdog_device *wdev, + unsigned int timeout) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + uint32_t wor; + + wdev->timeout = timeout; + + wor = arch_timer_get_cntfrq() * wdev->timeout; + writel(cpu_to_le32(wor), &data->control->wor); + + return 0; +} + +static int arm_sbsa_wdt_ping(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + writel(cpu_to_le32(1), &data->refresh->wrr); + + return 0; +} + +static unsigned int arm_sbsa_wdt_status(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + + return le32_to_cpu(readl(&data->control->wcs) & 1) << WDOG_ACTIVE; +} + +static unsigned int arm_sbsa_wdt_timeleft(struct watchdog_device *wdev) +{ + struct arm_sbsa_watchdog_data *data = + container_of(wdev, struct arm_sbsa_watchdog_data, wdev); + uint64_t wcv = le64_to_cpu(readq(&data->control->wcv)); + uint64_t diff = wcv - arch_counter_get_cntvct(); + + return diff / arch_timer_get_cntfrq(); +} + +static irqreturn_t arm_sbsa_wdt_interrupt(int irq, void *p) +{ + /* + * The WS0 interrupt occurs after the first timeout, so we attempt + * a manual reboot. If this doesn't work, the WS1 timeout will + * cause a hardware reset. + */ + pr_crit("Initiating system reboot\n"); + emergency_restart(); + + return IRQ_HANDLED; +} + +#ifdef CONFIG_PM_SLEEP +/* + * Disable watchdog if it is active during suspend + */ +static int arm_sbsa_wdt_suspend(struct device *dev) +{ + struct arm_sbsa_watchdog_data *data = dev_get_drvdata(dev); + + data->pm_status = le32_to_cpu(readl(&data->control->wcs)) & 1; + + if (data->pm_status) + writel(cpu_to_le32(0), &data->control->wcs); + + return 0; +} + +/* + * Enable watchdog and configure it if necessary + */ +static int arm_sbsa_wdt_resume(struct device *dev) +{ + struct arm_sbsa_watchdog_data *data = dev_get_drvdata(dev); + + if (data->pm_status) + writel(cpu_to_le32(0), &data->control->wcs); + + return 0; +} +#endif + +static const struct dev_pm_ops arm_sbsa_wdt_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(arm_sbsa_wdt_suspend, arm_sbsa_wdt_resume) +}; + +static struct watchdog_info arm_sbsa_wdt_info = { + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, + .identity = "ARM SBSA watchdog", +}; + +static struct watchdog_ops arm_sbsa_wdt_ops = { + .owner = THIS_MODULE, + .start = arm_sbsa_wdt_start, + .stop = arm_sbsa_wdt_stop, + .ping = arm_sbsa_wdt_ping, + .set_timeout = arm_sbsa_wdt_set_timeout, + .status = arm_sbsa_wdt_status, + .get_timeleft = arm_sbsa_wdt_timeleft, +}; + +static int __init arm_sbsa_wdt_probe(struct platform_device *pdev) +{ + struct arm_sbsa_watchdog_data *data; + struct resource *res; + uint32_t iidr; + int irq, ret; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control"); + data->control = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->control)) + return PTR_ERR(data->control); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "refresh"); + data->refresh = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->refresh)) + return PTR_ERR(data->refresh); + + iidr = le32_to_cpu(readl(&data->control->ident.w_iidr)); + + /* We only support architecture version 0 */ + if (((iidr >> 16) & 0xf) != 0) { + dev_info(&pdev->dev, + "only architecture version 0 is supported\n"); + return -ENODEV; + } + + irq = platform_get_irq_byname(pdev, "ws0"); + if (irq < 0) { + dev_err(&pdev->dev, "could not get interrupt\n"); + return irq; + } + + ret = devm_request_irq(&pdev->dev, irq, arm_sbsa_wdt_interrupt, + 0, pdev->name, NULL); + if (ret < 0) { + dev_err(&pdev->dev, "could not request irq %i (ret=%i)\n", + irq, ret); + return ret; + } + + data->wdev.info = &arm_sbsa_wdt_info; + data->wdev.ops = &arm_sbsa_wdt_ops; + data->wdev.min_timeout = 1; + data->wdev.status = WATCHDOG_NOWAYOUT_INIT_STATUS; + + /* Calculate the maximum timeout in seconds that we can support */ + data->wdev.max_timeout = U32_MAX / arch_timer_get_cntfrq(); + + watchdog_set_drvdata(&data->wdev, data); + + /* + * Bits [15:12] are an implementation-defined revision number + * for the component. + */ + arm_sbsa_wdt_info.firmware_version = (iidr >> 12) & 0xf; + + ret = watchdog_register_device(&data->wdev); + if (ret < 0) { + dev_err(&pdev->dev, + "could not register watchdog device (ret=%i)\n", ret); + return ret; + } + + dev_dbg(&pdev->dev, "implementer code is %03x\n", + (iidr & 0xf00) >> 1 | (iidr & 0x7f)); + dev_info(&pdev->dev, "maximum timeout is %u seconds\n", + data->wdev.max_timeout); + + platform_set_drvdata(pdev, data); + + return 0; +} + +static int __exit arm_sbsa_wdt_remove(struct platform_device *pdev) +{ + struct arm_sbsa_watchdog_data *data = platform_get_drvdata(pdev); + + watchdog_unregister_device(&data->wdev); + + return 0; +} + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id arm_sbsa_wdt_of_match[] = { + { .compatible = "arm,sbsa-gwdt" }, + {}, +}; +MODULE_DEVICE_TABLE(of, arm_sbsa_wdt_of_match); +#endif + +static struct platform_driver arm_sbsa_wdt_driver = { + .driver = { + .name = "sbsa-gwdt", + .owner = THIS_MODULE, + .pm = &arm_sbsa_wdt_pm_ops, + .of_match_table = of_match_ptr(arm_sbsa_wdt_of_match), + }, + .probe = arm_sbsa_wdt_probe, + .remove = __exit_p(arm_sbsa_wdt_remove), +}; + +module_platform_driver(arm_sbsa_wdt_driver); + +MODULE_DESCRIPTION("ARM Server Base System Architecture Watchdog Driver"); +MODULE_LICENSE("GPL v2"); -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

10 years, 3 months

3
11
0 0

[update][PATCH v3 7/7] ACPI / processor: Introduce invalid_phys_cpuid()

by Hanjun Guo

Introduce invalid_phys_cpuid() to identify cpu with invalid physical ID, then used it as replacement of the direct comparisons with PHYS_CPUID_INVALID. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- Hi Rafael, This is replacement of patch 7/7 of patch set "[PATCH v3 0/7] minor cleanups for ACPI processor driver", which suggested by Sudeep and Lorenzo to replace "(int)phys_id" < 0 with "phys_id == PHYS_CPUID_INVALID" in invalid_phys_cpuid(). Thanks Hanjun drivers/acpi/acpi_processor.c | 4 ++-- drivers/acpi/processor_core.c | 4 ++-- include/linux/acpi.h | 5 +++++ 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/acpi/acpi_processor.c b/drivers/acpi/acpi_processor.c index 62c846b..92a5f73 100644 --- a/drivers/acpi/acpi_processor.c +++ b/drivers/acpi/acpi_processor.c @@ -170,7 +170,7 @@ static int acpi_processor_hotadd_init(struct acpi_processor *pr) acpi_status status; int ret; - if (pr->phys_id == PHYS_CPUID_INVALID) + if (invalid_phys_cpuid(pr->phys_id)) return -ENODEV; status = acpi_evaluate_integer(pr->handle, "_STA", NULL, &sta); @@ -264,7 +264,7 @@ static int acpi_processor_get_info(struct acpi_device *device) pr->phys_id = acpi_get_phys_id(pr->handle, device_declaration, pr->acpi_id); - if (pr->phys_id == PHYS_CPUID_INVALID) + if (invalid_phys_cpuid(pr->phys_id)) acpi_handle_debug(pr->handle, "failed to get CPU physical ID.\n"); pr->id = acpi_map_cpuid(pr->phys_id, pr->acpi_id); diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index fd4140d..33a38d6 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c @@ -184,7 +184,7 @@ phys_cpuid_t acpi_get_phys_id(acpi_handle handle, int type, u32 acpi_id) phys_cpuid_t phys_id; phys_id = map_mat_entry(handle, type, acpi_id); - if (phys_id == PHYS_CPUID_INVALID) + if (invalid_phys_cpuid(phys_id)) phys_id = map_madt_entry(type, acpi_id); return phys_id; @@ -196,7 +196,7 @@ int acpi_map_cpuid(phys_cpuid_t phys_id, u32 acpi_id) int i; #endif - if (phys_id == PHYS_CPUID_INVALID) { + if (invalid_phys_cpuid(phys_id)) { /* * On UP processor, there is no _MAT or MADT table. * So above phys_id is always set to PHYS_CPUID_INVALID. diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 913b49f..90e4ed1e 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -163,6 +163,11 @@ static inline bool invalid_logical_cpuid(u32 cpuid) return (int)cpuid < 0; } +static inline bool invalid_phys_cpuid(phys_cpuid_t phys_id) +{ + return phys_id == PHYS_CPUID_INVALID; +} + #ifdef CONFIG_ACPI_HOTPLUG_CPU /* Arch dependent functions for cpu hotplug support */ int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, int *pcpu); -- 1.9.1

10 years, 3 months

2
1
0 0

[PATCH v3 0/7] Watchdog: introdouce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Changelog: v3: improve sbsa-gwdt.txt documentation delete #address-cells and #size-cells simplify resource name, fix typo update foundation-v8.dts and amd-seattle-soc.dtsi add "pretimeout" into Watchdog framework improve driver delete unnecessary check, add debug messages. fix unnecessary pr_crit (to pr_debug) in WS0 irq routine simplify date struct add debug option into Kconfig/Makefile simplify ACPI GTDT support code fix code style problem by "checkpatch --strict" v2: enable modularize support both ACPI and FDT separate ACPI support code from driver to arch/arm64 acpi supprt move a function to header file for reusing the code simplify WS0 irq routine: using panic() add example dts code for foundation-v8 and AMD seattle Soc add sbsa-gwdt.txt documentation for FDT Test on ARM Foundation v8 model with watchdog daemon (ACPI/FDT, module/build-in) v1: draft patch for RFC and review Fu Wei (7): Documentation: add sbsa-gwdt.txt documentation. ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introdouce "pretimeout" into framework. Watchdog: introdouce ARM SBSA watchdog driver Watchdog: add debug option into Kconfig/Makefile ACPI: import watchdog info of GTDT into platform device .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 36 ++ arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 10 + arch/arm64/kernel/acpi.c | 131 +++++ drivers/watchdog/Kconfig | 17 + drivers/watchdog/Makefile | 3 + drivers/watchdog/sbsa_gwdt.c | 560 +++++++++++++++++++++ drivers/watchdog/watchdog_core.c | 66 +++ drivers/watchdog/watchdog_dev.c | 48 ++ include/linux/watchdog.h | 19 + 10 files changed, 901 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/watchdog/sbsa_gwdt.c -- 1.9.1

10 years, 3 months

7
24
0 0

leg-kernel tag leg-20150513.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150513.0 This is based on mainline kernel v4.1-rc3 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/3b86036d23d1332c26b246… Notes :- 1) Contains first draft of exporting RSDP, RSDT, XSDT tables patch for the no /dev/mem project 2) Contains V3 of the SBSA Watchdog driver patches.

10 years, 3 months

1
0
0 0

[PATCH v2 0/7] minor cleanups for ACPI processor driver

by Hanjun Guo

This patch set are some minor cleanups for ACPI processor driver to address the comments which raised by Rafael in ARM64 ACPI core patches. I rebased this patch set on top of current Linus's tree. v2: - rebased on top of 4.1-rc2 Hanjun Guo (7): ACPI / processor: remove cpu_index in acpi_processor_get_info() ACPI / processor: remove phys_id in acpi_processor_get_info() ACPI / processor: Introduce invalid_logical_cpuid() Xen / ACPI / processor: use invalid_logical_cpuid() Xen / ACPI / processor: Remove unneeded NULL check in xen_acpi_processor_enable() ACPI / processor: return specific error instead of -1 ACPI / processor: Introduce invalid_phys_cpuid() drivers/acpi/acpi_processor.c | 20 +++++++++----------- drivers/acpi/processor_core.c | 10 +++++----- drivers/acpi/processor_pdc.c | 5 +---- drivers/xen/xen-acpi-cpuhotplug.c | 12 +++--------- include/linux/acpi.h | 10 ++++++++++ 5 files changed, 28 insertions(+), 29 deletions(-) -- 1.9.1

10 years, 3 months

7
21
0 0

[V3 PATCH 0/5] ACPI: Introduce support for _CCA object

by Suravee Suthikulpanit

This patch series introduce support for _CCA object, which is currently used mainly by ARM64 platform to specify DMA coherency attribute for devices when booting with ACPI. A copy of ACPIv6 can be found here: http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf This patch also introduces 2 new APIS: 1. acpi_dma_is_coherent() as part of ACPI API. 2. device_dma_is_coherent() as part of unified device property API. This simplifies the logic in device drivers to determine device coherency attribute regardless of booting with DT vs ACPI. This has been tested on AMD-Seattle platform, which implements _CCA object as described in the AMD Opteron A1100 Series Processor ACPI Porting Guide: http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2012/10/Seattle_ACPI… Changes from V2 (https://lkml.org/lkml/2015/5/5/510): * Reword ACPI_MUST_HAVE_CCA to ACPI_CCA_REQUIRED (per Rafael) * Reword ACPI_SUPPORT_CCA_ZERO to ARCH64_SUPPORT_ACPI_CCA_ZERO (per Rafael and Arnd) * Misc code styling clean up (per Rafael) * Only print missing _CCA warning message in debug mode. * Refactor logic in acpi_setup_device_dma() into if acpi_dma_is_supported() then call arch_setup_dma_ops(). * Do not allocate device dma_mask if !acpi_dma_is_supported() (per Arnd). * Re-use the dummy functions with the same signature. Changes from V1 (https://lkml.org/lkml/2015/4/29/290): * Remove supports for 32-bit ARM since doesn't currently supporting ACPI (Per Catalin suggestions.) * Do not call arch_setup_dma_ops() and when _CCA is missing. (per Arnd suggestion) * Add CONFIG_ACPI_SUPPORT_CCA_ZERO kernel config flag to allow architectures to specify the behavior when _CCA=0. * Add dummy_dma_ops for ARM64 (per Catalin suggestions). * Fixed build error when ACPI is not configured by defining acpi_dma_is_coherent() for when CONFIG_ACPI is not set. * Introduce device_dma_is_coherent(). * Use device_dma_is_coherent in crypto/ccp and amd-xgbe driver. Changes from RFC: (https://lkml.org/lkml/2015/4/1/389) * New logic for deriving and propagating coherent attribute from parent devices. (by Mark) * Introducing acpi_dma_is_coherent() API (Per Tom suggestion) * Introducing CONFIG_ACPI_MUST_HAVE_CCA kernel configuration. * Rebased to linux-4.1-rc1 Suravee Suthikulpanit (5): ACPI / scan: Parse _CCA and setup device coherency arm64 : Introduce support for ACPI _CCA object device property: Introduces device_dma_is_coherent() crypto: ccp - Unify coherency checking logic with device_dma_is_coherent() amd-xgbe: Unify coherency checking logic with device_dma_is_coherent() arch/arm64/Kconfig | 2 + arch/arm64/include/asm/dma-mapping.h | 18 +++++- arch/arm64/mm/dma-mapping.c | 92 +++++++++++++++++++++++++++++++ drivers/acpi/Kconfig | 6 ++ drivers/acpi/acpi_platform.c | 10 +++- drivers/acpi/scan.c | 42 ++++++++++++++ drivers/base/property.c | 12 ++++ drivers/crypto/ccp/ccp-platform.c | 60 +------------------- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 27 +-------- include/acpi/acpi_bus.h | 32 ++++++++++- include/linux/acpi.h | 10 ++++ include/linux/property.h | 2 + 12 files changed, 222 insertions(+), 91 deletions(-) -- 2.1.0

10 years, 3 months

6
16
0 0

[PATCH] ACPI: sysfs expose root tables RSDP/RSDT/XSDT

by Graeme Gregory

On some architectures /dev/mem is being removed. For debug/analysis tools like FWTS/acpidump we therefore need to expose the ACPI root tables in sysfs like the other tables. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/sysfs.c | 119 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/drivers/acpi/sysfs.c b/drivers/acpi/sysfs.c index 0876d77..3f336f9 100644 --- a/drivers/acpi/sysfs.c +++ b/drivers/acpi/sysfs.c @@ -348,6 +348,123 @@ acpi_sysfs_table_handler(u32 event, void *table, void *context) return AE_OK; } +/* + * On some architectures /dev/mem interface is not available so for debug + * tools like FWTS, acpidump etc we will also need to export the three + * root tables RSDP, RSDT, XSDT where they exist. + */ + +struct acpi_root_table_attr { + struct bin_attribute attr; + acpi_physical_address table_addr; +}; + +static ssize_t acpi_table_show_root(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, + loff_t offset, size_t count) +{ + struct acpi_root_table_attr *table_attr = + container_of(bin_attr, + struct acpi_root_table_attr, attr); + void *table; + int ret; + + table = acpi_os_map_memory(table_attr->table_addr, bin_attr->size); + + if (!table) + return -EIO; + + ret = memory_read_from_buffer(buf, count, &offset, table, + bin_attr->size); + acpi_os_unmap_memory(table, bin_attr->size); + + return ret; +} + +static int acpi_root_tables_sysfs_init(struct kobject *tables_kobj) +{ + struct acpi_root_table_attr *root_tables_attr; + struct acpi_table_rsdp *rsdp; + struct acpi_table_header *table_header = NULL; + acpi_physical_address rsdp_ptr, rsdt_ptr, xsdt_ptr; + int ret; + + rsdp_ptr = acpi_os_get_root_pointer(); + + if (!rsdp_ptr) + return -EIO; + + rsdp = acpi_os_map_memory(rsdp_ptr, sizeof(*rsdp)); + if (!rsdp) { + ret = -EIO; + goto err; + } + + root_tables_attr = kzalloc(sizeof(*root_tables_attr) * 3, GFP_KERNEL); + + root_tables_attr[0].table_addr = rsdp_ptr; + root_tables_attr[0].attr.size = sizeof(*rsdp); + root_tables_attr[0].attr.read = acpi_table_show_root; + root_tables_attr[0].attr.attr.name = "RSDP"; + root_tables_attr[0].attr.attr.mode = 0400; + + ret = sysfs_create_bin_file(tables_kobj, &root_tables_attr[0].attr); + if (ret) + goto err; + + rsdt_ptr = rsdp->rsdt_physical_address; + if (rsdt_ptr) { + table_header = acpi_os_map_memory(rsdt_ptr, + sizeof(*table_header)); + if (!table_header) { + ret = -EIO; + goto err; + } + + root_tables_attr[1].table_addr = rsdt_ptr; + root_tables_attr[1].attr.size = table_header->length; + root_tables_attr[1].attr.read = acpi_table_show_root; + root_tables_attr[1].attr.attr.name = "RSDT"; + root_tables_attr[1].attr.attr.mode = 0400; + + ret = sysfs_create_bin_file(tables_kobj, + &root_tables_attr[1].attr); + if (ret) + goto err; + acpi_os_unmap_memory(table_header, sizeof(*table_header)); + } + + xsdt_ptr = rsdp->xsdt_physical_address; + if (xsdt_ptr) { + table_header = acpi_os_map_memory(xsdt_ptr, + sizeof(*table_header)); + if (!table_header) { + ret = -EIO; + goto err; + } + + root_tables_attr[2].table_addr = xsdt_ptr; + root_tables_attr[2].attr.size = table_header->length; + root_tables_attr[2].attr.read = acpi_table_show_root; + root_tables_attr[2].attr.attr.name = "XSDT"; + root_tables_attr[2].attr.attr.mode = 0400; + + ret = sysfs_create_bin_file(tables_kobj, + &root_tables_attr[2].attr); + if (ret) + goto err; + acpi_os_unmap_memory(table_header, sizeof(*table_header)); + } + return ret; + +err: + if (rsdp) + acpi_os_map_memory(rsdp_ptr, sizeof(*rsdp)); + if (table_header) + acpi_os_unmap_memory(table_header, sizeof(*table_header)); + return ret; +} + static int acpi_tables_sysfs_init(void) { struct acpi_table_attr *table_attr; @@ -387,6 +504,8 @@ static int acpi_tables_sysfs_init(void) list_add_tail(&table_attr->node, &acpi_table_attr_list); } + acpi_root_tables_sysfs_init(tables_kobj); + kobject_uevent(tables_kobj, KOBJ_ADD); kobject_uevent(dynamic_tables_kobj, KOBJ_ADD); status = acpi_install_table_handler(acpi_sysfs_table_handler, NULL); -- 2.1.4

10 years, 3 months

5
5
0 0

[PATCH v4 0/2] CPUFreq driver using CPPC methods

by Ashwin Chaugule

CPPC: ==== CPPC (Collaborative Processor Performance Control) is a new way to control CPU performance using an abstract continous scale as against a discretized P-state scale which is tied to CPU frequency only. It is defined in the ACPI 5.0+ spec. In brief, the basic operation involves: - OS makes a CPU performance request. (Can provide min and max tolerable bounds) - Platform (such as BMC) is free to optimize request within requested bounds depending on power/thermal budgets etc. - Platform conveys its decision back to OS The communication between OS and platform occurs through another medium called (PCC) Platform communication Channel. This is a generic mailbox like mechanism which includes doorbell semantics to indicate register updates. See drivers/mailbox/pcc.c This patchset introduces a CPPC based CPUFreq driver that works with existing governors such as ondemand. The CPPC table parsing and the CPPC communication semantics are abstracted into separate files to allow future CPPC based drivers to implement their own governors if required. Initial patchsets included an adaptation of the PID governor from intel_pstate.c. However recent experiments led to extensive modifications of the algorithm to calculate CPU busyness. Until it is verified that these changes are worthwhile, the existing governors should provide for a good enough starting point for ARM64 servers. Finer details about the PCC and CPPC spec are available in the latest ACPI 5.1 specification.[2] Changes since V3: - Split CPPC backend methods into separate files. - Add frontend driver which plugs into existing CPUfreq governors. - Simplify PCC driver by moving communication space mapping and read/write into client drivers. Changes since V2: - Select driver if !X86, since intel_pstate will use HWP extensions instead. - Added more comments. - Added Freq domain awareness and PSD parsing. Changes since V1: - Create a new driver based on Dirks suggestion. - Fold in CPPC backend hooks into main driver. Changes since V0: [1] - Split intel_pstate.c into a generic PID governor and platform specific backend. - Add CPPC accessors as PID backend. [1] - http://lwn.net/Articles/608715/ [2] - http://www.uefi.org/sites/default/files/resources/ACPI_5_1release.pdf [3] - https://patches.linaro.org/40705/ Ashwin Chaugule (2): Mailbox: Restructure and simplify PCC mailbox code CPPC: Add CPUFreq driver based on CPPC methods drivers/cpufreq/Kconfig.arm | 15 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cppc_acpi.c | 801 +++++++++++++++++++++++++++++++++++++++++ drivers/cpufreq/cppc_acpi.h | 134 +++++++ drivers/cpufreq/cppc_cpufreq.c | 186 ++++++++++ drivers/mailbox/pcc.c | 122 ++----- 6 files changed, 1174 insertions(+), 85 deletions(-) create mode 100644 drivers/cpufreq/cppc_acpi.c create mode 100644 drivers/cpufreq/cppc_acpi.h create mode 100644 drivers/cpufreq/cppc_cpufreq.c -- 1.9.1

10 years, 3 months

2
16
0 0

[PATCH 0/2] ACPI : Introduce support for _CCA object

by Suravee Suthikulpanit

This patch series introduce support for _CCA object, which is currently used mainly by ARM64 platform to specify DMA coherency attribute for devices when booting with ACPI. A copy of ACPIv6 can be found here: http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf This has been tested on AMD-Seattle platform, which implements _CCA object as described in the AMD Opteron A1100 Series Processor ACPI Porting Guide: http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2012/10/Seattle_ACPI… Changes From RFC: (https://lkml.org/lkml/2015/4/1/389) * New logic for deriving and propagating coherent attribute from parent devices. (by Mark) * Introducing acpi_dma_is_coherent() API (Per Tom suggestion) * Introducing CONFIG_ACPI_MUST_HAVE_CCA kernel configuration. * Rebased to linux-4.1-rc1 Suravee Suthikulpanit (2): arm/arm64: ACPI: Introduce CONFIG_ACPI_MUST_HAVE_CCA ACPI / scan: Parse _CCA and setup device coherency arch/arm/Kconfig | 1 + arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 3 +++ drivers/acpi/acpi_platform.c | 5 ++++- drivers/acpi/scan.c | 45 ++++++++++++++++++++++++++++++++++++++++++++ include/acpi/acpi_bus.h | 9 ++++++++- 6 files changed, 62 insertions(+), 2 deletions(-) -- 2.1.0

10 years, 3 months

11
35
0 0

[PATCH v3 0/7] minor cleanups for ACPI processor driver

by Hanjun Guo

This patch set is some minor cleanups for ACPI processor driver to address the comments which raised by Rafael in ARM64 ACPI core patches. Boris and Konrad already reviewed the XEN/ACPI part, they seems are ok with the changes for XEN [1] [2]. Sudeep, I didn't change the (int)phys_id < 0 to phys_id == PHYS_CPUID_INVALID as they have the same effects and Rafael prefer the previous one as he mentioned in ACPI core patch set comments, and PHYS_CPUID_INVALID is still needed for typedef phys_cpuid_t in ACPI core, so if you are not ok with it, please let me know. v3: - Reorder the patches to let "Introduce invalid_logical_cpuid()" as the first one to avoid raising confusions. - Replace "return invalid_logical_cpuid(cpuid) ? false : true;" as "return !invalid_logical_cpuid(cpuid);" - Some updates to the patch subject and changelog - Rebase on top of 4.1-rc3 v2: - rebased on top of 4.1-rc2 [1]: https://lkml.org/lkml/2015/5/5/733 [2]: https://lkml.org/lkml/2015/5/9/222 Hanjun Guo (7): ACPI / processor: Introduce invalid_logical_cpuid() Xen / ACPI / processor: use invalid_logical_cpuid() Xen / ACPI / processor: Remove unneeded NULL check ACPI / processor: remove cpu_index in acpi_processor_get_info() ACPI / processor: remove phys_id in acpi_processor_get_info() ACPI / processor: return specific error instead of -1 ACPI / processor: Introduce invalid_phys_cpuid() drivers/acpi/acpi_processor.c | 20 +++++++++----------- drivers/acpi/processor_core.c | 10 +++++----- drivers/acpi/processor_pdc.c | 5 +---- drivers/xen/xen-acpi-cpuhotplug.c | 12 +++--------- include/linux/acpi.h | 10 ++++++++++ 5 files changed, 28 insertions(+), 29 deletions(-) -- 1.9.1

10 years, 3 months

2
9
0 0

[PATCH v2 0/6] Watchdog: introdouce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Changelog: v2: enable modularize support both ACPI and FDT separate ACPI support code from driver to arch/arm64 acpi supprt move a function to header file for reusing the code simplify WS0 irq routine: using panic() add example dts code for foundation-v8 and AMD seattle Soc add sbsa-gwdt.txt documentation for FDT Test on ARM Foundation v8 model with watchdog deamon (ACPI/FDT, module/build-in) v1: draft patch for RFC and review Fu Wei (6): Documentation: add sbsa-gwdt.txt documentation for introducing SBSA(Server Base System Architecture) Generic Watchdog info in FDT. ARM64: add SBSA Generic Watchdog device node into foundation-v8.dts ARM64: add SBSA Generic Watchdog device node into amd-seattle-soc.dtsi Watchdog: introdouce ARM SBSA watchdog driver (1)use linux kernel watchdog framework (2)work with FDT (3)support pretimeout, for now in first timeout(WS0), do panic to save system context. ACPI: move map_generic_timer_interrupt function from arm_arch_timer.c to <linux/acpi.h> for sharing this to more file. ACPI: add importing SBSA Generic watchdog info of GTDT into platform device for whole system. .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 41 ++ arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 12 + arch/arm64/kernel/acpi.c | 154 ++++++ drivers/clocksource/arm_arch_timer.c | 16 - drivers/watchdog/Kconfig | 10 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 578 +++++++++++++++++++++ drivers/watchdog/sbsa_gwdt.h | 99 ++++ include/linux/acpi.h | 18 + 10 files changed, 924 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/watchdog/sbsa_gwdt.c create mode 100644 drivers/watchdog/sbsa_gwdt.h Signed-off-by: Fu Wei <fu.wei(a)linaro.org> -- 1.9.1

10 years, 3 months

6
48
0 0

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