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[PATCH] arm64: dts: remove simplebus and panel from fvp-base-gicv2-psci-acpi

by Graeme Gregory

We can boot to a usable userspace without these hunks so remove them. This leaves only timer and gic to be removed and we are booting completely from ACPI Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts | 84 ------------------------ 1 file changed, 84 deletions(-) diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts index 09a4061..04a6200 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts @@ -148,88 +148,4 @@ reg = <0x0 0x2a820000 0x0 0x10000>; }; }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard-acpi.dtsi" - }; - - panels { - panel@0 { - compatible = "panel"; - mode = "XVGA"; - refresh = <60>; - xres = <1024>; - yres = <768>; - pixclock = <15748>; - left_margin = <152>; - right_margin = <48>; - upper_margin = <23>; - lower_margin = <3>; - hsync_len = <104>; - vsync_len = <4>; - sync = <0>; - vmode = "FB_VMODE_NONINTERLACED"; - tim2 = "TIM2_BCD", "TIM2_IPC"; - cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; - caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; - bpp = <16>; - }; - }; }; -- 1.8.4.2

11 years, 8 months

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[RFC part3 PATCH 0/2] Using ACPI GTDT table to initialize arch timer

by Hanjun Guo

This is the last part of patch set for core of ARM64 ACPI, and is based on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC". ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only, and contains the information for arch timer initialisation. This patch trys to convert the arch timer to ACPI using GTDT. After this patch set was posted, we already finished the SMP, GIC and arch timer initialisation, which all are essential for ARM64 core system running, then we will focus on converting the device drivers to ACPI. Here is the GTDT ASL code I used: --- platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl index 18c821a..714d61c 100644 --- a/platforms/foundation-v8.acpi/gtdt.asl +++ b/platforms/foundation-v8.acpi/gtdt.asl @@ -1,5 +1,6 @@ /* * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * Hanjun Guo <hanjun.guo(a)linaro.org> * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -21,22 +22,32 @@ [0004] Flags (decoded below) : 00000001 Memory Present : 1 -[0004] Secure PL1 Interrupt : 00000000 -[0004] SPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +/* In Foundation model's dts file, the last cell of interrupts + * is 0xff01, it means its cpu mask is FF, and trigger type + * and flag is 1 = low-to-high edge triggered. + * + * so in ACPI the Trigger Mode is 1 - Edge triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * using direct mapping for hwirqs, it means that we using + * ID [16, 31] for PPI, not [0, 15] used in FDT. + */ +[0004] Secure PL1 Interrupt : 0000001d +[0004] SPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL1 Interrupt : 00000000 -[0004] NSPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL1 Interrupt : 0000001e +[0004] NSPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Virtual Timer Interrupt : 00000000 -[0004] VT Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Virtual Timer Interrupt : 0000001b +[0004] VT Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL2 Interrupt : 00000000 -[0004] NSPL2 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL2 Interrupt : 0000001a +[0004] NSPL2 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 Hanjun Guo (2): clocksource / arch_timer: Use ACPI GTDT table to initialize arch timer ARM64 / clocksource: Use arch_timer_acpi_init() arch/arm64/kernel/time.c | 4 ++ drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 3 files changed, 124 insertions(+), 16 deletions(-) -- 1.7.9.5

11 years, 8 months

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[PATCH] fvp: Remove device binding from fvp base gicv2 FDT

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> The AMBA device binding has now been moved to DSDT, delete from fvp-base-gicv2-psci FDT Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- arch/arm64/boot/dts/fvp-base-gicv2-psci.dts | 15 --- arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 152 -------------------------- 2 files changed, 167 deletions(-) diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts index 646afb7..ae6072f 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts @@ -44,13 +44,6 @@ chosen { }; - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - psci { compatible = "arm,psci"; method = "smc"; @@ -154,14 +147,6 @@ }; }; - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0 60 4>, - <0 61 4>, - <0 62 4>, - <0 63 4>; - }; - smb { compatible = "simple-bus"; diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi index 3f429da..a1080744b 100644 --- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi +++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi @@ -48,33 +48,6 @@ reg = <2 0x00000000 0x00800000>; }; - ethernet@2,02000000 { - compatible = "smsc,lan91c111"; - reg = <2 0x02000000 0x10000>; - interrupts = <15>; - }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - v2m_refclk1mhz: refclk1mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; - clock-output-names = "v2m:refclk1mhz"; - }; - - v2m_refclk32khz: refclk32khz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "v2m:refclk32khz"; - }; - iofpga@3,00000000 { compatible = "arm,amba-bus", "simple-bus"; #address-cells = <1>; @@ -88,131 +61,6 @@ #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { - compatible = "arm,sp810", "arm,primecell"; - reg = <0x020000 0x1000>; - clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; - clock-names = "refclk", "timclk", "apb_pclk"; - #clock-cells = <1>; - clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; - }; - - aaci@040000 { - compatible = "arm,pl041", "arm,primecell"; - reg = <0x040000 0x1000>; - interrupts = <11>; - clocks = <&v2m_clk24mhz>; - clock-names = "apb_pclk"; - }; - - mmci@050000 { - compatible = "arm,pl180", "arm,primecell"; - reg = <0x050000 0x1000>; - interrupts = <9 10>; - cd-gpios = <&v2m_sysreg 0 0>; - wp-gpios = <&v2m_sysreg 1 0>; - max-frequency = <12000000>; - vmmc-supply = <&v2m_fixed_3v3>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "mclk", "apb_pclk"; - }; - - kmi@060000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x060000 0x1000>; - interrupts = <12>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - kmi@070000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x070000 0x1000>; - interrupts = <13>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - v2m_serial0: uart@090000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x090000 0x1000>; - interrupts = <5>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial1: uart@0a0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0a0000 0x1000>; - interrupts = <6>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial2: uart@0b0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0b0000 0x1000>; - interrupts = <7>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial3: uart@0c0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0c0000 0x1000>; - interrupts = <8>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - wdt@0f0000 { - compatible = "arm,sp805", "arm,primecell"; - reg = <0x0f0000 0x1000>; - interrupts = <0>; - clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; - clock-names = "wdogclk", "apb_pclk"; - }; - - v2m_timer01: timer@110000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x110000 0x1000>; - interrupts = <2>; - clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - v2m_timer23: timer@120000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x120000 0x1000>; - interrupts = <3>; - clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - rtc@170000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0x170000 0x1000>; - interrupts = <4>; - clocks = <&v2m_clk24mhz>; - clock-names = "apb_pclk"; - }; - - clcd@1f0000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f0000 0x1000>; - interrupts = <14>; - clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; - clock-names = "clcdclk", "apb_pclk"; - mode = "XVGA"; - use_dma = <0>; - framebuffer = <0x18000000 0x00180000>; - }; - - virtio_block@0130000 { - compatible = "virtio,mmio"; - reg = <0x130000 0x1000>; - interrupts = <0x2a>; - }; }; v2m_fixed_3v3: fixedregulator@0 { -- 1.7.9.5

11 years, 8 months

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[PATCH] FVP: Add ASL for bus and devices enumeration

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Add ASL methods for SMB, FPGA, NET, CLK, SYSCTL, WDT, TIMER01, TIMER23, RTC and SER. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- .../AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl | 308 +++++++++++++++++++- 1 file changed, 304 insertions(+), 4 deletions(-) diff --git a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl index 76ddfa3..9af6fe7 100644 --- a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl @@ -266,6 +266,74 @@ DefinitionBlock ( } } + Device (PMU0) { + Name (_HID, "LNRO0007") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + }) + Return (RBUF) + } + } + + Device (SMB) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x08000000, // Address Range Minimum (base address in FDT) + 0x0BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x14000000, // Address Range Minimum (base address in FDT) + 0x17FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x18000000, // Address Range Minimum (base address in FDT) + 0x1BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1FFFFFFF, // Address Range Maximum (base + (len -1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x0C000000, // Address Range Minimum (base address in FDT) + 0x0FFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x10000000, // Address Range Minimum (base address in FDT) + 0x13FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + }) + Device (NET0) { Name (_HID, "LNRO0003") Name (_UID, 0) @@ -279,16 +347,248 @@ DefinitionBlock ( } } - Device (PMU0) { - Name (_HID, "LNRO0007") - Name (_UID, 0) + Device (CLK0) { + Name (_HID, "LNRO0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LNRO0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LNRO0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + + Device (FPGA) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1C1FFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x00200000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + }) + + Device (VIRT) { + Name (_HID, "LNRO0005") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c130000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x4A} + }) + Return (RBUF) + } + } + } // End of FPGA + } // End SMB + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) { + If (LEqual (Arg2, 0x00)) { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + Device (SCT0) { + Name (_HID, "LNRO000C") + Name (_UID, 0) + Name (_ADR, 0x1c020000) /* SYSCTL */ Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.SMB.CLK2", + "clock-name", "timclk \\_SB.SMB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c090000) + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c090000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x25} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0a0000) + Name (_UID, 1) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x26} + }) + Return (RBUF) + } + } + + Device (SER2) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0b0000) + Name (_UID, 2) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x27} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0c0000) + Name (_UID, 3) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x28} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_HID, "LNRO000D") + Name (_UID, 0) + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} + }) + Return (RBUF) + } + } + + Device (TIM0) { + Name (_HID, "LNRO000E") + Name (_UID, 0) + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} }) Return (RBUF) } } + + Device (TIM2) { + Name (_HID, "LNRO000F") + Name (_UID, 0) + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_HID, "LNRO0010") + Name (_UID, 0) + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + + } // End of AMBA } } -- 1.7.9.5

11 years, 8 months

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some help in booting V8 foundation model.

by Amit Kachhap

Hi Hanjun/ACPI team, I am trying to boot V8 foundation model. I am using boot wrapper code from git://git.linaro.org/arm/models/boot-wrapper-aarch64.git Kernel is booting fine but I cannot load ACPI blob as there are no hooks in it to pass to kernel. However in the git://git.linaro.org/arm/models/boot-wrapper.git there are some ACPI hooks but it is for armv7 and does not compile for arm64 linaro toolchain. Any pointer where i am going wrong? Thanks, Amit Daniel

11 years, 8 months

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[RFC PATCH] acpi: arm64: move initialisation functions into arm-core

by Graeme Gregory

Instead of littering platform with multiple functions more them into the arm-core.c file. Stub them out in the !CONFIG_ACPI case. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 6 ++++++ arch/arm64/kernel/setup.c | 13 +------------ drivers/acpi/plat/arm-core.c | 9 +++++++++ 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 9095a7f..2611769 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -80,7 +80,13 @@ struct acpi_arm_root { }; extern struct acpi_arm_root acpi_arm_rsdp_info; +#ifdef CONFIG_ACPI void arm_acpi_reserve_memory(void); +void arm_acpi_init(void); +#else +inline void arm_acpi_reserve_memory(void) {return;} +inline void arm_acpi_init(void) {return;} +#endif /* Low-level suspend routine. */ extern int (*acpi_suspend_lowlevel)(void); diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 7e2a71c..707b857 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -263,22 +263,11 @@ void __init setup_arch(char **cmdline_p) arm64_memblock_init(); -#ifdef CONFIG_ACPI arm_acpi_reserve_memory(); -#endif efi_init(); -#ifdef CONFIG_ACPI - /* - * Parse the ACPI tables for possible boot-time configuration - */ - acpi_boot_table_init(); - early_acpi_boot_init(); - boot_cpu_apic_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; - acpi_boot_init(); - prefill_possible_map(); -#endif + arm_acpi_init(); paging_init(); request_standard_resources(); diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index bb37efe..f8798fc 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -42,6 +42,7 @@ #include <asm/io.h> #include <asm/smp.h> #include <asm/acpi.h> +#include <asm/cputype.h> /* * We never plan to use RSDT on arm/arm64 as its deprecated in spec but this @@ -621,6 +622,14 @@ void __init arm_acpi_reserve_memory() memblock_remove(addr - section_offset, num_sections * SECTION_SIZE); } +void arm_acpi_init(void) { + acpi_boot_table_init(); + early_acpi_boot_init(); + boot_cpu_apic_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; + acpi_boot_init(); + prefill_possible_map(); +} + static int __init parse_acpi(char *arg) { if (!arg) -- 1.8.4.2

11 years, 8 months

2
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[PATCH] ACPI: correct minor typos

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> Correct "coolign" to "cooling" and "*_ptg" to "*_pctg" as intended. This changes comment text only. Signed-off-by: Al Stone <al.stone(a)linaro.org> --- drivers/acpi/processor_thermal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/processor_thermal.c b/drivers/acpi/processor_thermal.c index d1d2e7f..1ea79739 100644 --- a/drivers/acpi/processor_thermal.c +++ b/drivers/acpi/processor_thermal.c @@ -186,14 +186,14 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state) #endif -/* thermal coolign device callbacks */ +/* thermal cooling device callbacks */ static int acpi_processor_max_state(struct acpi_processor *pr) { int max_state = 0; /* * There exists four states according to - * cpufreq_thermal_reduction_ptg. 0, 1, 2, 3 + * cpufreq_thermal_reduction_pctg. 0, 1, 2, 3 */ max_state += cpufreq_get_max_state(pr->id); if (pr->flags.throttling) -- 1.8.3.1

11 years, 8 months

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[PATCH 1/2] ACPI / dock: Remove the redundant if (acpi_disabled) check

by Hanjun Guo

acpi_dock_init() will only be called in acpi_scan_init(), and the code logic shows that if (acpi_disabled) is redundant: acpi_init(); if (acpi_disabled) return; acpi_scan_init(); acpi_dock_init(); if (acpi_disabled) /* redundant */ return; Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- This patch set is inspired by Rob's question for my ACPI ARM64 core patches :) drivers/acpi/dock.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c index 8da6be9..61d0c3f 100644 --- a/drivers/acpi/dock.c +++ b/drivers/acpi/dock.c @@ -893,9 +893,6 @@ find_dock_and_bay(acpi_handle handle, u32 lvl, void *context, void **rv) void __init acpi_dock_init(void) { - if (acpi_disabled) - return; - /* look for dock stations and bays */ acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, find_dock_and_bay, NULL, NULL, NULL); -- 1.7.9.5

11 years, 8 months

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[PATCH] ACPI / table: Replace '1' with specific error in return value

by Hanjun Guo

In commit 7f8f97c3cc (ACPI: acpi_table_parse() now returns success/fail, not count), it return '1' when no table found, replace -ENODEV here to make it more resonable. Fix the same problem in acpi_table_init() too. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/acpi/tables.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c index d67a1fe..4ec4425 100644 --- a/drivers/acpi/tables.c +++ b/drivers/acpi/tables.c @@ -306,7 +306,7 @@ int __init acpi_table_parse(char *id, acpi_tbl_table_handler handler) early_acpi_os_unmap_memory(table, tbl_size); return 0; } else - return 1; + return -ENODEV; } /* @@ -351,7 +351,7 @@ int __init acpi_table_init(void) status = acpi_initialize_tables(initial_tables, ACPI_MAX_TABLES, 0); if (ACPI_FAILURE(status)) - return 1; + return -EINVAL; check_multiple_madt(); return 0; -- 1.7.9.5

11 years, 8 months

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[RFC part3 PATCH 0/2] Using ACPI GTDT table to initialize arch timer

by Hanjun Guo

This is the last part of patch set for core of ARM64 ACPI, and is based on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC". ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only, and contains the information for arch timer initialisation. This patch trys to convert the arch timer to ACPI using GTDT. After this patch set was posted, we already finished the SMP, GIC and arch timer initialisation, which all are essential for ARM64 core system running, then we will focus on converting the device drivers to ACPI. Here is the GTDT ASL code I used: --- platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl index 18c821a..714d61c 100644 --- a/platforms/foundation-v8.acpi/gtdt.asl +++ b/platforms/foundation-v8.acpi/gtdt.asl @@ -1,5 +1,6 @@ /* * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * Hanjun Guo <hanjun.guo(a)linaro.org> * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -21,22 +22,32 @@ [0004] Flags (decoded below) : 00000001 Memory Present : 1 -[0004] Secure PL1 Interrupt : 00000000 -[0004] SPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +/* In Foundation model's dts file, the last cell of interrupts + * is 0xff01, it means its cpu mask is FF, and trigger type + * and flag is 1 = low-to-high edge triggered. + * + * so in ACPI the Trigger Mode is 1 - Edge triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * using direct mapping for hwirqs, it means that we using + * ID [16, 31] for PPI, not [0, 15] used in FDT. + */ +[0004] Secure PL1 Interrupt : 0000001d +[0004] SPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL1 Interrupt : 00000000 -[0004] NSPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL1 Interrupt : 0000001e +[0004] NSPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Virtual Timer Interrupt : 00000000 -[0004] VT Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Virtual Timer Interrupt : 0000001b +[0004] VT Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL2 Interrupt : 00000000 -[0004] NSPL2 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL2 Interrupt : 0000001a +[0004] NSPL2 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 Hanjun Guo (2): clocksource / arch_timer: Use ACPI GTDT table to initialize arch timer ARM64 / clocksource: Use arch_timer_acpi_init() arch/arm64/kernel/time.c | 4 ++ drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 3 files changed, 124 insertions(+), 16 deletions(-) -- 1.7.9.5

11 years, 8 months

3
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[PATCH] ACPI: remove trailing whitespace

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> Minor cleanup: remove some extra trailing white space. Signed-off-by: Al Stone <al.stone(a)linaro.org> --- drivers/acpi/osl.c | 2 +- drivers/acpi/processor_idle.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 54a20ff..44c07eb 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -1282,7 +1282,7 @@ acpi_status acpi_os_wait_semaphore(acpi_handle handle, u32 units, u16 timeout) jiffies = MAX_SCHEDULE_TIMEOUT; else jiffies = msecs_to_jiffies(timeout); - + ret = down_timeout(sem, jiffies); if (ret) status = AE_TIME; diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 644516d..597cdab 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -598,7 +598,7 @@ static int acpi_processor_power_verify(struct acpi_processor *pr) case ACPI_STATE_C2: if (!cx->address) break; - cx->valid = 1; + cx->valid = 1; break; case ACPI_STATE_C3: -- 1.8.3.1

11 years, 8 months

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[PATCH] ACPI: ARM: remove blob offset

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> ACPI: ARM: remove blob offset we are no longer using it. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/osl.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 212ae09..a7dc366 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -283,7 +283,6 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) } address = phys_to_virt(acpi_arm_rsdp_info.phys_address); - address += ACPI_BLOB_HEADER_SIZE; *pa = (acpi_physical_address)address; rp = (struct acpi_table_rsdp *)address; -- 1.7.9.5

11 years, 8 months

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[PATCH] ARM64 ACPI: define acpi_suspend_lowlevel as NULL

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> We had a missing symbol so define this as NULL for arm as it is currenly unused on arm64 platform Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 5f17424..9095a7f 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -83,7 +83,7 @@ extern struct acpi_arm_root acpi_arm_rsdp_info; void arm_acpi_reserve_memory(void); /* Low-level suspend routine. */ -extern int acpi_suspend_lowlevel(void); +extern int (*acpi_suspend_lowlevel)(void); extern void prefill_possible_map(void); -- 1.7.9.5

11 years, 8 months

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[PATCH] AcpiTables: Switch to PNPID as LNRO

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Use official PNPID as LNRO in all acpi tables Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- .../AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl | 4 ++-- .../Drivers/AcpiTables/exynos5250-arndale/Dsdt.asl | 2 +- ArmPkg/Drivers/AcpiTables/foundation-v8/Dsdt.asl | 4 ++-- ArmPkg/Drivers/AcpiTables/rtsm_ve-aemv8a/Dsdt.asl | 2 +- ArmPkg/Drivers/AcpiTables/rtsm_ve-v7/Dsdt.asl | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl index f74b69b..76ddfa3 100644 --- a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl @@ -267,7 +267,7 @@ DefinitionBlock ( } Device (NET0) { - Name (_HID, "LINA0003") + Name (_HID, "LNRO0003") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { @@ -280,7 +280,7 @@ DefinitionBlock ( } Device (PMU0) { - Name (_HID, "LINA0007") + Name (_HID, "LNRO0007") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { diff --git a/ArmPkg/Drivers/AcpiTables/exynos5250-arndale/Dsdt.asl b/ArmPkg/Drivers/AcpiTables/exynos5250-arndale/Dsdt.asl index 4f97ba9..da4302e 100644 --- a/ArmPkg/Drivers/AcpiTables/exynos5250-arndale/Dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/exynos5250-arndale/Dsdt.asl @@ -20,7 +20,7 @@ DefinitionBlock ( } Device (I2C) { - Name (_HID, "LINA0001") + Name (_HID, "LNRO0001") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { diff --git a/ArmPkg/Drivers/AcpiTables/foundation-v8/Dsdt.asl b/ArmPkg/Drivers/AcpiTables/foundation-v8/Dsdt.asl index 58dfd12..0fe2190 100644 --- a/ArmPkg/Drivers/AcpiTables/foundation-v8/Dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/foundation-v8/Dsdt.asl @@ -241,7 +241,7 @@ DefinitionBlock ( } Device (NET0) { - Name (_HID, "LINA0003") + Name (_HID, "LNRO0003") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { @@ -254,7 +254,7 @@ DefinitionBlock ( } Device (VIRT) { - Name (_HID, "LINA0005") + Name (_HID, "LNRO0005") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { diff --git a/ArmPkg/Drivers/AcpiTables/rtsm_ve-aemv8a/Dsdt.asl b/ArmPkg/Drivers/AcpiTables/rtsm_ve-aemv8a/Dsdt.asl index c4185fe..eb5566c 100644 --- a/ArmPkg/Drivers/AcpiTables/rtsm_ve-aemv8a/Dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/rtsm_ve-aemv8a/Dsdt.asl @@ -240,7 +240,7 @@ DefinitionBlock ( } Device (NET0) { - Name (_HID, "LINA0003") + Name (_HID, "LNRO0003") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { diff --git a/ArmPkg/Drivers/AcpiTables/rtsm_ve-v7/Dsdt.asl b/ArmPkg/Drivers/AcpiTables/rtsm_ve-v7/Dsdt.asl index c4185fe..eb5566c 100644 --- a/ArmPkg/Drivers/AcpiTables/rtsm_ve-v7/Dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/rtsm_ve-v7/Dsdt.asl @@ -240,7 +240,7 @@ DefinitionBlock ( } Device (NET0) { - Name (_HID, "LINA0003") + Name (_HID, "LNRO0003") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { -- 1.7.9.5

11 years, 8 months

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[PATCH] ACPI / platform: Use official HID as LNRO

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Use the official HID as LNRO from temporary LINA. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- arch/arm64/kernel/perf_event.c | 2 +- drivers/acpi/acpi_platform.c | 10 +++++----- drivers/mfd/vexpress-sysreg.c | 2 +- drivers/net/ethernet/smsc/smc91x.c | 2 +- drivers/virtio/virtio_mmio.c | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 460f158..a5d297b 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -1237,7 +1237,7 @@ static struct of_device_id armpmu_of_device_ids[] = { #ifdef CONFIG_ACPI static const struct acpi_device_id armpmu_acpi_match[] = { - { "LINA0007", }, + { "LNRO0007", }, {}, }; #endif diff --git a/drivers/acpi/acpi_platform.c b/drivers/acpi/acpi_platform.c index 74beb94..1359eda 100644 --- a/drivers/acpi/acpi_platform.c +++ b/drivers/acpi/acpi_platform.c @@ -31,11 +31,11 @@ static const struct acpi_device_id acpi_platform_device_ids[] = { { "PNP0D40" }, /* arm64 platform devices */ - { "LINA0003" }, /* smc91x for ethernet */ - { "LINA0005" }, /* virtio mmio */ - { "LINA0007" }, /* armv8 pmu */ - { "LINA0009" }, /* vexpress-sysreg */ - { "LINA000A" }, /* uart-pl011 */ + { "LNRO0003" }, /* smc91x for ethernet */ + { "LNRO0005" }, /* virtio mmio */ + { "LNRO0007" }, /* armv8 pmu */ + { "LNRO0009" }, /* vexpress-sysreg */ + { "LNRO000A" }, /* uart-pl011 */ { } }; diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c index 9e39075..31f60ff 100644 --- a/drivers/mfd/vexpress-sysreg.c +++ b/drivers/mfd/vexpress-sysreg.c @@ -515,7 +515,7 @@ static const struct of_device_id vexpress_sysreg_match[] = { #ifdef CONFIG_ACPI static const struct acpi_device_id vexpress_sysreg_acpi_match[] = { - { "LINA0009", }, + { "LNRO0009", }, { } }; #endif diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c index 7aa517d..46f241d 100644 --- a/drivers/net/ethernet/smsc/smc91x.c +++ b/drivers/net/ethernet/smsc/smc91x.c @@ -2387,7 +2387,7 @@ MODULE_DEVICE_TABLE(of, smc91x_match); #ifdef CONFIG_ACPI static const struct acpi_device_id smc91x_acpi_match[] = { - { "LINA0003", }, + { "LNRO0003", }, { } }; MODULE_DEVICE_TABLE(acpi, smc91x_acpi_match); diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c index 81d539f..39007aa 100644 --- a/drivers/virtio/virtio_mmio.c +++ b/drivers/virtio/virtio_mmio.c @@ -637,7 +637,7 @@ MODULE_DEVICE_TABLE(of, virtio_mmio_match); #ifdef CONFIG_ACPI static const struct acpi_device_id virtio_mmio_acpi_match[] = { - { "LINA0005", }, + { "LNRO0005", }, { } }; MODULE_DEVICE_TABLE(acpi, virtio_mmio_acpi_match); -- 1.7.9.5

11 years, 8 months

2
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[RFC part1 PATCH 0/7] Make ACPI core running on ARM64

by Hanjun Guo

This is the first part of making ACPI core running on ARM. PCI is optional on ARM64 but ACPI is dependent on PCI now, so in the first patch we try to make ACPI can be running without PCI. _PDC is requred for ACPI processor_core.c, but its related code is a little bit x86/ia64 dependent, so I rework _PDC related staff to make it more arch independent, and then introduce the skeleton of _PDC related for ARM64, it should be fully implemented after ACPI spec is ready for processor idle control. After that, arm-core.c is introduced so we can get ACPI table from UEFI, then we can parsed for SMP initialisation, GIC initialisation and for ACPI drivers. This patch set is based on: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git origin/linux-next branch and plus Al Stone's v2 reduced hardware profile patch. Hanjun Guo (7): ACPI: Make ACPI core running without PCI on ARM64 ARM64 : Add dummy asm/cpu.h ACPI / processor_core: Rework _PDC related stuff to make it more arch-independent ARM64 / ACPI: Introduce the skeleton of _PDC related for ARM64 ARM64 / ACPI: Introduce arm_core.c and its related head file ARM64 / ACPI: Introduce lowlevel suspend function ARM64 / ACPI: Enable ARM64 in Kconfig arch/arm64/Kconfig | 2 + arch/arm64/include/asm/acpi.h | 93 +++++++++++++++ arch/arm64/include/asm/cpu.h | 25 ++++ arch/arm64/include/asm/processor.h | 11 ++ arch/arm64/kernel/process.c | 5 + arch/arm64/kernel/setup.c | 8 ++ drivers/acpi/Kconfig | 12 +- drivers/acpi/Makefile | 4 +- drivers/acpi/internal.h | 5 + drivers/acpi/osl.c | 16 +++ drivers/acpi/plat/Makefile | 1 + drivers/acpi/plat/arm-core.c | 226 ++++++++++++++++++++++++++++++++++++ drivers/acpi/processor_core.c | 27 ++--- drivers/acpi/reboot.c | 47 +++++--- drivers/pnp/pnpacpi/rsparser.c | 2 + 15 files changed, 452 insertions(+), 32 deletions(-) create mode 100644 arch/arm64/include/asm/acpi.h create mode 100644 arch/arm64/include/asm/cpu.h create mode 100644 drivers/acpi/plat/Makefile create mode 100644 drivers/acpi/plat/arm-core.c -- 1.7.9.5

11 years, 8 months

1
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[PATCH] foundation v8:Fix PNPID for serial

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Use the official PNPID as LNRO for serial devices. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- platforms/foundation-v8.acpi/dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/platforms/foundation-v8.acpi/dsdt.asl b/platforms/foundation-v8.acpi/dsdt.asl index 777ae48..0d2ccd5 100644 --- a/platforms/foundation-v8.acpi/dsdt.asl +++ b/platforms/foundation-v8.acpi/dsdt.asl @@ -469,7 +469,7 @@ DefinitionBlock ( } Device (SER0) { - Name (_HID, "LINA000A") + Name (_HID, "LNRO000A") Name (_ADR, 0x1c090000) Name (_UID, 0) @@ -483,7 +483,7 @@ DefinitionBlock ( } Device (SER1) { - Name (_HID, "LINA000A") + Name (_HID, "LNRO000A") Name (_ADR, 0x1c0a0000) Name (_UID, 1) @@ -497,7 +497,7 @@ DefinitionBlock ( } Device (SER2) { - Name (_HID, "LINA000A") + Name (_HID, "LNRO000A") Name (_ADR, 0x1c0b0000) Name (_UID, 2) @@ -511,7 +511,7 @@ DefinitionBlock ( } Device (SER3) { - Name (_HID, "LINA000A") + Name (_HID, "LNRO000A") Name (_ADR, 0x1c0c0000) Name (_UID, 3) -- 1.7.9.5

11 years, 8 months

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[PATCH] switch PNPID to the official LNRO from temporary LINA

by Graeme Gregory

Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- platforms/exynos5250-arndale.acpi/dsdt.asl | 2 +- platforms/foundation-v8.acpi/dsdt.asl | 14 +++++++------- platforms/rtsm_ve-aemv8a.acpi/dsdt.asl | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/platforms/exynos5250-arndale.acpi/dsdt.asl b/platforms/exynos5250-arndale.acpi/dsdt.asl index cc4f2ab..c21d52b 100644 --- a/platforms/exynos5250-arndale.acpi/dsdt.asl +++ b/platforms/exynos5250-arndale.acpi/dsdt.asl @@ -47,7 +47,7 @@ DefinitionBlock ( } Device (I2C) { - Name (_HID, "LINA0001") + Name (_HID, "LNRO0001") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { diff --git a/platforms/foundation-v8.acpi/dsdt.asl b/platforms/foundation-v8.acpi/dsdt.asl index 0660dbf..777ae48 100644 --- a/platforms/foundation-v8.acpi/dsdt.asl +++ b/platforms/foundation-v8.acpi/dsdt.asl @@ -268,7 +268,7 @@ DefinitionBlock ( } Device (PMU0) { - Name (_HID, "LINA0007") + Name (_HID, "LNRO0007") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { @@ -336,7 +336,7 @@ DefinitionBlock ( }) Device (NET0) { - Name (_HID, "LINA0003") + Name (_HID, "LNRO0003") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { @@ -349,7 +349,7 @@ DefinitionBlock ( } Device (CLK0) { - Name (_HID, "LINA0008") + Name (_HID, "LNRO0008") Name (_UID, 0) Method (FREQ, 0x0, NotSerialized) { @@ -358,7 +358,7 @@ DefinitionBlock ( } Device (CLK1) { - Name (_HID, "LINA0008") + Name (_HID, "LNRO0008") Name (_UID, 1) Method (FREQ, 0x0, NotSerialized) { @@ -367,7 +367,7 @@ DefinitionBlock ( } Device (CLK2) { - Name (_HID, "LINA0008") + Name (_HID, "LNRO0008") Name (_UID, 2) Method (FREQ, 0x0, NotSerialized) { @@ -391,7 +391,7 @@ DefinitionBlock ( }) Device (SREG) { - Name (_HID, "LINA0009") + Name (_HID, "LNRO0009") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { @@ -403,7 +403,7 @@ DefinitionBlock ( } Device (VIRT) { - Name (_HID, "LINA0005") + Name (_HID, "LNRO0005") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { diff --git a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl index f74b69b..76ddfa3 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl @@ -267,7 +267,7 @@ DefinitionBlock ( } Device (NET0) { - Name (_HID, "LINA0003") + Name (_HID, "LNRO0003") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { @@ -280,7 +280,7 @@ DefinitionBlock ( } Device (PMU0) { - Name (_HID, "LINA0007") + Name (_HID, "LNRO0007") Name (_UID, 0) Method (_CRS, 0x0, Serialized) { -- 1.8.3.1

11 years, 8 months

2
1
0 0

[PATCH v2 0/7] BOZO cleanup

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> These patches are a bit of all over the place. Each of them cleans up or removes BOZO comments that have been in the ACPI ARM port from the very early days of the port (I inserted the BOZO comments when it was not clear what needed to be done but I could temporarily hack around a problem). Removing each of those had all sorts of different changes needed, from the simplest (the comment turns out to be wrong in hindsight), to stubbing out or even removing functions that make no sense on an ARMv7/v8 platform. Changes for v2: -- Simplification by using kernel config items to exclude code versus obtuse #ifdef logic Al Stone (7): ACPI: ARM: make use of an ACPI blob address in FDT /chosen configurable. ACPI: ARM: Clean up a leftover comment that is no longer pertinent. ACPI: ARM: remove x86 acpi_wakeup_address usage when running on ARM ACPI: ARM: remove unnecessary comments ACPI: ARM: cleanup comments and isolate out x86-specific PAD code ACPI: ARM: stub out PCI configuration call for non-PCI systems ACPI: ARM: stub out processor idle routines for use on non-x86 platforms arch/arm/Kconfig.debug | 11 ++++++ arch/arm/include/asm/acpi.h | 7 ---- arch/arm/include/asm/io.h | 6 +--- arch/arm/include/asm/processor.h | 6 ---- arch/arm64/Kconfig.debug | 11 ++++++ arch/arm64/include/asm/acpi.h | 7 ---- arch/arm64/include/asm/processor.h | 6 ---- drivers/acpi/acpi_pad.c | 15 +++----- drivers/acpi/osl.c | 42 ++++++++++++---------- drivers/acpi/processor_idle.c | 74 +++++++++++++++++++------------------- drivers/acpi/sleep.c | 2 ++ 11 files changed, 91 insertions(+), 96 deletions(-) -- 1.8.3.1 Al Stone (7): ACPI: ARM: make use of an ACPI blob address in FDT /chosen configurable. ACPI: ARM: Clean up a leftover comment that is no longer pertinent. ACPI: ARM: remove x86 acpi_wakeup_address usage when running on ARM ACPI: ARM: remove unnecessary comments ACPI: ARM: clean up comments and disable PAD code for ARM ACPI: ARM: stub out PCI configuration call for non-PCI systems ACPI: ARM: disable x86-specific processor idle code arch/arm/Kconfig.debug | 11 ++++++++++ arch/arm/include/asm/acpi.h | 5 ----- arch/arm/include/asm/io.h | 6 +----- arch/arm/include/asm/processor.h | 6 ------ arch/arm64/Kconfig.debug | 11 ++++++++++ arch/arm64/include/asm/acpi.h | 5 ----- arch/arm64/include/asm/processor.h | 6 ------ drivers/acpi/Kconfig | 5 +++-- drivers/acpi/acpi_pad.c | 17 --------------- drivers/acpi/osl.c | 42 ++++++++++++++++++++++---------------- drivers/acpi/processor_idle.c | 35 ------------------------------- 11 files changed, 50 insertions(+), 99 deletions(-) -- 1.8.3.1

11 years, 8 months

4
11
0 0

[PATCH 1/2] ACPI: process_idle repair hardware reduced compile issue

by Graeme Gregory

It is not valid to use the acpica macros to try and remove functions they only work on prototypes. Instead just increase the scope of the Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/processor_idle.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 0ff1927..208503d 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -218,18 +218,16 @@ static void lapic_timer_state_broadcast(struct acpi_processor *pr, #endif -#ifdef CONFIG_PM_SLEEP -#if (!ACPI_REDUCED_HARDWARE) +#if IS_ENABLED(CONFIG_PM_SLEEP) && !IS_ENABLED(CONFIG_ACPI_REDUCED_HARDWARE) static u32 saved_bm_rld; -#endif -ACPI_HW_DEPENDENT_RETURN_INT(int acpi_processor_suspend(void)) +int acpi_processor_suspend(void) { acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); return 0; } -ACPI_HW_DEPENDENT_RETURN_VOID(void acpi_processor_resume(void)) +void acpi_processor_resume(void) { u32 resumed_bm_rld; @@ -254,7 +252,13 @@ void acpi_processor_syscore_exit(void) { unregister_syscore_ops(&acpi_processor_syscore_ops); } -#endif /* CONFIG_PM_SLEEP */ + +#else + +void acpi_processor_syscore_init(void){} +void acpi_processor_syscore_exit(void){} + +#endif /* CONFIG_PM_SLEEP && !CONFIG_ACPI_REDUCED_HARDWARE */ #if defined(CONFIG_X86) static void tsc_check_state(int state) -- 1.8.3.1

11 years, 8 months

2
5
0 0

[PATCH 00/12] Hardware Reduced Mode cleanup for ACPI

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> This series of patches starts with Hanjun's patch to create a kernel config item for CONFIG_ACPI_REDUCED_HARDWARE [0]. Building on that, I then reviewed all of the code that touched any of several fields in the FADT that the OSPM is supposed to ignore when ACPI is in Hardware Reduced mode [1]. Any time there was a use of one of the fields to be ignored, I evaluated whether or not the code was implementing Hardware Reduced mode correctly. Similarly, for each the flags in the FADT flags field that are to be ignored in Hardware Reduced mode, the kernel code was again scanned for proper usage. The remainder of the patches are to fix all of the situations I could find where the kernel would not behave correctly in this ACPI mode. These seem to work just fine on the RTSM model for ARMv7, both with and without ACPI enabled, and with and without ACPI_REDUCED_HARDWARE enabled; similarly for the FVP model for ARMv8. The patches for ACPI on ARM hardware will be coming later but they presume that reduced HW mode is functioning correctly. In the meantime, there's no way I can think of to test all possible scenarios so feedback would be greatly appreciated. [0] List at https://wiki.linaro.org/LEG/Engineering/Kernel/ACPI/AcpiReducedHw#Section_5… [1] Please see the ACPI Specification v5.0 for details on Hardware Reduced mode. Al Stone (12): ACPI: introduce CONFIG_ACPI_REDUCED_HARDWARE to enable this ACPI mode ACPI: bus master reload not supported in reduced HW mode ACPI: clean up compiler warning about uninitialized field ACPI: HW reduced mode does not allow use of the FADT sci_interrupt field ACPI: ARM: exclude calls on ARM platforms, not include them on x86 ACPI: ensure several FADT fields are only used in HW reduced mode ACPI: do not reserve memory regions for some FADT entries in HW reduced mode ACPI: in HW reduced mode, getting power latencies from FADT is not allowed ACPI: add clarifying comment about processor throttling in HW reduced mode ACPI: ACPI_FADT_C2_MP_SUPPORTED must be ignored in HW reduced mode ACPI: use of ACPI_FADT_32BIT_TIMER is not allowed in HW reduced mode ACPI: correct #ifdef so compilation without ACPI_REDUCED_HARDWARE works drivers/acpi/Kconfig | 8 ++++++++ drivers/acpi/acpica/utxface.c | 3 ++- drivers/acpi/bus.c | 7 ++++++- drivers/acpi/osl.c | 28 ++++++++++++++++++++-------- drivers/acpi/pci_link.c | 14 ++++++++------ drivers/acpi/processor_idle.c | 19 ++++++++++++++----- drivers/acpi/processor_throttling.c | 8 ++++++++ drivers/acpi/sleep.c | 2 +- include/acpi/acpixf.h | 6 ++++++ include/acpi/platform/aclinux.h | 4 ++++ 10 files changed, 77 insertions(+), 22 deletions(-) -- 1.8.3.1

11 years, 8 months

5
58
0 0

[PATCH V2 0/4] ACPI/ARM: AMBA bus ACPI module

by Brandon Anderson

This patch series requires the fixed-clock patches from Hanjun Guo. Provides an ACPI module to probe ARM AMBA devices that have a hardware ID, which is used with struct amba_device to match up the appropriate driver. This currently uses the _DSM table for key/value pairs, which may need to be changed to use _PRP depending on the results of separate discussions. See example of the required DSDT definition format below. V2: Minor changes to address comments about #ifdef format and _DSM table tests. Brandon Anderson (4): early fixed-clock AMBA bus ACPI implementation Add ACPI to AMBA SPI driver remove unneeded sections of DTS definition arch/arm64/boot/dts/foundation-v8-acpi.dts | 10 +- arch/arm64/boot/dts/rtsm_ve-aemv8a-acpi.dts | 4 + arch/arm64/boot/dts/rtsm_ve-motherboard-acpi.dtsi | 8 + drivers/acpi/acpi_platform.c | 2 + drivers/amba/Makefile | 2 +- drivers/amba/acpi.c | 338 +++++++++++++++++++++ drivers/clk/clk-fixed-rate.c | 2 +- drivers/spi/spi-pl022.c | 53 ++++ include/linux/amba/acpi.h | 29 ++ 9 files changed, 443 insertions(+), 5 deletions(-) create mode 100644 drivers/amba/acpi.c create mode 100644 include/linux/amba/acpi.h -- 1.7.9.5 ----------- diff --git a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl index 0bcc94d..64e84a4 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl @@ -252,6 +252,33 @@ DefinitionBlock ( } } + Device (CLK0) { + Name (_HID, "LINA0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LINA0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LINA0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + Device (PMU0) { Name (_HID, "LINA0007") Name (_UID, 0) @@ -263,5 +290,229 @@ DefinitionBlock ( Return (RBUF) } } + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) + { + If (LEqual (Arg2, 0x00)) + { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) + { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") /* the parallel to "arm,primecell" in DTS */ + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + + Device (SCT0) { + Name (_ADR, 0x1c020000) /* SYSCTL */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.CLK2", + "clock-name", "timclk \\_SB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI0) { + Name (_ADR, 0x1c060000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c060000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {44} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI1) { + Name (_ADR, 0x1c070000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c070000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {45} + }) + Return (RBUF) + } + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_ADR, 0x1c090000) /* UART0 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c090000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {37} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_ADR, 0x1c0a0000) /* UART1 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {38} + }) + Return (RBUF) + } + } + Device (SER2) { + Name (_ADR, 0x1c0b0000) /* UART2 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {39} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_ADR, 0x1c0c0000) /* UART3 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {40} + }) + Return (RBUF) + } + } + + Device (AAC0) { + Name (_ADR, 0x1c040000) /* AACI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c040000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {43} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} + }) + Return (RBUF) + } + } + + Device (TIM0) { + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} + }) + Return (RBUF) + } + } + + Device (TIM2) { + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + } } }

11 years, 8 months

8
16
0 0

[PATCH 0/7] BOZO cleanup

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> These patches are a bit of all over the place. Each of them cleans up or removes BOZO comments that have been in the ACPI ARM port from the very early days of the port (I inserted the BOZO comments when it was not clear what needed to be done but I could temporarily hack around a problem). Removing each of those had all sorts of different changes needed, from the simplest (the comment turns out to be wrong in hindsight), to stubbing out or even removing functions that make no sense on an ARMv7/v8 platform. The only file in the ARM ACPI code that still has a "BOZO" comment in it should be drivers/acpi/plat/arm/sleep.c; this has been left alone since there are discussions about removing the file completely (which is probably a good idea). Al Stone (7): ACPI: ARM: make use of an ACPI blob address in FDT /chosen configurable. ACPI: ARM: Clean up a leftover comment that is no longer pertinent. ACPI: ARM: remove x86 acpi_wakeup_address usage when running on ARM ACPI: ARM: remove unnecessary comments ACPI: ARM: cleanup comments and isolate out x86-specific PAD code ACPI: ARM: stub out PCI configuration call for non-PCI systems ACPI: ARM: stub out processor idle routines for use on non-x86 platforms arch/arm/Kconfig.debug | 11 ++++++ arch/arm/include/asm/acpi.h | 7 ---- arch/arm/include/asm/io.h | 6 +--- arch/arm/include/asm/processor.h | 6 ---- arch/arm64/Kconfig.debug | 11 ++++++ arch/arm64/include/asm/acpi.h | 7 ---- arch/arm64/include/asm/processor.h | 6 ---- drivers/acpi/acpi_pad.c | 15 +++----- drivers/acpi/osl.c | 42 ++++++++++++---------- drivers/acpi/processor_idle.c | 74 +++++++++++++++++++------------------- drivers/acpi/sleep.c | 2 ++ 11 files changed, 91 insertions(+), 96 deletions(-) -- 1.8.3.1

11 years, 8 months

4
12
0 0

[PATCH] armv8, pmu: Remove unnecessary #ifdef CONFIG_ACPI

by Tomasz Nowicki

Internally include file and ACPI_PTR are already protected in the case of #ifndef CONFIG_ACPI so we don't need these checks. --- arch/arm64/kernel/perf_event.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 460f158..85e6e3a 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -28,9 +28,7 @@ #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/uaccess.h> -#ifdef CONFIG_ACPI #include <linux/acpi.h> -#endif #include <asm/cputype.h> #include <asm/irq.h> @@ -1255,9 +1253,7 @@ static struct platform_driver armpmu_driver = { .driver = { .name = "arm-pmu", .of_match_table = armpmu_of_device_ids, -#ifdef CONFIG_ACPI .acpi_match_table = ACPI_PTR(armpmu_acpi_match), -#endif }, .probe = armpmu_device_probe, }; -- 1.7.9.5

11 years, 8 months

2
1
0 0

[PATCH 0/4] ACPI/ARM: AMBA bus ACPI module

by Brandon Anderson

This patch series requires the fixed-clock patches from Hanjun Guo. Provides an ACPI module to probe ARM AMBA devices that have a hardware ID, which is used with struct amba_device to match up the appropriate driver. See required DSDT definition format below. Brandon Anderson (4): early fixed-clock AMBA bus ACPI implementation Add ACPI to AMBA SPI driver remove unneeded sections of DTS definition arch/arm64/boot/dts/foundation-v8-acpi.dts | 10 +- arch/arm64/boot/dts/rtsm_ve-aemv8a-acpi.dts | 4 + arch/arm64/boot/dts/rtsm_ve-motherboard-acpi.dtsi | 8 + drivers/acpi/acpi_platform.c | 2 + drivers/amba/Makefile | 2 +- drivers/amba/acpi.c | 339 +++++++++++++++++++++ drivers/clk/clk-fixed-rate.c | 2 +- drivers/spi/spi-pl022.c | 49 +++ include/linux/amba/acpi.h | 29 ++ 9 files changed, 440 insertions(+), 5 deletions(-) create mode 100644 drivers/amba/acpi.c create mode 100644 include/linux/amba/acpi.h -- 1.7.9.5 ----------- diff --git a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl index 0bcc94d..64e84a4 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl @@ -252,6 +252,33 @@ DefinitionBlock ( } } + Device (CLK0) { + Name (_HID, "LINA0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LINA0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LINA0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + Device (PMU0) { Name (_HID, "LINA0007") Name (_UID, 0) @@ -263,5 +290,229 @@ DefinitionBlock ( Return (RBUF) } } + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) + { + If (LEqual (Arg2, 0x00)) + { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) + { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") /* the parallel to "arm,primecell" in DTS */ + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + + Device (SCT0) { + Name (_ADR, 0x1c020000) /* SYSCTL */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.CLK2", + "clock-name", "timclk \\_SB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI0) { + Name (_ADR, 0x1c060000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c060000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {44} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI1) { + Name (_ADR, 0x1c070000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c070000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {45} + }) + Return (RBUF) + } + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_ADR, 0x1c090000) /* UART0 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c090000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {37} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_ADR, 0x1c0a0000) /* UART1 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {38} + }) + Return (RBUF) + } + } + Device (SER2) { + Name (_ADR, 0x1c0b0000) /* UART2 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {39} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_ADR, 0x1c0c0000) /* UART3 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {40} + }) + Return (RBUF) + } + } + + Device (AAC0) { + Name (_ADR, 0x1c040000) /* AACI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c040000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {43} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} + }) + Return (RBUF) + } + } + + Device (TIM0) { + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} + }) + Return (RBUF) + } + } + + Device (TIM2) { + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + } } }

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