Linaro-acpi

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820 discussions

[RFC PATCH] ACPI / gsi: use gsi to find its irqdomain

by Hanjun Guo

As we use the acpi_irq_domain as the global pointer to the acpi core irq domain, which lead to multi places referring it and the way is not scalable, so introduce a struct gsi_cfg_data to abstract the gsi data for the irqchips then match the irq domain with the gsi. For a ACPI based irqchip for example a GICD, it defines System Vector Base in the GICD entry, which means the global system interrupt number where this GIC Distributor’s interrupt inputs start, then we can get the irq number supported by reading the register for this GICD, so we can explictly get the gsi's associated irqdomain if the gsi is within the range of gsi supported by this GICD. For ACPI device in DSDT, it using another mapping of device and hwirq number than DT, in DT, we using the interrupt parent property to get the device node of irqchip, that's why we need the matching function that match the device node with the one associated with the irqdomain. For ACPI, we only can get the gsi which the device is using, no interrupt parent will be used, that because gsi is a flat hwirq number which is unique in the system, then we can get its associated irq domain as I said above, which can be without the token pointer matching the interrupt controller. the code is arch independent, it also can be expanted for x86 for multi ioapics. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/acpi/gsi.c | 51 ++++++++++++++++++++++++++++++++++++++------ drivers/irqchip/irq-gic-v3.c | 4 +++- drivers/irqchip/irq-gic.c | 7 +++++- include/linux/acpi.h | 10 ++++++++- 4 files changed, 62 insertions(+), 10 deletions(-) diff --git a/drivers/acpi/gsi.c b/drivers/acpi/gsi.c index 02c8408..7867ec2 100644 --- a/drivers/acpi/gsi.c +++ b/drivers/acpi/gsi.c @@ -15,11 +15,44 @@ enum acpi_irq_model_id acpi_irq_model; -static struct irq_domain *acpi_irq_domain __read_mostly; +static LIST_HEAD(gsi_cfg_data_list); +static DEFINE_MUTEX(gsi_mutex); -void set_acpi_irq_domain(struct irq_domain *domain) +int gsi_cfg_data_add(struct irq_domain *domain, u32 gsi_base, u32 gsi_end) { - acpi_irq_domain = domain; + struct gsi_cfg_data *data; + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->domain = domain; + data->gsi_base = gsi_base; + data->gsi_base = gsi_base; + + mutex_lock(&gsi_mutex); + list_add(&data->list, &gsi_cfg_data_list); + mutex_unlock(&gsi_mutex); + + return 0; +} + +/* Find irqdomain with GSI (hwirq number) */ +static struct irq_domain *acpi_find_irqdomain(u32 gsi) +{ + struct gsi_cfg_data *data; + struct irq_domain *domain = NULL; + + mutex_lock(&gsi_mutex); + list_for_each_entry(data, &gsi_cfg_data_list, list) { + if (gsi >= data->gsi_base && gsi <= data->gsi_end) { + domain = data->domain; + break; + } + } + mutex_unlock(&gsi_mutex); + + return domain; } static unsigned int acpi_gsi_get_irq_type(int trigger, int polarity) @@ -53,7 +86,9 @@ static unsigned int acpi_gsi_get_irq_type(int trigger, int polarity) */ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) { - *irq = irq_find_mapping(acpi_irq_domain, gsi); + struct irq_domain *domain = acpi_find_irqdomain(gsi); + + *irq = irq_find_mapping(domain, gsi); /* * *irq == 0 means no mapping, that should * be reported as a failure @@ -77,12 +112,13 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, { int irq; unsigned int irq_type = acpi_gsi_get_irq_type(trigger, polarity); + struct irq_domain *domain = acpi_find_irqdomain(gsi); - irq = irq_find_mapping(acpi_irq_domain, gsi); + irq = irq_find_mapping(domain, gsi); if (irq > 0) return irq; - irq = irq_domain_alloc_irqs(acpi_irq_domain, 1, dev_to_node(dev), + irq = irq_domain_alloc_irqs(domain, 1, dev_to_node(dev), &gsi); if (irq <= 0) return -EINVAL; @@ -101,7 +137,8 @@ EXPORT_SYMBOL_GPL(acpi_register_gsi); */ void acpi_unregister_gsi(u32 gsi) { - int irq = irq_find_mapping(acpi_irq_domain, gsi); + struct irq_domain *domain = acpi_find_irqdomain(gsi); + int irq = irq_find_mapping(domain, gsi); irq_dispose_mapping(irq); } diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index a11c020..5c53af6 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -947,6 +947,7 @@ static LIST_HEAD(redist_list); static struct redist_region *redist_regs __initdata; static u32 nr_redist_regions __initdata; static phys_addr_t dist_phy_base __initdata; +u32 gsi_base __initdata; static int __init gic_acpi_register_redist(u64 phys_base, u64 size) @@ -1014,6 +1015,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, if (BAD_MADT_ENTRY(dist, end)) return -EINVAL; + gsi_base = dist->global_irq_base; dist_phy_base = dist->base_address; return 0; } @@ -1168,7 +1170,7 @@ init_base: if (err) goto out_release_redist; - set_acpi_irq_domain(gic_data.domain); + gsi_cfg_data_add(gic_data.domain, gsi_base, gsi_base + gic_data.irq_nr); return 0; out_release_redist: diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 7f943ef..62e0640 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1051,6 +1051,7 @@ IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); #ifdef CONFIG_ACPI static phys_addr_t dist_phy_base, cpu_phy_base __initdata; +u32 gsi_base __initdata; static int __init gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header, @@ -1089,6 +1090,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, if (BAD_MADT_ENTRY(dist, end)) return -EINVAL; + gsi_base = dist->global_irq_base; dist_phy_base = dist->base_address; return 0; } @@ -1139,7 +1141,10 @@ gic_v2_acpi_init(struct acpi_table_header *table) } gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL); - set_acpi_irq_domain(gic_data[0].domain); + + /* since we have only one GICD, we can safely use gic_data[0] here */ + gsi_cfg_data_add(gic_data[0].domain, gsi_base, + gsi_base + gic_data[0].gic_irqs); acpi_irq_model = ACPI_IRQ_MODEL_GIC; return 0; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 6de4b0e..093d60e 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -223,7 +223,15 @@ void acpi_unregister_gsi (u32 gsi); #ifdef CONFIG_ACPI_GENERIC_GSI struct irq_domain; -void set_acpi_irq_domain(struct irq_domain *domain); + +struct gsi_cfg_data { + struct list_head list; + u32 gsi_base; + u32 gsi_end; + struct irq_domain *domain; +}; + +int gsi_cfg_data_add(struct irq_domain *domain, u32 gsi_base, u32 gsi_end); #endif struct pci_dev; -- 1.9.1

8 years, 12 months

[PATCH v3 0/3] Correct for ACPI 5.1->6.0 spec changes in MADT GICC entries

by Al Stone

In the ACPI 5.1 version of the spec, the struct for the GICC subtable (struct acpi_madt_generic_interrupt) of the MADT is 76 bytes long; in ACPI 6.0, the struct is 80 bytes long. But, there is only one definition in ACPICA for this struct -- and that is the 6.0 version. Hence, when BAD_MADT_ENTRY() compares the struct size to the length in the GICC subtable, it fails if 5.1 structs are in use, and there are systems in the wild that have them. Note that this was found in linux-next and these patches apply against that tree and the arm64 kernel tree; 4.1-rc8 does not appear to have this problem since it still has the 5.1 struct definition. Even though there is precendent in ia64 code for ignoring the changes in size, this patch set instead tries to verify correctness. The first patch in the set adds macros for easily using the ACPI spec version. The second patch adds the BAD_MADT_GICC_ENTRY() macro that uses the version macros to check the GICC subtable only, accounting for the difference in specification versions that are possible. The final patch replaces BAD_MADT_ENTRY usage with the BAD_MADT_GICC_ENTRY macro in arm64 code, which is currently the only architecture affected. The BAD_MADT_ENTRY() will continue to work as is for all other MADT subtables. I have tested these patches on an APM Mustang with version 1.15 firmware, where the problem was found, and they fix the problem. Changes for v3: -- Modified the macros for using spec version numbers in order to make them clearer (Rafael, Hanjun) -- Moved the definition of the BAD_MADT_GICC_ENTRY macro to an arm64-specific header file since only this architecture uses the GICC subtable (Rafael) -- Added Reviewed-by (Hanjun) and Acked-by (Will) tags to 3/3, the only unchanged patch; other tags could be applied but the patches have changed. -- Added Fixes: tag to patches Changes for v2: -- Replace magic constants with proper defines (Lorenzo) -- Minor syntax clean-up noted by checkpatch -- Send out CCs properly this time -- Minor clean-up of the paragraphs in this cover letter Al Stone (3): ACPI : introduce macros for using the ACPI specification version ACPI / ARM64: add BAD_MADT_GICC_ENTRY() macro ACPI / ARM64 : use the new BAD_MADT_GICC_ENTRY macro arch/arm64/include/asm/acpi.h | 11 +++++++++++ arch/arm64/kernel/smp.c | 2 +- drivers/irqchip/irq-gic.c | 2 +- include/linux/acpi.h | 10 ++++++++++ 4 files changed, 23 insertions(+), 2 deletions(-) -- 2.4.3

8 years, 12 months

Exposing RSDP, RSDT, XSDT in /sys/

by G Gregory

Hi Guys, I guess its time to put this to bed now that Roys patch has made it into acpica-tools and FWTS has been fixed to work without /dev/mem. I produced the patch to expose these three tables from the kernel. BUT, is there actually a user for this? My gut feeling is no and they really contain little of interest anyway. Does anyone actually have a use for the patch that makes it worth sending upstream? Graeme

9 years

[PATCH v2 0/3] Correct for ACPI 5.1->6.0 spec changes in MADT GICC entries

by Al Stone

In the ACPI 5.1 version of the spec, the struct for the GICC subtable (struct acpi_madt_generic_interrupt) of the MADT is 76 bytes long; in ACPI 6.0, the struct is 80 bytes long. But, there is only one definition in ACPICA for this struct -- and that is the 6.0 version. Hence, when BAD_MADT_ENTRY() compares the struct size to the length in the GICC subtable, it fails if 5.1 structs are in use, and there are systems in the wild that have them. Note that this was found in linux-next and these patches apply against that tree and the arm64 kernel tree; 4.1-rc8 does not appear to have this problem since it still has the 5.1 struct definition. Even though there is precendent in ia64 code for ignoring the changes in size, this patch set instead tries to verify correctness. The first patch in the set adds macros for easily using the ACPI spec version. The second patch adds the BAD_MADT_GICC_ENTRY() macro that uses the version macros to check the GICC subtable only, accounting for the difference in specification versions that are possible. The final patch replaces BAD_MADT_ENTRY usage with the BAD_MADT_GICC_ENTRY macro in arm64 code, which is currently the only architecture affected. The BAD_MADT_ENTRY() will continue to work as is for all other MADT subtables. I have tested these patches on an APM Mustang with version 1.15 firmware, where the problem was found, and they fix the problem. Changes for v2: -- Replace magic constants with proper defines (Lorenzo) -- Minor syntax clean-up noted by checkpatch -- Send out CCs properly this time -- Minor clean-up of the paragraphs in this cover letter Al Stone (3): ACPI : introduce macros for using the ACPI specification version ACPI: add BAD_MADT_GICC_ENTRY() macro ACPI / ARM64 : use the new BAD_MADT_GICC_ENTRY macro arch/arm64/kernel/smp.c | 2 +- drivers/irqchip/irq-gic.c | 2 +- include/linux/acpi.h | 15 +++++++++++++++ 3 files changed, 17 insertions(+), 2 deletions(-) -- 2.4.0

9 years

[RFC PATCH] irqchip / gicv3 / ACPI: Add GICR support via GICC structures

by Hanjun Guo

On systems supporting GICv3 and above, the field of GICR Base Address holds the 64-bit physical address of the associated Redistributor if the GIC Redistributors are not in the always-on power domain, so instead of init GICR regions via GIC redistributor stricture, init it with GICR base address in GICC structures. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/irqchip/irq-gic-acpi.c | 34 ++++++- drivers/irqchip/irq-gic-v3.c | 181 ++++++++++++++++++++++++++++++++--- include/linux/irqchip/arm-gic-acpi.h | 2 + 3 files changed, 200 insertions(+), 17 deletions(-) diff --git a/drivers/irqchip/irq-gic-acpi.c b/drivers/irqchip/irq-gic-acpi.c index 236bba5..732efa0 100644 --- a/drivers/irqchip/irq-gic-acpi.c +++ b/drivers/irqchip/irq-gic-acpi.c @@ -21,6 +21,11 @@ static u8 gic_version __initdata = ACPI_MADT_GIC_VERSION_NONE; static phys_addr_t dist_phy_base __initdata; +u8 __init acpi_gic_version(void) +{ + return gic_version; +} + static int __init acpi_gic_parse_distributor(struct acpi_subtable_header *header, const unsigned long end) @@ -38,6 +43,27 @@ acpi_gic_parse_distributor(struct acpi_subtable_header *header, } static int __init +gic_acpi_parse_madt_gicc(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *gicc; + + gicc = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(gicc, end)) + return -EINVAL; + + /* + *If GICC is enabled but no gicr base address, which means GICR is + * not presented via GICC + */ + if ((gicc->flags & ACPI_MADT_ENABLED) && !gicc->gicr_base_address) + return -ENODEV; + + return 0; +} + +static int __init match_gic_redist(struct acpi_subtable_header *header, const unsigned long end) { return 0; @@ -54,8 +80,12 @@ static bool __init acpi_gic_redist_is_present(void) /* has at least one GIC redistributor entry */ if (count > 0) return true; - else - return false; + + /* else try to find GICR base in GICC entries */ + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, + gic_acpi_parse_madt_gicc, 0); + + return count > 0; } static int __init acpi_gic_version_init(void) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index a1c4c74..755c940 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -389,9 +389,8 @@ static void __init gic_dist_init(void) writeq_relaxed(affinity, base + GICD_IROUTER + i * 8); } -static int gic_populate_rdist(void) +static int gic_populate_rdist_with_regions(u64 mpidr) { - u64 mpidr = cpu_logical_map(smp_processor_id()); u64 typer; u32 aff; int i; @@ -439,6 +438,33 @@ static int gic_populate_rdist(void) } while (!(typer & GICR_TYPER_LAST)); } + return -ENODEV; +} + +#ifdef CONFIG_ACPI +/* + * Populate redist when GIC redistributor address is presented in ACPI + * MADT GICC entries + */ +static int gic_populate_rdist_with_gicr_base(u64 mpidr); +#else +static inline int gic_populate_rdist_with_gicr_base(u64 mpidr) +{ + return -ENODEV; +} +#endif +static int gic_populate_rdist(void) +{ + u64 mpidr = cpu_logical_map(smp_processor_id()); + + if (!gic_data.nr_redist_regions) { + if (!gic_populate_rdist_with_gicr_base(mpidr)) + return 0; + } else { + if (!gic_populate_rdist_with_regions(mpidr)) + return 0; + } + /* We couldn't even deal with ourselves... */ WARN(true, "CPU%d: mpidr %llx has no re-distributor!\n", smp_processor_id(), (unsigned long long)mpidr); @@ -906,6 +932,16 @@ IRQCHIP_DECLARE(gic_v3, "arm,gic-v3", gic_of_init); #endif #ifdef CONFIG_ACPI + +struct acpi_gicc_redist { + struct list_head list; + u64 mpidr; + phys_addr_t phys_base; + void __iomem *redist_base; +}; + +static LIST_HEAD(redist_list); + static struct redist_region *redist_regs __initdata; static u32 nr_redist_regions __initdata; static phys_addr_t dist_phy_base __initdata; @@ -938,6 +974,17 @@ gic_acpi_register_redist(u64 phys_base, u64 size) return 0; } +static void __init +gic_acpi_release_redist_regions(void) +{ + int i; + + for (i = 0; i < nr_redist_regions; i++) + if (redist_regs[i].redist_base) + iounmap(redist_regs[i].redist_base); + kfree(redist_regs); +} + static int __init gic_acpi_parse_madt_redist(struct acpi_subtable_header *header, const unsigned long end) @@ -970,10 +1017,98 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, } static int __init -gic_v3_acpi_init(struct acpi_table_header *table) +gic_acpi_add_gicc_redist(phys_addr_t phys_base, u64 mpidr) { - int count, i, err = 0; + struct acpi_gicc_redist *redist; + + redist = kzalloc(sizeof(*redist), GFP_KERNEL); + if (!redist) + return -ENOMEM; + + redist->mpidr = mpidr; + redist->phys_base = phys_base; + + if (acpi_gic_version() == ACPI_MADT_GIC_VERSION_V3) + /* RD_base + SGI_base */ + redist->redist_base = ioremap(phys_base, 2 * SZ_64K); + else + /* + * RD_base + SGI_base + VLPI_base, + * we don't map reserved page as it's buggy to access it + */ + redist->redist_base = ioremap(phys_base, 3 * SZ_64K); + + if (!redist->redist_base) { + kfree(redist); + return -ENOMEM; + } + + list_add(&redist->list, &redist_list); + return 0; +} + +static void __init +gic_acpi_release_gicc_redist(void) +{ + struct acpi_gicc_redist *redist, *t; + + list_for_each_entry_safe(redist, t, &redist_list, list) { + list_del(&redist->list); + iounmap(redist->redist_base); + kfree(redist); + } +} + +static int __init +gic_acpi_parse_madt_gicc(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *gicc; + + gicc = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(gicc, end)) + return -EINVAL; + + return gic_acpi_add_gicc_redist(gicc->gicr_base_address, + gicc->arm_mpidr); +} + +static int gic_populate_rdist_with_gicr_base(u64 mpidr) +{ + struct acpi_gicc_redist *redist; + void __iomem *ptr; + u32 reg; + + list_for_each_entry(redist, &redist_list, list) { + if (redist->mpidr != mpidr) + continue; + + ptr = redist->redist_base; + reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK; + if (reg != GIC_PIDR2_ARCH_GICv3 && reg != GIC_PIDR2_ARCH_GICv4) { + pr_warn("No redistributor present @%p\n", ptr); + return -ENODEV; + } + + gic_data_rdist_rd_base() = ptr; + gic_data_rdist()->phys_base = redist->phys_base; + pr_info("CPU%d: found redistributor %llx phys base:%pa\n", + smp_processor_id(), + (unsigned long long)mpidr, + &gic_data_rdist()->phys_base); + return 0; + } + + return -ENODEV; +} + +static int __init +gic_acpi_init(struct acpi_table_header *table) +{ + int count, err = 0; void __iomem *dist_base; + bool no_gicr_entries = false; /* Get distributor base address */ count = acpi_parse_entries(ACPI_SIG_MADT, @@ -1000,32 +1135,48 @@ gic_v3_acpi_init(struct acpi_table_header *table) goto out_dist_unmap; } - /* Collect redistributor base addresses */ + /* Collect redistributor base addresses in GICR entries */ count = acpi_parse_entries(ACPI_SIG_MADT, sizeof(struct acpi_table_madt), gic_acpi_parse_madt_redist, table, ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR, 0); if (count <= 0) { - pr_info("No valid GICR entries exist\n"); - err = -EINVAL; - goto out_redist_unmap; + pr_info("No valid GICR entries exist, try GICC entries\n"); + gic_acpi_release_redist_regions(); + no_gicr_entries = true; + } else { + goto init_base; + } + + /* Collect redistributor base addresses in GICC entries */ + count = acpi_parse_entries(ACPI_SIG_MADT, + sizeof(struct acpi_table_madt), + gic_acpi_parse_madt_gicc, table, + ACPI_MADT_TYPE_GENERIC_INTERRUPT, 0); + if (count <= 0) { + pr_info("No valid GICC entries exist\n"); + goto out_release_redist; } +init_base: err = gic_init_bases(dist_base, redist_regs, nr_redist_regions, 0, NULL); if (err) - goto out_redist_unmap; + goto out_release_redist; acpi_irq_domain = gic_data.domain; return 0; -out_redist_unmap: - for (i = 0; i < nr_redist_regions; i++) - if (redist_regs[i].redist_base) - iounmap(redist_regs[i].redist_base); - kfree(redist_regs); +out_release_redist: + if (no_gicr_entries) { + if (!list_empty(&redist_list)) + gic_acpi_release_gicc_redist(); + } else { + gic_acpi_release_redist_regions(); + } out_dist_unmap: iounmap(dist_base); return err; } -IRQCHIP_ACPI_DECLARE(gic_v3, ACPI_MADT_GIC_VERSION_V3, gic_v3_acpi_init); +IRQCHIP_ACPI_DECLARE(gic_v3, ACPI_MADT_GIC_VERSION_V3, gic_acpi_init); +IRQCHIP_ACPI_DECLARE(gic_v4, ACPI_MADT_GIC_VERSION_V4, gic_acpi_init); #endif diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h index a4a5edb..d54fe95 100644 --- a/include/linux/irqchip/arm-gic-acpi.h +++ b/include/linux/irqchip/arm-gic-acpi.h @@ -23,5 +23,7 @@ extern struct irq_domain *acpi_irq_domain; +u8 acpi_gic_version(void); + #endif /* CONFIG_ACPI */ #endif /* ARM_GIC_ACPI_H_ */ -- 1.9.1

9 years

Películas y series 2015 estrenos Junio y Julio estan en xtop

by paula

Películas y series 2015 estrenos Junio y Julio estan en xtop Todas estas peliculas series y completas las podras ver en xtop Encontranos con la palabra xtop con cualquiera de los buscadores. Peliculas mas vistas: CENICIENTA (2015) Disponible en BLU-RAY DOS LOCAS EN FUGA (HOT PURSUIT) EL NUEVO EXOTICO HOTEL MARIGOLD EL PAYASO DEL MAL (CLOWN) EL VIAJE MAS LARGO (THE LONGEST RIDE) ELIMINADO (UNFRIENDED) ESCRIBIENDO DE AMOR EX MACHINA Tambien disponible en BLU-RAY HEROE DE CENTRO COMERCIAL 2 (SUPERPOLI EN LAS VEGAS) HOME (HOGAR DULCE HOGAR) INSURGENTE (Actualizada DVD INTENSAMENTE ¡Nueva! JURASSIC WORLD (JURASSIC PARK IV) LA DAMA DE ORO (WOMAN IN GOLD) Disponible en BLU-RAY LA NOCHE DEL DEMONIO 3 (INSIDIOUS) LOS VENGADORES 2 (AVENGERS ERA DE ULTRON) (THE AVENGERS AGE OF ULTRON) MAD MAX 4 FURIA EN LA CARRETERA MAS NOTAS PERFECTAS 2 (WE RE BACK PITCHES) MIENTRAS SEAMOS JOVENES (WHILE WERE YOUNG) Tambien disponible en BLU-RAY POLTERGEIST (JUEGOS DIABOLICOS) PUERTAS ADENTRO (MUSARAÑAS) RAPIDOS Y FURIOSOS 7 SPY UNA ESPIA DESPISTADA TERAPIA DE BROADWAY (SHES FUNNY THAT WAY) TERREMOTO LA FALLA DE SAN ANDRES TOMORROWLAND EL MUNDO DEL MAÑANA Series : Mas vistas MR ROBOT 01* TEMP DVD 01 AQUARIUS 01* TEMP DVD 03 BALLERS 01* TEMP DVD 01 CLIPPED 01* TEMP DVD 01 DARK MATTER 01*TEMP DVD 01 KILLJOYS 01* TEMP DVD 01 SENSE8 STITCHERS 01* TEMP DVD 01 THE BRINK 01* TEMP DVD 01 THE SECRET LIFE OF MARILYN MOROE 01* TEMP DVD 01 THE WHISPERS 01* TEMP DVD 01 UNREAL 01* TEMP DVD 01 ESPERANZA MIA LAS MIL Y UNA NOCHES NOCHE Y DIA JUNTO A VOS GUAPAS AVENIDA BRASIL CASADOS CON HIJOS ENTRE CANÍBALES ER EMERGENCIAS EZEL

9 years

leg-kernel tag leg-20150629.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150629.0 This is based on mainline kernel v4.1 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/73e5e02ec7f7824b0415df… Notes :-

9 years

Re: [Linaro-acpi] compatability with older versions of UEFI

by Zhang, Jonathan Zhixiong

On 6/24/2015 12:14 PM, Luck, Tony wrote: >> Another option would be to have 2 structs, the first one >> "struct cper_sec_mem_err" holds the structure as defined by UEFI >> 2.1, the 2nd one "struct cper_sec_mem_err_24_ext" holds the 4 >> elements added in UEFI 2.3.1. > > Reading some more of the UEFI 2.5 spec ... I see we are in for a world of pain > here. > > 2.5 adds some small tweaks to the memory structure (adding a couple of extra > bits to the "row" entry that can be grabbed from the formerly reserved byte > at offset 73). I think this can be dealt with easily as long as all platforms observe the rule that if a bit is reserved, the bit should be set a '0' instead of being set randomly. Is this a fair assumption on all platforms? > But then there is a whole new GUID for a "Memory Error Section 2" > which has doubled the width of the device, row, column, rank, and bit_pos fields > together with adding two new fields for chip_id and status. This will be painful > because we hardwired the old sizes into extlog_mem_event in <ras/ras_event.h> The old size is encoded in "stuct cper_mem_err_compact", other members of the trace data are the same between "Memory Error Section" and "Memory Error Section 2". One option we have without having to disturb user space handler of memory error trace data would be to change "struct cper_mem_err_compact" so the affected elements are of __u32 instead of __u16. Drawback of this option is that the trace buffer will be unnecessarily bigger if a platform generates "Memory Error Section" data instead of "Memory Error Section 2" data. Such drawback is not a big issue given that uncorrected memory error happens infrequently and corrected memory error should be grouped by platform. -- Jonathan (Zhixiong) Zhang The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

9 years

[PATCH non-pretimeout 0/7] Watchdog: introduce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset: (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi. (2)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support. (3)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.In first timeout, do panic to save system context; d.Support getting timeout from parameter and FDT at the driver init stage. This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model Changelog: non_pretimeout: Delete all pretimeout code The time from enabling watchdog to WS0 is the same with the time from WS0 to WS1, they are both timeout value. v5: Improve pretimeout support: (1)fix typo in documentation and comments. (2)fix the timeout limits validation bug. Simplify sbsa_gwdt driver: (1)integrate all the registers access functions into caller. v4: Refactor GTDT support code: remove it from arch/arm64/kernel/acpi.c, put it into drivers/acpi/gtdt.c file. Integrate the GTDT code of drivers/clocksource/arm_arch_timer.c into drivers/acpi/gtdt.c. Improve pretimeout support, fix "pretimeout == 0" problem. Simplify sbsa_gwdt driver: (1)timeout/pretimeout limits setup; (2)keepalive function; (3)delete "clk == 0" check; (4)delete WS0 status bit check in interrupt routine; (5)sbsa_gwdt_set_wcv function. v3: Delete "export arch_timer_get_rate" patch. Driver back to use arch_timer_get_cntfrq. Improve watchdog_init_timeouts function and update relevant documentation. Improve watchdog_timeout_invalid and watchdog_pretimeout_invalid. Improve foundation-v8.dts: delete the unnecessary tag of device node. Remove "ARM64 || COMPILE_TEST" from Kconfig. Add comments in arch/arm64/kernel/acpi.c Fix typoes and incorrect comments. v2: Improve watchdog-kernel-api.txt documentation for pretimeout support. Export "arch_timer_get_rate" in arm_arch_timer.c. Add watchdog_init_timeouts API for pretimeout support in framework. Improve suspend and resume foundation in driver Improve timeout/pretimeout values init code in driver. Delete unnecessary items of the sbsa_gwdt struct and #define. Delete all unnecessary debug info in driver. Fix 64bit division bug. Use the arch_timer interface to get watchdog clock rate. Add MODULE_DEVICE_TABLE for platform device id. Fix typoes. v1: The first version upstream patchset to linux mailing list. Fu Wei (7): Documentation: add sbsa-gwdt.txt documentation ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introduce ARM SBSA watchdog driver ACPI: add GTDT table parse driver into ACPI driver Watchdog: enable ACPI GTDT support for ARM SBSA watchdog driver clocksource: simplify ACPI code in arm_arch_timer.c .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 35 ++ arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 10 + arch/arm64/kernel/time.c | 4 +- drivers/acpi/Kconfig | 9 + drivers/acpi/Makefile | 1 + drivers/acpi/gtdt.c | 180 ++++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 60 +--- drivers/watchdog/Kconfig | 12 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 383 +++++++++++++++++++++ include/clocksource/arm_arch_timer.h | 8 + include/linux/acpi.h | 5 + include/linux/clocksource.h | 4 +- 15 files changed, 671 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/acpi/gtdt.c create mode 100644 drivers/watchdog/sbsa_gwdt.c -- 1.9.1

9 years

[PATCH 00/11] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init

by Hanjun Guo

This patch set introduce self-probe infrastructure to init IRQ controllers and stacked irqdomain support for ACPI based GICv2/3 init. The self-probe infrastructure for ACPI GIC init is similar as IRQCHIP_DECLARE() and based on the GIC version support in ACPI MADT table. We introduce acpi_irq_domain for GICv2/3 core domain to support stacked irqdomain, and pass the gsi (global system interrupt) as the agument (void *arg) for gic_irq_domain_alloc(), then we can alloc virqs via acpi_register_gsi() with stacked irqdomain. In order to make ACPI related GIC init code slef-contained, I consolidated all the GIC init code into drivers/irqchip/irq-gic-acpi.c. update from RFC version: - Consolidate all the GIC init code into drivers/irqchip/irq-gic-acpi.c Hanjun Guo (8): irqchip / GIC: Add GIC version support in ACPI MADT irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init ACPI / gsi: Add gsi_mutex to synchronize acpi_register_gsi()/acpi_unregister_gsi() irqchip / GICv3: Add ACPI support for GICv3+ initialization irqchip / GICv3: Add stacked irqdomain support for ACPI based init irqchip / GICv2 / ACPI: Consolidate GICv2 ACPI related init code irqchip / GICv3 / ACPI: Consolidate GICv3 ACPI related init code Tomasz Nowicki (3): ACPICA: Introduce GIC version for arm based system ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller irqchip / GICv3: Refactor gic_of_init() for GICv3 driver arch/arm64/Kconfig | 1 + arch/arm64/include/asm/irq.h | 13 -- arch/arm64/kernel/acpi.c | 25 --- drivers/acpi/Makefile | 1 + drivers/acpi/gsi.c | 41 +++-- drivers/acpi/irq.c | 40 +++++ drivers/irqchip/Kconfig | 3 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-gic-acpi.c | 318 +++++++++++++++++++++++++++++++++++ drivers/irqchip/irq-gic-v3.c | 149 +++++++++------- drivers/irqchip/irq-gic.c | 129 ++------------ drivers/irqchip/irqchip.h | 12 ++ include/acpi/actbl1.h | 17 +- include/asm-generic/vmlinux.lds.h | 13 ++ include/linux/acpi.h | 14 ++ include/linux/acpi_irq.h | 4 +- include/linux/irqchip/arm-gic-acpi.h | 13 +- include/linux/irqchip/arm-gic-v3.h | 10 ++ include/linux/mod_devicetable.h | 7 + 19 files changed, 577 insertions(+), 234 deletions(-) create mode 100644 drivers/acpi/irq.c create mode 100644 drivers/irqchip/irq-gic-acpi.c -- 1.9.1

9 years

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