From: Al Stone <al.stone(a)linaro.org>
Correct "coolign" to "cooling" and "*_ptg" to "*_pctg" as intended.
This changes comment text only.
Signed-off-by: Al Stone <al.stone(a)linaro.org>
---
drivers/acpi/processor_thermal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/processor_thermal.c b/drivers/acpi/processor_thermal.c
index d1d2e7f..1ea79739 100644
--- a/drivers/acpi/processor_thermal.c
+++ b/drivers/acpi/processor_thermal.c
@@ -186,14 +186,14 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state)
#endif
-/* thermal coolign device callbacks */
+/* thermal cooling device callbacks */
static int acpi_processor_max_state(struct acpi_processor *pr)
{
int max_state = 0;
/*
* There exists four states according to
- * cpufreq_thermal_reduction_ptg. 0, 1, 2, 3
+ * cpufreq_thermal_reduction_pctg. 0, 1, 2, 3
*/
max_state += cpufreq_get_max_state(pr->id);
if (pr->flags.throttling)
--
1.8.3.1
acpi_dock_init() will only be called in acpi_scan_init(),
and the code logic shows that if (acpi_disabled) is redundant:
acpi_init();
if (acpi_disabled) return;
acpi_scan_init();
acpi_dock_init();
if (acpi_disabled) /* redundant */
return;
Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org>
---
This patch set is inspired by Rob's question for my ACPI ARM64
core patches :)
drivers/acpi/dock.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c
index 8da6be9..61d0c3f 100644
--- a/drivers/acpi/dock.c
+++ b/drivers/acpi/dock.c
@@ -893,9 +893,6 @@ find_dock_and_bay(acpi_handle handle, u32 lvl, void *context, void **rv)
void __init acpi_dock_init(void)
{
- if (acpi_disabled)
- return;
-
/* look for dock stations and bays */
acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
ACPI_UINT32_MAX, find_dock_and_bay, NULL, NULL, NULL);
--
1.7.9.5
This is the last part of patch set for core of ARM64 ACPI, and is based
on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC".
ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only,
and contains the information for arch timer initialisation.
This patch trys to convert the arch timer to ACPI using GTDT.
After this patch set was posted, we already finished the SMP, GIC and
arch timer initialisation, which all are essential for ARM64 core system
running, then we will focus on converting the device drivers to ACPI.
Here is the GTDT ASL code I used:
---
platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++-----------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl
index 18c821a..714d61c 100644
--- a/platforms/foundation-v8.acpi/gtdt.asl
+++ b/platforms/foundation-v8.acpi/gtdt.asl
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013, Al Stone <al.stone(a)linaro.org>
+ * Hanjun Guo <hanjun.guo(a)linaro.org>
*
* [GTDT] Generic Timer Description Table
* Format: [ByteLength] FieldName : HexFieldValue
@@ -21,22 +22,32 @@
[0004] Flags (decoded below) : 00000001
Memory Present : 1
-[0004] Secure PL1 Interrupt : 00000000
-[0004] SPL1 Flags (decoded below) : 00000000
- Trigger Mode : 0
+/* In Foundation model's dts file, the last cell of interrupts
+ * is 0xff01, it means its cpu mask is FF, and trigger type
+ * and flag is 1 = low-to-high edge triggered.
+ *
+ * so in ACPI the Trigger Mode is 1 - Edge triggered, and
+ * Polarity is 0 - Active high as ACPI spec describled.
+ *
+ * using direct mapping for hwirqs, it means that we using
+ * ID [16, 31] for PPI, not [0, 15] used in FDT.
+ */
+[0004] Secure PL1 Interrupt : 0000001d
+[0004] SPL1 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Non-Secure PL1 Interrupt : 00000000
-[0004] NSPL1 Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Non-Secure PL1 Interrupt : 0000001e
+[0004] NSPL1 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Virtual Timer Interrupt : 00000000
-[0004] VT Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Virtual Timer Interrupt : 0000001b
+[0004] VT Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Non-Secure PL2 Interrupt : 00000000
-[0004] NSPL2 Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Non-Secure PL2 Interrupt : 0000001a
+[0004] NSPL2 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
Hanjun Guo (2):
clocksource / arch_timer: Use ACPI GTDT table to initialize arch
timer
ARM64 / clocksource: Use arch_timer_acpi_init()
arch/arm64/kernel/time.c | 4 ++
drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++----
include/clocksource/arm_arch_timer.h | 7 +-
3 files changed, 124 insertions(+), 16 deletions(-)
--
1.7.9.5
From: Naresh Bhat <naresh.bhat(a)linaro.org>
We had a missing symbol so define this as NULL for arm as it is currenly
unused on arm64 platform
Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org>
---
arch/arm64/include/asm/acpi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index 5f17424..9095a7f 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -83,7 +83,7 @@ extern struct acpi_arm_root acpi_arm_rsdp_info;
void arm_acpi_reserve_memory(void);
/* Low-level suspend routine. */
-extern int acpi_suspend_lowlevel(void);
+extern int (*acpi_suspend_lowlevel)(void);
extern void prefill_possible_map(void);
--
1.7.9.5