Hack the arch timer and comment out the GIC in OF way to test the GIC. patch set for arch timer will send out soon.
It can boot Foudation model pretty fine with this patch set.
Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 11 ++++++++--- drivers/irqchip/irq-gic.c | 4 ++-- 2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index fbd9ccd..7563895 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -19,6 +19,7 @@ #include <linux/of_address.h> #include <linux/io.h> #include <linux/slab.h> +#include <linux/acpi.h>
#include <asm/arch_timer.h> #include <asm/virt.h> @@ -589,9 +590,13 @@ static void __init arch_timer_init(struct device_node *np) }
arch_timers_present |= ARCH_CP15_TIMER; - for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++) - arch_timer_ppi[i] = irq_of_parse_and_map(np, i); - arch_timer_detect_rate(NULL, np); + //for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++) + arch_timer_ppi[0] = irq_create_acpi_mapping(13+16, IRQ_TYPE_EDGE_RISING); + arch_timer_ppi[1] = irq_create_acpi_mapping(14+16, IRQ_TYPE_EDGE_RISING); + arch_timer_ppi[2] = irq_create_acpi_mapping(11+16, IRQ_TYPE_EDGE_RISING); + arch_timer_ppi[3] = irq_create_acpi_mapping(10+16, IRQ_TYPE_EDGE_RISING); + //arch_timer_detect_rate(NULL, np); + arch_timer_rate = 100000000;
/* * If HYP mode is available, we know that the physical timer diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index b158c6f..c6b6c87 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1010,8 +1010,8 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) gic_cnt++; return 0; } -IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init); -IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init); +//IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init); +//IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init); IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init); IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);