Hello,
On 11 May 2014 07:46, jonghwan Choi jhbird.choi@gmail.com wrote:
On Wed, May 7, 2014 at 9:14 PM, Ashwin Chaugule ashwin.chaugule@linaro.org wrote:
Like I mentioned in the cover letter of this series, the CPPC patch is only compile tested. I'm trying to verify it at runtime, but I've put it out there early so that anyone who already has platform support for CPPC can help us immensely in giving it a try. Come to think of it, I should have probably mentioned this again in the subject of this patch. Will do it in the next revision. :)
I have some questions.
- When os request the changing frequent to firmware, can the request
be changed? (for example. if os request P0 state, can firmware change P0 into P2, p3 considering thermal or other condition)?
With CPPC there are no "P" states, so I'm assuming you're referring to it just for conveying your point. So, when the OSPM sends a request, it sends three parameters (for now) . min (Min perf register), max (Max perf register) and desired (Desired perf register). The platform can choose to deliver (via Delivered counter register) back CPU performance within this range. The value chosen by the platform will be dependent on what information it has available. e.g. thermal, other performance counters etc.
- Can firmware change the P-state itself without OS’s request?
Yes.
-If it is possible, I think that cpufreq governor also should be changed.
In the short term, we'd want to avoid changes to the CPUfreq governor as much as possible and for this case, I think dont we need to make any. It should just be a matter of refreshing the values seen by the OSPM on a notify event. In the long term, CPUFreq governors (if there is one anymore :) ) could be made aware of the other knobs that CPPC exports. (See the _CPC table in the ACPI Spec) to make more smarter decisions on CPU performance.
-And can firmware nofity OS the change then?
There is an ACPI event notification proposal in progress that notifies the OS that the delivered performance has changed. This event should trigger the refreshing of values seen by the CPUFreq governors.
Cheers, Ashwin