From: Mark Rutland mark.rutland@arm.com
PSCI needs to be able to drop cores to EL2 repeatedly, and it doesn't make sense to always throw CPUs through the original boot path.
This patch changes the EL drop into a macro, and moves it to a common file that can be used by different boot protocol / service implementations. While doing so, the SPSR value used is split out to be more legible.
Signed-off-by: Mark Rutland mark.rutland@arm.com --- boot.S | 8 ++++---- common.S | 26 ++++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 4 deletions(-) create mode 100644 common.S
diff --git a/boot.S b/boot.S index 95dc41e..9cc382b 100644 --- a/boot.S +++ b/boot.S @@ -7,6 +7,8 @@ * found in the LICENSE.txt file. */
+#include "common.S" + .text
.globl _start @@ -61,10 +63,8 @@ _start: * Prepare the switch to the EL2_SP1 mode from EL3 */ ldr x0, =start_ns // Return after mode switch - mov x1, #0x3c9 // EL2_SP1 | D | A | I | F - msr elr_el3, x0 - msr spsr_el3, x1 - eret + mov x1, #SPSR_KERNEL + drop_el x1, x0
start_ns: /* diff --git a/common.S b/common.S new file mode 100644 index 0000000..d82d11b --- /dev/null +++ b/common.S @@ -0,0 +1,26 @@ +/* + * common.S - common definitions useful for boot code + * + * Copyright (C) 2013 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ + +#define SPSR_A (1 << 8) /* System Error masked */ +#define SPSR_D (1 << 9) /* Debug masked */ +#define SPSR_I (1 << 7) /* IRQ masked */ +#define SPSR_F (1 << 6) /* FIQ masked */ +#define SPSR_EL2H (9 << 0) /* EL2 Handler mode */ + +#define SPSR_KERNEL (SPSR_A | SPSR_D | SPSR_I | SPSR_F | SPSR_EL2H) + + /* + * Drop EL to that specified by the spsr value in register mode, at + * the address specified in register addr. + */ + .macro drop_el mode addr + msr elr_el3, \addr + msr spsr_el3, \mode + eret + .endm