I applied this with slight alterations to create a fvp-base-gicv2-psci-acpi.dts file. Otherwsie this makes leg-kernel a pain to construct.
Graeme
On Mon, Dec 09, 2013 at 10:11:26PM +0530, naresh.bhat@linaro.org wrote:
From: Naresh Bhat naresh.bhat@linaro.org
The AMBA device binding has now been moved to DSDT, delete from fvp-base-gicv2-psci FDT
Signed-off-by: Naresh Bhat naresh.bhat@linaro.org
arch/arm64/boot/dts/fvp-base-gicv2-psci.dts | 15 --- arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 152 -------------------------- 2 files changed, 167 deletions(-)
diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts index 646afb7..ae6072f 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts @@ -44,13 +44,6 @@ chosen { };
- aliases {
 serial0 = &v2m_serial0;serial1 = &v2m_serial1;serial2 = &v2m_serial2;serial3 = &v2m_serial3;- };
 - psci { compatible = "arm,psci"; method = "smc";
 @@ -154,14 +147,6 @@ }; };
- pmu {
 compatible = "arm,armv8-pmuv3";interrupts = <0 60 4>,<0 61 4>,<0 62 4>,<0 63 4>;- };
 - smb { compatible = "simple-bus";
 diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi index 3f429da..a1080744b 100644 --- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi +++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi @@ -48,33 +48,6 @@ reg = <2 0x00000000 0x00800000>; };
ethernet@2,02000000 {compatible = "smsc,lan91c111";reg = <2 0x02000000 0x10000>;interrupts = <15>;};v2m_clk24mhz: clk24mhz {compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <24000000>;clock-output-names = "v2m:clk24mhz";};v2m_refclk1mhz: refclk1mhz {compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <1000000>;clock-output-names = "v2m:refclk1mhz";};v2m_refclk32khz: refclk32khz {compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <32768>;clock-output-names = "v2m:refclk32khz";};- iofpga@3,00000000 { compatible = "arm,amba-bus", "simple-bus"; #address-cells = <1>;
 @@ -88,131 +61,6 @@ #gpio-cells = <2>; };
v2m_sysctl: sysctl@020000 {compatible = "arm,sp810", "arm,primecell";reg = <0x020000 0x1000>;clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;clock-names = "refclk", "timclk", "apb_pclk";#clock-cells = <1>;clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";};aaci@040000 {compatible = "arm,pl041", "arm,primecell";reg = <0x040000 0x1000>;interrupts = <11>;clocks = <&v2m_clk24mhz>;clock-names = "apb_pclk";};mmci@050000 {compatible = "arm,pl180", "arm,primecell";reg = <0x050000 0x1000>;interrupts = <9 10>;cd-gpios = <&v2m_sysreg 0 0>;wp-gpios = <&v2m_sysreg 1 0>;max-frequency = <12000000>;vmmc-supply = <&v2m_fixed_3v3>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "mclk", "apb_pclk";};kmi@060000 {compatible = "arm,pl050", "arm,primecell";reg = <0x060000 0x1000>;interrupts = <12>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "KMIREFCLK", "apb_pclk";};kmi@070000 {compatible = "arm,pl050", "arm,primecell";reg = <0x070000 0x1000>;interrupts = <13>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "KMIREFCLK", "apb_pclk";};v2m_serial0: uart@090000 {compatible = "arm,pl011", "arm,primecell";reg = <0x090000 0x1000>;interrupts = <5>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "uartclk", "apb_pclk";};v2m_serial1: uart@0a0000 {compatible = "arm,pl011", "arm,primecell";reg = <0x0a0000 0x1000>;interrupts = <6>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "uartclk", "apb_pclk";};v2m_serial2: uart@0b0000 {compatible = "arm,pl011", "arm,primecell";reg = <0x0b0000 0x1000>;interrupts = <7>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "uartclk", "apb_pclk";};v2m_serial3: uart@0c0000 {compatible = "arm,pl011", "arm,primecell";reg = <0x0c0000 0x1000>;interrupts = <8>;clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;clock-names = "uartclk", "apb_pclk";};wdt@0f0000 {compatible = "arm,sp805", "arm,primecell";reg = <0x0f0000 0x1000>;interrupts = <0>;clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;clock-names = "wdogclk", "apb_pclk";};v2m_timer01: timer@110000 {compatible = "arm,sp804", "arm,primecell";reg = <0x110000 0x1000>;interrupts = <2>;clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;clock-names = "timclken1", "timclken2", "apb_pclk";};v2m_timer23: timer@120000 {compatible = "arm,sp804", "arm,primecell";reg = <0x120000 0x1000>;interrupts = <3>;clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;clock-names = "timclken1", "timclken2", "apb_pclk";};rtc@170000 {compatible = "arm,pl031", "arm,primecell";reg = <0x170000 0x1000>;interrupts = <4>;clocks = <&v2m_clk24mhz>;clock-names = "apb_pclk";};clcd@1f0000 {compatible = "arm,pl111", "arm,primecell";reg = <0x1f0000 0x1000>;interrupts = <14>;clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;clock-names = "clcdclk", "apb_pclk";mode = "XVGA";use_dma = <0>;framebuffer = <0x18000000 0x00180000>;};virtio_block@0130000 {compatible = "virtio,mmio";reg = <0x130000 0x1000>;interrupts = <0x2a>; };};v2m_fixed_3v3: fixedregulator@0 { -- 1.7.9.5
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