Using exynos5440 for testing the ACPI interrupt mapping/parsing as this platform uses arm internal timer.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com --- Hi,
As requested by Al Stone and Hanjun I am sending the GTDT asl table. I am not using arndale for testing this as it uses external arm timer coming from exynos combiner which may be complex to use at this stage.
Thanks, Amit Daniel
platforms/exynos5440-ssdk5440.acpi/gtdt.asl | 42 +++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) create mode 100644 platforms/exynos5440-ssdk5440.acpi/gtdt.asl
diff --git a/platforms/exynos5440-ssdk5440.acpi/gtdt.asl b/platforms/exynos5440-ssdk5440.acpi/gtdt.asl new file mode 100644 index 0000000..c235f70 --- /dev/null +++ b/platforms/exynos5440-ssdk5440.acpi/gtdt.asl @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2013, Al Stone al.stone@linaro.org + * + * [GTDT] Generic Timer Description Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "GTDT" +[0004] Table Length : 00000050 +[0001] Revision : 01 +[0001] Checksum : F1 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "SSDK " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110623 + +[0008] Timer Address : 0000000000000000 +[0004] Flags (decoded below) : 00000001 + Memory Present : 1 + +[0004] Secure PL1 Interrupt : 0000000d +[0004] SPL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 1 + +[0004] Non-Secure PL1 Interrupt : 0000000e +[0004] NSPL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 1 + +[0004] Virtual Timer Interrupt : 0000000b +[0004] VT Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 1 + +[0004] Non-Secure PL2 Interrupt : 0000000a +[0004] NSPL2 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 1