5 Sep
2013
5 Sep
'13
8:51 a.m.
W dniu 02.09.2013 14:03, Hanjun Guo pisze:
From: Mark Rutland mark.rutland@arm.com
We currently do an ldr from GICC_CTLR to w0, then immediately overwrite w0 with a mov. Reading the GICC_CTLR has no effect on the state of the GIC, so there's no reason to do the ldr. It's also inconsistent with the way we set the GICD_CTLR.
Fix this.
Signed-off-by: Mark Rutland mark.rutland@arm.com
boot.S | 1 - 1 file changed, 1 deletion(-)
diff --git a/boot.S b/boot.S index a1f25e2..7c28e84 100644 --- a/boot.S +++ b/boot.S @@ -49,7 +49,6 @@ _start: str w0, [x1], #4
2: ldr x1, =GIC_CPU_BASE // GICC_CTLR
- ldr w0, [x1] mov w0, #3 // EnableGrp0 | EnableGrp1 str w0, [x1]
Hi Hanjun,
Should it be reviewed? I see one Graeme's commit (already reviewed) and the others around assembler code. Is it enabler that has locked order?
Tomasz