From: Mark Rutland mark.rutland@arm.com
Currently we only test the Aff0 bits of the MPIDR to determine the 'primary' CPU. In multi-cluster systems, MPIDR.Aff{3,2,1} may not be zero, and there may by multiple CPUs where MPIDR.Aff0 is zero. In these systems we might determine that two cpus are the primary CPU.
This patch adds a MPIDR_ID_BITS mask, and uses it in all cases we test the MPIDR, making this safe for multi-cluster systems. This doesn't bring full support for multi-cluster systems, however, as they may require additional hardware to be set up (e.g. CCI).
Signed-off-by: Mark Rutland mark.rutland@arm.com --- boot.S | 6 ++++-- common.S | 2 ++ 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/boot.S b/boot.S index 69d1714..eda42f9 100644 --- a/boot.S +++ b/boot.S @@ -36,7 +36,8 @@ _start: * registers. */ mrs x0, mpidr_el1 - tst x0, #15 + ldr x1, =MPIDR_ID_BITS + tst x0, x1 b.ne 1f // secondary CPU
ldr x1, =GIC_DIST_BASE // GICD_CTLR @@ -76,7 +77,8 @@ start_ns: mov x3, xzr
mrs x4, mpidr_el1 - tst x4, #15 + ldr x5, =MPIDR_ID_BITS + tst x4, x5 b.eq 2f
/* diff --git a/common.S b/common.S index bbe005b..70ed17e 100644 --- a/common.S +++ b/common.S @@ -7,6 +7,8 @@ * found in the LICENSE.txt file. */
+#define MPIDR_ID_BITS (0xff00ffffff) + #define CURRENTEL_EL3 (3 << 2)
#define SPSR_A (1 << 8) /* System Error masked */